CN1588930A - Controlling device for digital pulse formed filter output gain - Google Patents
Controlling device for digital pulse formed filter output gain Download PDFInfo
- Publication number
- CN1588930A CN1588930A CN 200410070408 CN200410070408A CN1588930A CN 1588930 A CN1588930 A CN 1588930A CN 200410070408 CN200410070408 CN 200410070408 CN 200410070408 A CN200410070408 A CN 200410070408A CN 1588930 A CN1588930 A CN 1588930A
- Authority
- CN
- China
- Prior art keywords
- signal
- rrc
- control
- power
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Circuits Of Receivers In General (AREA)
Abstract
This invention relates to a wireless communication system, especially relates to a device for controlling output gain to RRC digital filters in TD-SCDMA system including an output gain device selecting the effective position necessary for adaptive adjust. The automatic control is set up on the basis of wireless frames which predicts power of O-next frame or time slot by computing power or amplitude of a certain time slot of frames of the current or before then to design again for next frame.
Description
Technical field
The present invention relates to a kind of wireless communication system, particularly relate to a kind of device that in TD-SCDMA system (mobile communication system TD SDMA), RRC (root rise surplus revolving) digital filter is carried out output gain control.
Background technology
Along with the development of radio communication cause with popularize, mobile communication subscriber quantity is increasing exponentially, and especially Zhong Guo mobile subscriber is increasing with the speed more than 150% over the years always.The user is also more and more higher to the speed and the quality requirement of communication.
In wireless communication system, the wireless transmission channel of decline is very serious to the deterioration of signal fast, for digital receiver, AGC (automatic gain control) can play inhibitory action and make the baseband signal of reception relatively stable decline, but in digital receiver, especially in the second generation (2G) and 3-G (Generation Three mobile communication system) (3G), neighboring trace also is the signal of a plurality of adjacent carrier frequencies and the variation of the received signal that causes also is very serious: by the requirement of standard, when monkey chatter is more abominable than this CF signal about big 40dB.For TD-SCDMA, also has the out of band signal of very strong FDD.Normally, the radio-frequency transmitter or the superhet radio-frequency transmitter of the zero intermediate frequency in no matter receiving for the base station that is widely used in 3G and mobile phone come the most monkey chatter of filtering in the base band of digital receiver end by pulse-shaping matched filter RRC (the surplus filter that revolves of root liter).
But the measurement of AGC is before RRC in the prior art.The main purpose of She Zhiing is for the signal that guarantees this carrier frequency can saturatedly not overflow like this, because this carrier frequency and the also not separation of adjacent signal frequently at this moment.It is to have distributed to the adjacent carrier frequency channel that the length of quantization bit has bigger dynamic range, and the fixed point of digital RRC filter realizes that the sampled signal amplitude that designs with at this moment designs, and it need guarantee that accumulator can not overflow saturated in the process of filtering.Because fixed-point calculation is not considered filtering characteristic, and only consider from multiplication, these mathematical operations of addition itself of mathematics.Consider that from the angle of computing it is equivalent to the word length of all-pass filter and reserves.
Thereby the gain controlling of prior art has to be needed to use bigger memory space storage intermediate data and operation result, causes the big defective of chip area.
In addition, outside monkey chatter, also have the filtering of noise, but, do not do main consideration when therefore analyzing, but its effect can be integrated in the monkey chatter still because noise is compared with signal is more weak.Below, the interference signal of our neighboring trace and the stack of noise are commonly referred to as interference signal.
Summary of the invention
Main purpose of the present invention is exactly in order to improve the expression precision of RRC filter postfixed point data to this carrier frequency, to avoid the transmission of invalid bit.Improve the performance of receiver and reduce hard-wired digital word length and memory space, thereby dwindle chip area.
Description of drawings
Fig. 1 is radio-frequency front-end of the present invention and AGC and self adaptation significance bit regulating system block diagram;
Fig. 2 is the exploded view of gain controlling RRC filtering output;
Fig. 3 is TD-SCDMA subframe structure figure;
Fig. 4 is the schematic diagram of RRC filter;
Fig. 5 is the simplification implementation structure figure of displacement control RRC filtering output exploded view.
Embodiment
In order to dwindle chip area, at first analyze from following two aspects:
On the one hand, in certain function computing module, be provided with following computing
Wherein, X is the data that the output from RRC obtains, and Y is a variable of this functional module, for the purpose of simple the description, if X ∈ [1,1) represent a sign bit with the fixed-point data of Q+1 bit.As shown in table 1, be the output explanation of RRC filter.
Table 1
| Sign bit | Invalid bit | Invalid bit | Significance bit | Significance bit | Significance bit | Significance bit | … |
| Sign bit | Invalid bit | Invalid bit | Invalid bit | Invalid bit | Significance bit | Significance bit | … |
The Y of the mathematical notation of the fixed-point calculation not expression position of loss of accuracy is 2Q+1.So, if the fixed-point representation of X has 2 invalid bits (for positive number after sign bit, invalid bit is " 0 ", and for negative, invalid bit is " 1 "), then the output of Y just has 4 invalid bits, so just caused the waste of fixed-point representation, and, if further calculating for Y is arranged, in order to use the number of significant digit certificate of Y, will enlarge the computing scale of hardware.For example, use 4 significance bits of Y, will calculate with 8 bit data positions.
If but the data of Y are exactly significance bit after sign bit, then only calculate with 4.Like this, improve significance bit, just can reduce the computing scale.Above for example square being example, but when the system design of receiver, the computing of addition, multiplication or the like considers it is identical in the reservation of significance bit.
On the other hand, all be input in the output of many functional modules, and before output,, then can reduce memory space greatly if there is the buffer-stored of data as another functional module.Still for example with top model, if the result of our computing will store 700 * 8 bit significance bits, and if 4 invalid bits are arranged, then our memory space is wanted 700 * 12 bits, has just enlarged memory space.Cause the wasting of resources, improved cost.
From the above analysis, reduce computing scale, memory space effectively, will improve the efficient of data fixed-point representation, and the output of RRC is the source of all subsequent calculations, therefore, in order to realize purpose of the present invention, mainly be the significance bit that RRC is improved output.
The present invention regulates for the self adaptation significance bit, is made of gain multiplier (variable bit shift controller), reselects required significance bit by calculating.As top said, it is to be controlled by the intensity of neighboring trace and interference signal.If the interference signal signal is stronger, ADC (analog-to-digital conversion) is actually the compression useful signal guarantees that useful signal adds interference signal and the time do not overflow and this signal can not be operated between the inelastic region of radio frequency in sampling.For example, will take the quantification space of the highest 2 bits than the interference signal of the strong 12dB of useful signal.Through behind the RRC filter, most interference signal (out of band signal) is by filtering, so its output just can improve two significance bits.If do not disturb, then Shu Chu data will remain unchanged.
Another one need be considered when being exactly to use in the strict system of delay requirement, and this calculating also is to be based upon on the base of prediction.
Device of the present invention can be used for all radio digital communication systems with pulsed beam moulding, and especially base station in the third generation wireless communication system and terminal receive.Application in terminal can improve the receptivity of system, dwindle the scale of terminal demodulation chip.
A specific embodiment of the present invention is arranged in radio-frequency front-end and AGC and the self adaptation significance bit regulating system as shown in Figure 1.This system is by forming such as wireless communication systems such as radio-frequency head analog signal amplifier 1, automatic gain controller 3, analog converter 2, the rear end reception digital processing 8 especially typical component of the receiver system of 3G, in addition, comprise that also the present invention also comprises the output gain device that is made of RRC front signal power estimator 4, RRC filter 6, RSSI estimator 5, the control RRC filtering follower 7 that multiplies each other.
Among Fig. 1, AGC (automatic gain controller) 3 can guarantee can utilize most possibly when carrying out analog-to-digital conversion default conversion position and while again overflowing saturated proportional control in very little scope.This control is to be undertaken by the amplifier gain value of giving radio-frequency front-end.With the TD-SCDMA terminal is example, and AGC is based upon on the basis of radio frames, predicts that by calculating power (or amplitude) present and certain time slot of frame in the past the power of next frame or time slot are that next frame is set a gain then.
The present invention is for guaranteeing that digital received demodulating unit after comprising the RRC filter can use the least possible word length to carry out product but the operation result that adds up can guarantee the performance of receiver.In addition on the one hand, the present invention can improve the operational precision of receiver when using the word length of same bits, thereby improves its performance.
Below, the device of the detailed description embodiment of the invention.
From foregoing description as seen, the device of the embodiment of the invention mainly is for the maximum to the greatest extent significance bit that may use RRC output.Because after digital-to-analogue conversion, signal comprises interference signal, therefore can not obtain shift value from the RSSI (receiving useful signal intensity) that estimates.
The device of the specific embodiment of the invention is to utilize the power estimated value before the RRC filter to calculate amplitude gain value (shift value) with the mathematical computations of RRC filter power estimated value afterwards.
Below should be used for introducing this device and use thereof in the terminal of one of the standard of 3-G (Generation Three mobile communication system) TD-SCDMA.
Because the embodiment of the invention is that the application in TD-SCDMA is to be based upon on the basis of frame, subframe and time slot, therefore in order more clearly to describe the operation principle of apparatus of the present invention, at first briefly introduce the frame structure of TD-SCDMA, as shown in Figure 3, TD-SCDMA is to be the chronomere of a subframe with 5ms.The subframe of each TD-SCDMA is divided into 7 common time slots (TS0～TS6) and three special time slots.
The present invention is primarily aimed at that each time slot handles.Because the power of each time slot is inequality in TD-SCDMA, therefore just control will be handled at the time slot of same position in each subframe as automatic gain, the present invention also was the time slot at same position in each subframe.
Introduce each device of the present invention and its implementation below in conjunction with Fig. 1,2.
The wireless receiver radio frequency front end at first is a radio-frequency head analog signal amplifier 1, the gain of this device control intermediate-freuqncy signal (superheterodyne receiver) or analog baseband signal.Its control can be that the single-stage amplification also can be multistage amplification.In Fig. 1, amplify and explain with single-stage.The gain control value of its amplification is exported by automatic gain controller.
Signal after the amplification is sent to analog converter (ADC) 2.Analog to digital converter 2 is with being quantified as digital signal after the analog baseband signal sampling, so that the Digital Signal Processing of back.For analog to digital converter following several key character value is arranged: full amplitude voltage, conversion rate, quantizing bit number.
Full amplitude voltage has corresponding to the corresponding range signal power of expiring, and its corresponding relation depends on the span (nonrandom signal) or the stochastic behaviour (random signal) of the signal that is input to analog to digital converter.In general, in the radio communication, the signal of process radio-frequency front-end all is a Gaussian Profile, but also is in no way limited to Gaussian Profile.Below we to establish the full amplitude power of analog to digital converter be P
Ref
Switching rate depends on the spectral characteristic of input signal, and the present invention does not relate to the switching rate of ADC.
Quantizing bit number: this is the topmost characteristic of ADC, and the difference of quantizing bit number has determined that the quantified precision of signal, quantizing noise reach the dynamic range that the input analog signal is adapted to behind the ADC.In Fig. 1, the signal through the radio-frequency head analog signal amplifier has comprised useful signal and interference, and these and signal will be converted into the digital signal of M bit.
In the receiving terminal of radio communication, also be provided with automatic gain controller 3, the gain that the control analog signal is amplified.The input of automatic gain controller 3 links to each other with the output of analog to digital converter 2, and its output is connected on the analog signal amplifier.This is because for the wireless signal that is received, and its reception amplitude/power is not only very little but also become when being.This just requires not only received signal to be amplified when handling, and amplification multiple (gain) will be caught up with the variation of received signal intensity as much as possible.Signal correspondingly improves gain amplifier when little change, signal correspondingly reduces gain amplifier when big change.And this is followed signal strength signal intensity and changes to such an extent that tracing process is undertaken by automatic gain controller.AGC does not exist only in during superhet meets sb. at the airport, and is present in the zero intermediate frequency reciver yet.The objective criteria that it amplifies signal is relevant with full amplitude power with the full amplitude voltage of analog to digital converter.This depends on the algorithm of automatic gain control.
Specifically describe self adaptation significance bit adjusting device and algorithm below in conjunction with Fig. 1 and Fig. 2.
As shown in the figure, output gain device of the present invention comprises: RRC front signal power estimator 4, RRC filter 6, RSSI estimator 5, control RRC filtering follower 7 multiplies each other.
Be used for estimating the signal that the RRC front signal power estimator 4 of the signal power before the RRC filter is configured to receive through analog to digital converter 2:
The signal has here comprised signal and the interference signal that this user is required.If the input signal that comes from analog to digital converter is r (n), n=1,2 ..., N.N is the total number of the sampled point of our power estimator signal.In TD-SCDMA, N is the data of each time slot or P times of Midamble data length, and P is the multiple of over-sampling here.Then the power of this signal is estimated P
rFor (also can for example add smothing filtering and estimate with other power estimation method, but P
rMethod of estimation do not influence the single unit system of patent of the present invention):
RRC front signal power estimator 4 outputs to the control RRC filtering follower 7 that multiplies each other with signal behind the total power signal of the particular time-slot of having estimated this frame, the fixed-point mathematics of the follower 7 control RRC filtering outputs of multiplying each other.
The RSSI estimator 5 that is used for estimating receiving the power of useful signal is arranged on the rear end and receives digital processing unit 8 and control between the RRC filtering follower 7 with multiplying each other.The signal input here is the output of RRC filter 6.The input signal of this device comprised useful signal and after RRC filtering residual out of band signal and noise be residual interference signal.
If from the input signal of RRC filter 6 is s (n), n=1,2 ..., L.L is that we estimate at the signals sampling summation of counting.In TD-SCDMA, L is the data of each time slot or Q times of Midamble data length, and Q is that the filtered signal rate of RRC is divided by spreading rate here.Then the power of this signal is estimated P
sFor (also can for example add smothing filtering and estimate with other power estimation method, but P
sMethod of estimation do not influence single unit system of the present invention)
RSSI estimator 5 outputs to the control RRC filtering follower 7 that multiplies each other after the available signal power of the particular time-slot of having estimated this frame is estimated, displacement control RRC filtering output.
Introduce the fixed point implementation of certain RRC filter below, as shown in Figure 4.
From the derivation of RRC filter as can be seen, because fixed-point calculation is not considered filtering characteristic, and only from the multiplication of mathematics, these mathematical operations of addition itself.Consider that from the angle of computing it is equivalent to the word length of all-pass filter and reserves.
The control RRC filtering follower 7 that multiplies each other receives the data that send from RRC filter 6, the output of the displacement cut position that will control here.Its algorithm principle is decomposed as shown in Figure 2.
The control RRC filtering follower 7 that multiplies each other comprises subscriber signal power ratio calculator 701, cumulative mean device 702, control coefrficient generator 703, time-delay Z frame 705, follower 704 multiplies each other.
Subscriber signal power ratio calculator 701 receives the estimated value P that estimates machine 5 outputs from RSSI
SEstimate power estimated value P before the filtering of machine 4 output with RRC front signal power
r, and finish and calculate to receive the power ratio that subscriber signal in the meter signal accounts for total received signal.This device is finished following computing:
B
P＝P
s/P
r (3)
In the formula, B
PRepresent that our calculative user power accounts for the ratio of gross power.P wherein
r, P
sShown in formula (1) and formula (2).So 1-B
PApproximate the ratio that the outer interference power of band accounts for gross power.We will calculate cut position displacement numerical value according to the estimated value of this interference power.
Cumulative mean device 702 is arranged on after the subscriber signal power ratio calculator 701, is used for average computation subscriber signal power ratio calculator 701 B to identical time slot in each frame
PThe mean value of continuous several frames.This calculating can be used moving average, also can use the mode of Kalman filtering.Its function all is to attempt the influence of filtering noise and the influence of decline fast.Illustrate
B in the formula
P(n) the average result value of expression n frame.L represents the average length of moving average, can certainly be to get L=1.At this moment B
P(n)=B
P(n).
In the formula, B
AIt is the amplitude gain coefficient that we need calculate.When Digital Implementation, especially when realizing fixed-point calculation, get with hardware
In the following formula
Expression is got less than B
A2 power/one (0≤k≤log of maximum
2(accumulator length), the k round numbers).The method that just can directly carry out the fractional fixed point displacement like this when reality realizes reaches the effect that multiplies each other.
The follower 704 that multiplies each other is finished the multiply each other function of output of signal to RRC filtering.Its multiplication coefficient is B
AIf get approximation
Then the phase multiplication just can replace with shift operation, has simplified the implementation complexity of device greatly.
Comprehensive subscriber signal power ratio calculator 701, cumulative mean device 702, control coefrficient generator 703, the follower 704 that multiplies each other, device shown in Figure 2 also can be reduced to simplification device as shown in Figure 5.Wherein, the numeral simplification process and the shifting process of displacement output are as shown in table 2.In the process of displacement, the sign bit of numeral remains unchanged all the time, and its concrete integer and fractional representation are to be controlled by control displacement generator 703.By the displacement control that control displacement generator 703 produces invalid bit is removed, improved digital fixed-point representation precision.
Table 2
| Sign bit | 0 | 0 | Significance bit | Significance bit | Significance bit | Significance bit | … |
↓ control displacement
| Sign bit | Significance bit | Significance bit | Significance bit | Significance bit | Significance bit | Significance bit | … |
In addition, in the relatively stricter occasion of some real-time processing requirements, the time requirement that can not satisfy system is exported in the displacement of going again to control this frame after the control bit generation to this frame, therefore the control bit of this frame generation will be used for the displacement output of next frame, as long as the condition and the numerical value of its generation correlate, and predictable.In fact in many systems, this condition is set up.For the time slot of the same position of the different subframes of TD-SCDMA, its band internal power is much at one with the ratio of out-of-band power, therefore can be used for time-delay control, and the Z frame 705 of delaying time is set.Certainly, not the system that is strict with for real-time processing, time-delay Z can be 0, i.e. the shift value of this frame generation is controlled this frame.
The rear end receives digital processing unit 8, with the reception of finishing data, owing to be not problem to be solved by this invention, thereby omit its detailed description.
Claims (9)
1. a digital pulse formed filter output gain control device is characterized in that: the required significance bit of output gain device selection self adaptation adjusting.
2. digital pulse formed filter output gain control device according to claim 1 is characterized in that: the output gain device is arranged in the system that comprises as lower member:
The radio-frequency head analog signal amplifier, the gain of control intermediate-freuqncy signal or analog baseband signal;
Analog to digital converter, the signal after amplifying is sent to analog to digital converter;
Automatic gain controller, the gain that the control analog signal is amplified, its input links to each other with the output of analog to digital converter, and its output is connected on the analog signal amplifier;
The rear end receives digital processing unit.
3. digital pulse formed filter output gain control device according to claim 2, it is characterized in that: automatic gain control is to be based upon on the basis of radio frames, by calculate at present and before the power of certain time slot of frame or power or the time slot that amplitude is predicted next frame be gain of next frame setting then.
4. digital pulse formed filter output gain control device according to claim 1 and 2, it is characterized in that: the output gain device comprises: RRC filter, RRC front signal power estimator, RSSI estimator, the control RRC filtering follower that multiplies each other, it utilizes power estimated value and the power estimated value after the RRC filter before the RRC filter to calculate shift value.
5. digital pulse formed filter output gain control device according to claim 4 is characterized in that:
RRC front signal power estimator is used for estimating the signal power before the RRC filter, and from the analog to digital converter received signal;
RRC front signal power estimator outputs to the control RRC filtering follower that multiplies each other with signal behind the total power signal of the particular time-slot of having estimated this frame, the fixed-point mathematics of the follower that multiplies each other control RRC filtering output;
The RSSI estimator that is used for estimating receiving the power of useful signal is arranged on the rear end and receives digital processing unit and control between the RRC filtering follower with multiplying each other;
The RSSI estimator outputs to the control RRC filtering follower that multiplies each other after the available signal power of the particular time-slot of having estimated this frame is estimated, displacement control RRC filtering output;
The control RRC filtering follower that multiplies each other receives the data that send from the RRC filter, the output of the displacement cut position that will control here.
6. digital pulse formed filter output gain control device according to claim 3 is characterized in that: the control RRC filtering follower that multiplies each other comprises: subscriber signal power ratio calculator, cumulative mean device, control coefrficient generator, follower multiplies each other;
Subscriber signal power ratio calculator receives from RSSI estimates power estimated value before the estimated value of machine output and the filtering that RRC front signal power is estimated machine output;
The cumulative mean device is arranged on after the subscriber signal power ratio calculator, be used for average computation subscriber signal power ratio calculate to identical time slot in each frame the mean value of continuous several frames;
The control coefrficient generator is arranged on after the cumulative mean device, calculates the multiplication coefficient to the amplitude of RRC output;
The follower that multiplies each other is finished the output of multiplying each other of signal to RRC filtering.
7. digital pulse formed filter output gain control device according to claim 6 is characterized in that: the control RRC filtering follower that multiplies each other also comprises time-delay Z frame, is used for time-delay control in the occasion of processing requirements strictness in real time.
8. digital pulse formed filter output gain control device according to claim 6 is characterized in that: the amplitude gain coefficient that produces in the control coefrficient generator is got 2 power power/one.
9. digital pulse formed filter output gain control device according to claim 3 is characterized in that: subscriber signal power ratio calculator, cumulative mean device, control displacement generator, displacement follower.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100704082A CN100372343C (en) | 2004-08-02 | 2004-08-02 | Controlling device for digital pulse formed filter output gain |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100704082A CN100372343C (en) | 2004-08-02 | 2004-08-02 | Controlling device for digital pulse formed filter output gain |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1588930A true CN1588930A (en) | 2005-03-02 |
| CN100372343C CN100372343C (en) | 2008-02-27 |
Family
ID=34604455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100704082A Expired - Fee Related CN100372343C (en) | 2004-08-02 | 2004-08-02 | Controlling device for digital pulse formed filter output gain |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100372343C (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100385995C (en) * | 2005-09-29 | 2008-04-30 | 凯明信息科技股份有限公司 | Method for measuring iso-frequency adjacent community AGC in TD-SCDMA system |
| CN102118139A (en) * | 2009-12-31 | 2011-07-06 | 中兴通讯股份有限公司 | Method and device for dealing with finite precision of filter |
| CN101741348B (en) * | 2009-12-09 | 2012-05-30 | 北京天碁科技有限公司 | Multiphase filter, digital signal processing system and filtering method |
| CN102055503B (en) * | 2009-11-02 | 2014-04-09 | 中兴通讯股份有限公司 | Digital pre-distortion compensation method and device suitable for time division duplex mode |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3904824A (en) * | 1973-12-26 | 1975-09-09 | Ibm | Automatic gain control for encoded data |
| KR950008461B1 (en) * | 1992-03-18 | 1995-07-31 | 재단법인 한국전자통신연구소 | Apparatus for synchronising nrz data bit |
| JPH09319397A (en) * | 1996-05-28 | 1997-12-12 | Sony Corp | Digital signal processor |
| JP3317259B2 (en) * | 1998-12-17 | 2002-08-26 | 日本電気株式会社 | Baseband signal multiplexing circuit and transmission level control method thereof |
| CN1140967C (en) * | 2000-06-23 | 2004-03-03 | 华为技术有限公司 | Automatic gain control (AGC) method for digital base band |
| JP2002223176A (en) * | 2001-01-29 | 2002-08-09 | Nec Corp | Time division multiple access transmitter-receiver and reception automatic gain control method thereof |
-
2004
- 2004-08-02 CN CNB2004100704082A patent/CN100372343C/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100385995C (en) * | 2005-09-29 | 2008-04-30 | 凯明信息科技股份有限公司 | Method for measuring iso-frequency adjacent community AGC in TD-SCDMA system |
| CN102055503B (en) * | 2009-11-02 | 2014-04-09 | 中兴通讯股份有限公司 | Digital pre-distortion compensation method and device suitable for time division duplex mode |
| CN101741348B (en) * | 2009-12-09 | 2012-05-30 | 北京天碁科技有限公司 | Multiphase filter, digital signal processing system and filtering method |
| CN102118139A (en) * | 2009-12-31 | 2011-07-06 | 中兴通讯股份有限公司 | Method and device for dealing with finite precision of filter |
| CN102118139B (en) * | 2009-12-31 | 2014-03-19 | 中兴通讯股份有限公司 | Method and device for dealing with finite precision of filter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100372343C (en) | 2008-02-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1123989C (en) | Method and system for providing estimate of signal strength of received signal | |
| CN1169310C (en) | Doppler spread estimation system | |
| CN101461133A (en) | Automatic gain control | |
| CN1225091C (en) | Base band circuit of receiver and low frequency cut-off frequency controlling method | |
| CN101145813A (en) | A device and method for feedback digital automatic gain control | |
| CN1848998A (en) | Method and apparatus for whole channel primary searching | |
| CN107645283A (en) | A kind of auto gain control method and device | |
| CN2692925Y (en) | Code Division Multiplex channel access substation for estimating interference signal code power and noise deviation | |
| CN1588930A (en) | Controlling device for digital pulse formed filter output gain | |
| CN101588196B (en) | Device and method for gain control | |
| DE10297262T5 (en) | Metric correction for multi-user detection for DS-CDMA with long codes | |
| CN1148009C (en) | Homodyne radio receiver | |
| CN1822575A (en) | Automatic gain control method for receiving data in short distance radio network | |
| CN110855305B (en) | Intermediate frequency digital automatic gain control method and system | |
| CN1159874C (en) | SIR estimating method and device for WCDMA system | |
| DE102004016427B4 (en) | Automatic gain control method and apparatus in a communication system with discontinuous transmission mode | |
| CN100440741C (en) | Automatic gain control device and method for mobile communication terminal | |
| CN1205774C (en) | Receiving device and method | |
| CN1913372A (en) | Mobile communication terminal | |
| CN1223081C (en) | Control of power ratios for in-phase and quadrature channels in a communications system | |
| US7817731B2 (en) | Amplitude compression of signals in a multicarrier system | |
| CN103929177B (en) | A/D quantization bit conversion system and method in GNSS receiver | |
| CN1264969A (en) | Method and device based on inserting frequency pilot sign for evaluating SS/N ratio of communication system | |
| CN100341250C (en) | An automatic gain control system and method | |
| CN1535506A (en) | Method and apparatus for bandwidth estimation |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080227 Termination date: 20180802 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |