CN102118139A - Method and device for dealing with finite precision of filter - Google Patents
Method and device for dealing with finite precision of filter Download PDFInfo
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- CN102118139A CN102118139A CN2009102158930A CN200910215893A CN102118139A CN 102118139 A CN102118139 A CN 102118139A CN 2009102158930 A CN2009102158930 A CN 2009102158930A CN 200910215893 A CN200910215893 A CN 200910215893A CN 102118139 A CN102118139 A CN 102118139A
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Abstract
The invention discloses a method and a device for dealing with finite precision of a filter. The device comprises a filtering adjusting module, a shifting indicating module, and an effective bit width adjusting module, wherein the filtering adjusting module is used for filtering an output signal which is intercepted by an effective bit width and fed back by the effective bit width adjusting module, extracting the draw energies output by different frequency ranges, acquiring an error value according to the draw energies and an energy threshold, and sending the error value to the shifting indicating module; the shifting indicating module is used for comparing the error value with the preset energy threshold, adjusting an intercepting position of the effective bit width according to a comparison result, acquiring a new bit width intercepting mode and informing the effective bit width adjusting module of the new bit width intercepting mode; and the effective bit width adjusting module is used for intercepting a corresponding effective bit width from output signals of a to-be-adjusted filter according to the new bit width intercepting mode, and outputting and feeding back the corresponding effective bit width to the filtering adjusting module. By using the device provided by the invention, the system property is obviously increased and the signal to noise ratio of signal is obviously improved.
Description
Technical field
The present invention relates to field of mobile communication, be specifically related to the method that a kind of finite precision effect of tackling digital filter fixed-point number multiplication causes output signal-noise ratio to reduce.
Background technology
In current digital communication system such as CDMA (code division multiple access access), WIMAX (worldwide interoperability for microwave access), especially finite impulse response filter (FIR) is very extensive in the application that numeric field carries out the bandwidth extraction to use digital filter, this mainly comes from digital filter and realizes simple, and parameter change is more easy when realizing in programming device (but as on-site programmable gate array FPGA, can wipe editorial logic device EPLD), especially is fit to and the building of software radio system.
In the finite impulse response filter of more use, raising along with filter order, can introduce a large amount of multiply operations main fixed-point number multiplication that adopts in programming device, because the chip data bit wide of using in the actual system is limited, effective bit wide of general output signal that all can be last far below filter.For the correct chip that uses must intercept effective bit wide of the output signal of filter, the method of effective bit wide of the output signal of this artificial reduction filter will inevitably cause the reduction of filter output signal signal to noise ratio, and then influence the reduction of system sensitivity, reduce systematic function.
Cause the decline of Signal-to-Noise SNR reduction and systematic function at present for this finite precision effect owing to fixed-point processing, existing method mainly adopts by continuous experiment and chooses a kind of method of fixedly intercepting bit wide in the hope of satisfying system requirements, can not bring into play the maximum performance of system though the realization of this method is comparatively simple, and need through a large amount of experiments, in case experiment accurately causes the performance of system to meet the demands inadequately probably.
Summary of the invention
The technical problem to be solved in the present invention is to propose a kind of method and device of handling the finite precision effect of filter, has solved because the finite precision effect of fixed-point calculation causes the defective of Signal-to-Noise reduction, has improved the performance of communication system.
In order to solve the problems of the technologies described above, the invention provides a kind of device of handling the finite precision effect of filter, comprise: displacement indicating module, adjustment filtration module and effective bit wide adjusting module, wherein, described adjustment filtration module, the output signal that the effective bit wide of process that is used for that described effective bit wide adjusting module is fed back intercepts is carried out filtering, and extract the draw energy of different frequency range output, obtain error amount according to described draw energy and energy threshold, and issue described displacement indicating module; Described displacement indicating module is used for comparing according to the energy threshold of described error amount and setting, and according to the interception position that the result adjusts effective bit wide, obtains new bit wide intercepting pattern and notify described effective bit wide adjusting module; Described effective bit wide adjusting module is used for intercepting out from the output signal of described filter to be adjusted according to new bit wide intercepting pattern and effectively exports after the bit wide accordingly, and feeds back to described adjustment filtration module.
Further, described adjustment filtration module also comprises: error accumulation submodule, Error Calculation submodule and adjustment filtering submodule; Wherein, described adjustment filtering submodule, be used for that the output signal of the effective bit wide intercepting of process of described effective bit wide adjusting module feedback is sent into described adjustment filtering submodule in chronological order and carry out filtering, send into described Error Calculation submodule thereby dynamically adjust the draw energy that bandwidth parameter extracts different frequency range output; Described Error Calculation submodule is used for the described draw energy that will accumulate in the period and the energy threshold of presetting is poor, and difference is sent into described error accumulation submodule; Described error accumulation submodule is used for described difference fed back and obtains error amount after adding up, and issues described displacement indicating module.
Further, also comprise: effectively bit wide is adjusted the thresholding module, is used to the saltus step thresholding of bit wide intercepting pattern is set and export to described displacement indicating module, and the saltus step thresholding of described bit wide intercepting pattern comprises: energy Upper threshold and energy Lower Threshold; After also being used for intercepting out corresponding effectively bit wide from the output signal of described filter to be adjusted according to new bit wide intercepting pattern, picked up signal r*2^n, wherein, n is the integer-bit intercepting factor, r is the decimal place intercepting factor.
Further, described displacement indicating module, comprise: error intergal comparator and effective bit wide are provided with submodule, wherein, described error intergal comparator, be used for the error amount with the input of described error accumulation submodule, the saltus step thresholding of adjusting the bit wide intercepting pattern that the thresholding module is provided with described effective bit wide is relatively sent comparative result into described effective bit wide submodule is set respectively; Described effective bit wide is provided with submodule, is used for the interception position according to the effective bit wide of described comparative result adjustment, and the factor is 0 if described error amount, then is provided with the integer-bit intercepting on the described energy between the Lower Threshold, and the decimal place intercepting factor is constant; The factor is 1 if described error amount, then is provided with the integer-bit intercepting greater than described energy Upper threshold, and the decimal place intercepting factor is divided by 2; The factor is-1 if described error amount, then is provided with the integer-bit intercepting less than described energy Lower Threshold, and the decimal place intercepting factor multiply by 2.
Further, also comprise: select module the time of integration, be used for and offer described Error Calculation submodule, error accumulation submodule and displacement indicating module the corresponding time of integration, adopt the error amount after accumulate mode calculates the mode adjustment of bit wide intercepting each time.
In order to solve the problems of the technologies described above, the present invention also provides a kind of method of handling the finite precision effect of filter, comprising: obtain final output signal after intercepting out corresponding effectively bit wide according to current bit wide intercepting pattern from the output signal of filter to be adjusted; Carry out feedback processing according to described final output signal, described final output signal is carried out filtering, extract the draw energy of different frequency range output, and obtain error amount according to described draw energy and energy threshold; Saltus step thresholding according to described error amount and bit wide intercepting pattern compares, and adjust the interception position of effective bit wide according to the result, obtain new bit wide intercepting pattern, the output signal of described filter to be adjusted is carried out the intercepting of corresponding effectively bit wide according to new bit wide intercepting pattern.
Further, describedly carry out feedback processing according to described final output signal, described final output signal is carried out filtering, extract the draw energy of different frequency range output, and obtain the step of error amount according to described draw energy and energy threshold, comprise: described final output signal is carried out filtering in chronological order, thereby the bandwidth parameter when dynamically adjusting filtering extracts the draw energy of different frequency range output; The described draw energy that adds up in one period is poor with default energy threshold, described difference fed back obtain described error amount after adding up.
Further, the saltus step thresholding of described bit wide intercepting pattern comprises: energy Upper threshold and energy Lower Threshold; After the output signal of described filter to be adjusted carried out the intercepting of corresponding effectively bit wide, picked up signal r*2^n, wherein, n is the integer-bit intercepting factor, r is the decimal place intercepting factor.
Further, described error amount is compared with the saltus step thresholding of described bit wide intercepting pattern respectively, interception position according to the effective bit wide of comparative result adjustment, if described error amount is between described energy Upper threshold and energy Lower Threshold, it is 0 that the integer-bit intercepting factor then is set, and the decimal place intercepting factor is constant; The factor is 1 if described error amount, then is provided with the integer-bit intercepting greater than described energy Upper threshold, and the decimal place intercepting factor is divided by 2; The factor is-1 if described error amount, then is provided with the integer-bit intercepting less than described energy Lower Threshold, and the decimal place intercepting factor multiply by 2.
Further, described processing unit is selected the corresponding time of integration, and according to the error amount that adopts the described time of integration after accumulate mode obtains the mode adjustment of bit wide intercepting each time.
Useful technique effect of the present invention:
Compare with the existing fixing method that intercepts fixed-point calculation significance bits such as filter, the present invention can significantly improve the performance of system, obviously improves the signal to noise ratio of signal;
Owing to added the adjustment filtration module, can choose different filtering parameters according to the test result of different communication systems, from pretreated signal, take out corresponding bandwidth;
Because the transmission means of different communication system (as WIMAX, CDMA) systems is different with channel circumstance, can be by selecting different bandwidth, mini system will be stable more more for selected bandwidth, but will lose certain system sensitivity simultaneously, and bandwidth choose the output bandwidth that is limited to filter to be adjusted on big more, the sensitivity of system is good more, but the opposite while will be reduced certain stability of a system;
For the communication system of different application, need to determine a best relatively parameter by concrete experiment.
Description of drawings
Fig. 1 is the apparatus structure schematic diagram of the embodiment of the invention;
Fig. 2 is the displacement indicating module structural representation of the embodiment of the invention;
Fig. 3 is the frequency response schematic diagram of the adjustment filtration module of the embodiment of the invention.
Embodiment
Below will cooperate graphic and embodiment describes embodiments of the present invention in detail, by this to the present invention how the application technology means implementation procedure that solves technical problem and reach the technology effect can fully understand and implement according to this.
Core of the present invention is: processing unit obtains final output signal after intercepting out corresponding effectively bit wide according to current bit wide intercepting pattern from the output signal of filter to be adjusted; Carry out feedback processing according to described final output signal, described final output signal is carried out filtering, extract the draw energy of different frequency range output, and obtain error amount according to described draw energy and energy threshold; Saltus step thresholding according to described error amount and bit wide intercepting pattern compares, and adjust the interception position of effective bit wide according to the result, obtain new bit wide intercepting pattern, the output signal of described filter to be adjusted is carried out the intercepting of corresponding effectively bit wide according to new bit wide intercepting pattern.
The prime treatment system connects filter 101 to be adjusted, outputs signal to device of the present invention, and this is according to different communication system model differences, and this embodiment adopts the WIMAX system model; As shown in Figure 1, this device comprises:
One effective bit wide adjusting module 102, be used for output according to displacement indicating module 104, intercept out effective bit wide of system requirements from whole effectively bit wides of filter 101 outputs, the intercepting of significance bit comprises the intercepting of integer-bit and decimal place, and the result after the intercepting can represent y=r*2^n; Wherein, n is that the integer-bit intercepting factor and r are the decimal place intercepting factor;
One displacement indicating module 104, it is output as the interception position of bit wide, be input as the error amount of adjusting filtration module 109 outputs, whether decision changes selection to the active position of filter 101 outputs to displacement indicating module 104 according to the absolute value of described error amount: when the absolute value of error amount changes the interception position of significance bit during greater than the saltus step thresholding of the bit wide intercepting pattern that sets in advance, the interception position of output comprises integer-bit intercepting factor of n and decimal place intercepting factor r, 1＜r＜2 wherein, the value of exporting to effective bit wide adjusting module 102 by change realizes;
One adjusts filtration module 109, be used for effective bit wide that the filter to be adjusted 101 according to described effective bit wide adjusting module 102 outputs intercepts under current bit wide intercepting pattern, carry out filtering and extract the draw energy that different frequency range is exported, described draw energy and default energy threshold is poor, described difference fed back obtain error amount after adding up, and issue described displacement indicating module 104.
Adjust filtration module 109, can also specifically comprise:
One error accumulation submodule 105, the difference that the method that adopts feedback to add up is sent according to Error Calculation submodule 106 calculates error amount, and issues described displacement indicating module 104;
One Error Calculation submodule 106, by calculating under the current bit wide interception way, draw energy and default energy threshold that filtering submodule 107 exports in a period are poor with adjusting, and difference is sent into error accumulation submodule 105; The described period is the length time of integration of energy, and described default energy threshold is the standard energy value that system sets in advance, and is used for the error of calculation;
One adjusts filtering submodule 107, be input as effective bit wide that the filter to be adjusted 101 of effective bit wide adjusting module 102 outputs intercepts under current bit wide intercepting pattern, described effective bit wide serial in chronological order enters and adjusts filtering submodule 107 and carry out filtering (parameter of adjusting the filtering submodule can onlinely change), extract the draw energy of desired different frequency range output then, and send into Error Calculation submodule 106, so just reach the purpose of the sensitivity of regulating error energy calculating with the bandwidth change of adjusting filter.
When the expectation the stability of a system high more, obviously just need error insensitive to the signal of sudden change, promptly reduce system sensitivity, need only reduce to adjust the bandwidth of filter like this, leach the composition of relative high frequency in the error energy, make the calculating and follow-up only the adding up of error, by reducing filter bandwidht system is only worked to the DC component in the error under the extreme case the low frequency component sensitivity.
Device of the present invention also comprises:
One effective bit wide is adjusted thresholding module 103, when moving along with system, intercepting by continuous adjustment filter 101 effective bit wides, the error amount that the final error calculating sub module calculates should progressively level off to 0, in order further to reach the purpose of system stability, the saltus step thresholding that this module is provided with bit wide intercepting pattern (is traditionally arranged to be energy Upper threshold and Lower Threshold, these two thresholdings have determined that the bit wide intercepting is to the direction of data gain increasing or the direction adjustment that reduces to the data gain, concrete adjustment strategy can be with reference to down Fig. 2 and corresponding text description) and export to described displacement indicating module 104, this module will mask the adjustment greater than thresholding, reduced the fluctuation range of output intercepting, the stability of enhanced system;
Select module 108 one time of integration, after the adjustment of each effectively bit wide, will under new bit wide intercepting pattern, recomputate error energy, if fully cause misjudgement the time of integration inadequately easily to error amount, Error Calculation submodule 106, error accumulation submodule 105 and displacement indicating module 104 have all participated in the integral and calculating of error amount, therefore, select the time of integration module can select to guarantee the different times of integration Error Calculation submodule 106, the abundant calculating of the error energy after error accumulation submodule 105 and 104 pairs of bit wide interceptings each time of the displacement indicating module mode adjustment.
Below with reference to the function of above-mentioned two modules 103 and 108, elaborate the internal structure and the concrete function of displacement indicating module of the present invention.
Fig. 2 is displacement indicating module structural representation, comprising:
Two error intergal comparators 1041 are used for the error amount with error accumulation submodule 105 input, adjust on the energy that thresholding module 103 is provided with Lower Threshold with effective bit wide respectively and compare, and comparative result is sent into effective bit wide submodule is set;
Effectively bit wide is provided with submodule 1042, makes as judging: if the error accumulation result of error accumulation submodule 105 inputs is on the default energy between the Lower Threshold, then effectively bit wide the submodule output integer-bit intercepting factor is set is 0, the decimal place intercepting factor is constant; If the error accumulation result of error accumulation submodule 105 inputs is greater than default energy Upper threshold, it is 1 that then effective bit wide is provided with the submodule output integer-bit intercepting factor, and the decimal place intercepting factor is divided by 2; If the error accumulation result of error accumulation submodule 105 inputs is less than default energy Lower Threshold, it is-1 that then effective bit wide is provided with the submodule output integer-bit intercepting factor, and the decimal place intercepting factor multiply by 2; By this mediation process, system can level off to 0 at the error originated from input energy of displacement indicating module 104 after after a while, and the decimal place intercepting factor is＜1,2〉reach convergence state between; And
Error accumulation replacement submodule 1043, it is the part of the integration loop of error accumulation submodule 105 in actual applications, it is input as error accumulation submodule 105, and send result back to error accumulation submodule 105, judge and carry out bit wide when adjusting when effective bit wide is provided with submodule 1042, the integration of error accumulation submodule 105 is clear 0 before needing notice error accumulation submodule 105 that bit wide is adjusted, thereby the error of adjusting after the bit wide is recomputated.
Fig. 3 is for adjusting the frequency response of filtration module, and the filter that this embodiment adopts is finite impulse response (FIR) filter, and this adjustment filtration module suppresses to select the band component of the system that can be used for us to the frequency content that is higher than 2M.
Below specifically describe the present invention by a method embodiment.
The signal of prime treatment system simulation is through finite impulse response filter 101, the full accuracy data of output is sent into effective bit wide adjusting module 102, and full accuracy data is effectively being sent into adjustment filtering submodule 107 through the data after will being shifted after the shifting processing in the bit wide adjusting module 102;
The data that adjustment filtering submodule 107 is sent into effective bit wide adjusting module 102 use current parameter to carry out filtering, the draw energy of exporting after the filtering is sent into Error Calculation submodule 106,106 pairs of Error Calculation submodules from adjust 107 outputs of filtering submodule one fixedly the draw energy in the period carry out integration and add up, and the data after will adding up are subtracted each other with the energy threshold of presetting, obtain this fixedly interior difference of period, export to error accumulation submodule 105 afterwards;
The difference of in error accumulation submodule 105 Error Calculation submodule 106 being calculated adds up, and accumulation result sent into displacement indicating module 104, simultaneously significance bit is adjusted thresholding module 103 Lower Threshold on the energy of effective bit wide adjustment of Set For Current is sent into displacement indicating module 104;
The error amount that displacement indicating module 104 is sent into according to error accumulation submodule 105, integrating meter calculates whether intercepting to effective bit wide of current demand signal changes and whether this changes in effective bit wide and adjust thresholding module 103 desired energy up and down in the threshold range, if satisfying significance bit, the displacement that is calculated adjusts thresholding module 103 desired threshold ranges up and down, the intercepting factor adjustment intercepting bit wide of the effective bit wide of then corresponding change, and send into effective bit wide adjusting module 102, effectively bit wide adjusting module 102 comes effective bit wide of finite impulse response filter module 101 outputs is adjusted according to this intercepting bit wide.
Its functional description with aforesaid device is corresponding, and weak point is not given unnecessary details at this one by one with reference to the narration of said apparatus part.
The mode that method and apparatus of the present invention approaches by energy, the signal that effective bit wide of input filter is less improve the signal to noise ratio of signal by the mode that changes the significance bit intercepting; By signal is carried out filtering earlier, the component of relative high frequency in the filtered signal, the filter that parameters such as bandwidth are adjustable can be used communication system by the bandwidth of regulating filter and get durability requirements up to reaching; By using effective bit wide to adjust the thresholding module, avoided the situation of the error of signal in default energy threshold concussion, further improved the stability of system, can significantly improve the dynamic range of institute's application system.
Above-mentioned explanation illustrates and has described a preferred embodiment of the present invention, but as previously mentioned, be to be understood that the present invention is not limited to the disclosed form of this paper, should not regard eliminating as to other embodiment, and can be used for various other combinations, modification and environment, and can in invention contemplated scope described herein, change by the technology or the knowledge of above-mentioned instruction or association area.And change that those skilled in the art carried out and variation do not break away from the spirit and scope of the present invention, then all should be in the protection range of claims of the present invention.
Claims (10)
1. a device of handling the finite precision effect of filter is characterized in that, comprising: displacement indicating module, adjustment filtration module and effective bit wide adjusting module, wherein,
Described adjustment filtration module, the output signal that the effective bit wide of process that is used for that described effective bit wide adjusting module is fed back intercepts is carried out filtering, and extract the draw energy of different frequency range output, obtain error amount according to described draw energy and the energy threshold of presetting, and issue described displacement indicating module;
Described displacement indicating module is used for comparing according to the saltus step thresholding of described error amount and bit wide intercepting pattern, and according to the interception position that the result adjusts effective bit wide, obtains bit wide intercepting pattern and notify described effective bit wide adjusting module;
Described effective bit wide adjusting module is used for intercepting out from the output signal of filter to be adjusted according to described bit wide intercepting pattern and effectively exports after the bit wide accordingly, and feeds back to described adjustment filtration module.
2. device as claimed in claim 1 is characterized in that, described adjustment filtration module also comprises: error accumulation submodule, Error Calculation submodule and adjustment filtering submodule, wherein,
Described adjustment filtering submodule, be used for that the output signal of the effective bit wide intercepting of process of described effective bit wide adjusting module feedback is sent into described adjustment filtering submodule in chronological order and carry out filtering, send into described Error Calculation submodule thereby dynamically adjust the draw energy that bandwidth parameter extracts different frequency range output;
Described Error Calculation submodule is used for the described draw energy that will accumulate in the period and the energy threshold of presetting is poor, and difference is sent into described error accumulation submodule;
Described error accumulation submodule is used for described difference fed back and obtains error amount after adding up, and issues described displacement indicating module.
3. device as claimed in claim 2 is characterized in that, also comprises:
Effectively bit wide is adjusted the thresholding module, is used to the saltus step thresholding of described bit wide intercepting pattern is set and export to described displacement indicating module, and the saltus step thresholding of described bit wide intercepting pattern comprises: energy Upper threshold and energy Lower Threshold; After also being used for intercepting out corresponding effectively bit wide according to new bit wide intercepting pattern from the output signal of described filter to be adjusted, the signal of acquisition equals the product of n power of r and 2, and wherein, n is that integer-bit intercepts the factor, and r is that decimal place intercepts the factor.
4. device as claimed in claim 3 is characterized in that, described displacement indicating module comprises: error intergal comparator and effective bit wide are provided with submodule, wherein,
Described error intergal comparator is used for the error amount with the input of described error accumulation submodule, and the saltus step thresholding of adjusting the bit wide intercepting pattern that the thresholding module is provided with described effective bit wide is relatively sent comparative result into described effective bit wide submodule is set respectively;
Described effective bit wide is provided with submodule, is used for the interception position according to the effective bit wide of described comparative result adjustment, and the factor is 0 if described error amount, then is provided with the integer-bit intercepting on the described energy between the Lower Threshold, and the decimal place intercepting factor is constant; The factor is 1 if described error amount, then is provided with the integer-bit intercepting greater than described energy Upper threshold, and the decimal place intercepting factor is divided by 2; The factor is-1 if described error amount, then is provided with the integer-bit intercepting less than described energy Lower Threshold, and the decimal place intercepting factor multiply by 2.
5. device as claimed in claim 2 is characterized in that, also comprises:
Select module the time of integration, be used for and offer described Error Calculation submodule, error accumulation submodule and displacement indicating module the corresponding time of integration, adopt the error amount after accumulate mode calculates the mode adjustment of bit wide intercepting each time.
6. a method of handling the finite precision effect of filter is characterized in that, comprising:
According to current bit wide intercepting pattern the output signal of filter to be adjusted is carried out the intercepting of corresponding effectively bit wide, obtain final output signal;
Carry out feedback processing according to described final output signal, described final output signal is carried out filtering, extract the draw energy of different frequency range output, and obtain error amount according to described draw energy and the energy threshold of presetting;
Saltus step thresholding according to described error amount and bit wide intercepting pattern compares, and adjust the interception position of effective bit wide according to the result, obtain new bit wide intercepting pattern and replace current bit wide intercepting pattern, the output signal of described filter to be adjusted is carried out the intercepting of corresponding effectively bit wide according to new bit wide intercepting pattern.
7. method as claimed in claim 6, it is characterized in that, describedly carry out feedback processing according to described final output signal, described final output signal is carried out filtering, extract the draw energy of different frequency range output, and obtain the step of error amount according to described draw energy and energy threshold, further comprise:
Described final output signal is carried out filtering in chronological order, thereby the bandwidth parameter when dynamically adjusting filtering extracts the draw energy of different frequency range output;
The described draw energy that adds up in one period is poor with default energy threshold, described difference fed back obtain described error amount after adding up.
8. method as claimed in claim 6 is characterized in that,
The saltus step thresholding of described bit wide intercepting pattern comprises: energy Upper threshold and energy Lower Threshold;
After the output signal of described filter to be adjusted carried out the intercepting of corresponding effectively bit wide, the signal of acquisition equaled the product of n power of r and 2, and wherein, n is that integer-bit intercepts the factor, and r is that decimal place intercepts the factor.
9. method as claimed in claim 8 is characterized in that,
Described error amount is compared with the saltus step thresholding of described bit wide intercepting pattern respectively, interception position according to the effective bit wide of comparative result adjustment, the factor is 0 if described error amount between described energy Upper threshold and energy Lower Threshold, then is provided with the integer-bit intercepting, and the decimal place intercepting factor is constant; The factor is 1 if described error amount, then is provided with the integer-bit intercepting greater than described energy Upper threshold, and the decimal place intercepting factor is divided by 2; The factor is-1 if described error amount, then is provided with the integer-bit intercepting less than described energy Lower Threshold, and the decimal place intercepting factor multiply by 2.
10. method as claimed in claim 8 is characterized in that,
Described processing unit is selected the corresponding time of integration, and according to the error amount that adopts the described time of integration after accumulate mode obtains the mode adjustment of bit wide intercepting each time.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104580045A (en) * | 2013-10-21 | 2015-04-29 | 北京信威通信技术股份有限公司 | Bit shifting method for soft decoder |
| CN105468919A (en) * | 2015-12-04 | 2016-04-06 | 中国电子科技集团公司第五十研究所 | Digital signal data bit wide intercepting method |
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| US5777914A (en) * | 1996-08-29 | 1998-07-07 | Lucent Technologies Inc. | Technique for reducing power consumption in digital filters |
| CN1588930A (en) * | 2004-08-02 | 2005-03-02 | 北京天碁科技有限公司 | Controlling device for digital pulse formed filter output gain |
| WO2006054861A1 (en) * | 2004-11-16 | 2006-05-26 | Samsung Electronics Co., Ltd. | Apparatus and method for processing digital signal in an ofdma wireless communication system |
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| US5777914A (en) * | 1996-08-29 | 1998-07-07 | Lucent Technologies Inc. | Technique for reducing power consumption in digital filters |
| CN1588930A (en) * | 2004-08-02 | 2005-03-02 | 北京天碁科技有限公司 | Controlling device for digital pulse formed filter output gain |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104580045A (en) * | 2013-10-21 | 2015-04-29 | 北京信威通信技术股份有限公司 | Bit shifting method for soft decoder |
| CN104580045B (en) * | 2013-10-21 | 2018-03-09 | 北京信威通信技术股份有限公司 | A kind of bit shift method for soft decoder |
| CN105468919A (en) * | 2015-12-04 | 2016-04-06 | 中国电子科技集团公司第五十研究所 | Digital signal data bit wide intercepting method |
| CN105468919B (en) * | 2015-12-04 | 2019-01-08 | 中国电子科技集团公司第五十研究所 | Digital signal data bit wide cut position method |
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| CN102118139B (en) | 2014-03-19 |
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