CN1578130A - Crystal oscillator - Google Patents

Crystal oscillator Download PDF

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Publication number
CN1578130A
CN1578130A CNA200410045339XA CN200410045339A CN1578130A CN 1578130 A CN1578130 A CN 1578130A CN A200410045339X A CNA200410045339X A CN A200410045339XA CN 200410045339 A CN200410045339 A CN 200410045339A CN 1578130 A CN1578130 A CN 1578130A
Authority
CN
China
Prior art keywords
chip
crystal
crystal oscillator
package
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA200410045339XA
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Chinese (zh)
Other versions
CN100571029C (en
Inventor
郑赞榕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electro Mechanics Co Ltd
Original Assignee
Samsung Electro Mechanics Co Ltd
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Filing date
Publication date
Application filed by Samsung Electro Mechanics Co Ltd filed Critical Samsung Electro Mechanics Co Ltd
Publication of CN1578130A publication Critical patent/CN1578130A/en
Application granted granted Critical
Publication of CN100571029C publication Critical patent/CN100571029C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/19Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator consisting of quartz
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/30Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
    • H03B5/32Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
    • H03B5/36Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/0504Holders; Supports for bulk acoustic wave devices
    • H03H9/0514Holders; Supports for bulk acoustic wave devices consisting of mounting pads or bumps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Oscillators With Electromechanical Resonators (AREA)

Abstract

The invention discloses a crystal oscillator with a crystal board and an integrated circuit (IC) chip, comprising a crystal package with the crystal board and a chip package with a plurality of ceramic layers piled up in sequence to form the cavity for the IC chip. The crystal package is arranged above the chip package. The cavity of the chip package comprises a pair of opposite outer sidewalls of terminal which is connected with the outer terminal of the crystal package and a groove which forms between the two opposite outer sidewalls and has openings on the opposite sides; wherein the groove is filled with molding material to form the molding part. The outer sidewalls of the chip package with IC chip can be partly replaced by molding material to reduce the size of the product. Meanwhile, enough space is guaranteed to hold the IC chip no matter how small the product is.

Description

Crystal oscillator
Technical field
The present invention relates to crystal oscillator, be particularly related to such crystal oscillator, wherein partly replace the lateral wall of the Chip Packaging that integrated circuit (IC) chip is installed with moulding compound, dwindle the size of product, no matter the miniaturization of described product can guarantee that enough spaces hold described IC chip simultaneously.
Background technology
Usually, crystal oscillator wherein includes the IC chip according to piezoelectricity and discrete component oscillating crystal as the device that generates vibration frequency.
Such oscillator is used in the oscillating circuit of computer and communication equipment, because they can produce stable frequency.More senior oscillator such as voltage controlled crystal oscillator (VCXOs), temperature compensating crystal oscillator (TCXOs) and thermostatic control crystal oscillator (OCXOs) can be adjusted frequency more accurately, thereby are used as core component, as the standard of all signals.
Recently, according to the development of information communication and digital technology, the user is increasing the demand of element, module and the circuit board of high data processing speed and advanced material.Particularly, require crystal oscillator to have small size, high integrated and high-frequency structure along with the become miniaturization more and be used in multiband high-frequency environment of mobile communication element.
The size of such crystal oscillator mainly is 0.024CC (5.0mm (L) * 3.2mm (W) * 1.5mm (T)).Along with the quickening of miniaturization of components, 0.008CC that reduces on length, width and thickness (3.2mm (L) * 2.5mm (W) * 1.0mm (T)) and 0.005CC (2.5mm (L) * 2.0mm (W) * 1.0mm (T)) yardstick will be widely used.For this purpose, realize the Bao Qinghua of miniaturization, manufacturing process innovation and the structure of crystal oscillator element.
Fig. 1 is the perspective view of a common crystal oscillator.As shown in Figure 1, traditional crystal oscillator 100 belongs to a kind of dual structure, crystal package 110 and Chip Packaging 120 are vertically connected on together, constitute an obturator, wherein crystal package 110 comprises the crystal slab that causes vibration, Chip Packaging comprises integrated circuit (IC) chip I that has various circuit, as oscillating circuit and integrated therein memory.By combining, crystal oscillator 100 is assembled into complete unit through crystal package 110 and the Chip Packaging 120 that separately process and assembly line separately are made into.
Crystal package 110 comprises pottery version 113, first ceramic layer 111 that wherein has rectangular frame shape, form the circuitous pattern (not shown) at the top, and second ceramic layer 112, overlay on first ceramic layer 111, crystal slab is arranged in the inner space of ceramic wafer 113, and lid 115 is used to seal described inner space.
Chip Packaging 120 comprises ceramic wafer 124, ceramic wafer 124 has first ceramic layer 121, form the circuitous pattern (not shown) at the top, and the second and the 3rd ceramic layer 122 and 123, overlay on first ceramic layer 121 along the periphery, a plurality of outside input/output terminals 128 form at the lateral parts of ceramic layer 124, and the IC chip I is fixedly attached on first ceramic layer 121.
Like this, the IC chip I is installed on the Chip Packaging 120 according to following processes together with the circuit that is integrated in wherein: at first, on the projection 122a of second ceramic layer 122, form a plurality of pads 125, when second ceramic layer, 122 vertical pile were between first ceramic layer 121 and the 3rd ceramic layer 123, it formed inside step.Then, lead at one end is electrically connected on the pad 126a on the IC chip I that is installed on first ceramic layer 121, on the other end is electrically connected to connection pads 125 on second ceramic layer 122.
Have in the traditional crystal oscillator 100 of said structure, form cavity by the lateral wall along X-axis and Y-axis sealing, the IC chip I can be installed in the Chip Packaging 120 like this.For this reason, the lateral wall that constitutes the ceramic wafer 124 of described cavity will guarantee the thickness of 0.3mm at least.
In the miniaturization Design of the crystal oscillator of the above-mentioned type, scaled IC chip is wanted in the miniaturization of crystal oscillator.But the IC chip can only dwindle limitedly, because of it comprises various circuit and the memory that is integrated in wherein.Also have a problem,, may cause fault if too dwindle the IC chip.
Summary of the invention
The problems referred to above in the technology before solving have proposed the present invention.Therefore, an object of the present invention is to provide a kind of crystal oscillator, can partly replace the lateral wall of the Chip Packaging that integrated circuit (IC) chip wherein is installed with moulding compound, so that dwindle product, simultaneously no matter the miniaturization of this product can guarantee that enough spaces hold described IC chip.
According to an aspect of the present invention, provide a kind of crystal oscillator with crystal slab and integrated circuit (IC) chip, comprise: crystal package wherein is equipped with crystal slab; Chip Packaging, have a plurality of ceramic layers, stack successively, formation can be installed the cavity of described IC chip therein, described crystal package is positioned on the Chip Packaging as top, the cavity of described Chip Packaging comprises the recess space between a pair of opposite external side wall and the described relative lateral wall, described lateral wall has the terminal that is connected with the terminal of outside described crystal package, described groove is at the two sides opening perpendicular to the direction of described relative lateral wall, and fills moulding compound and form molding portion.
Described IC chip preferably upside-down mounting connects (flip-chip) in described cavity bottom.
Described IC chip preferably has identical substantially size with described molding portion.
Preferably, described molding portion has two opposite flanks, is arranged in the vertical plane identical with the outer surface of described Chip Packaging.
The top of described molding portion and described lateral wall evenly forms.
Each lateral wall preferably forms an input/output terminal at least at its outer surface.
Description of drawings
Detailed description below in conjunction with accompanying drawing can make of the present invention above-mentioned more clear with other purposes, feature and other advantages.These accompanying drawings comprise:
Fig. 1 is the perspective view of common crystal oscillator.
Fig. 2 is the plane graph according to the Chip Packaging of crystal oscillator of the present invention.
Fig. 3 is the bottom view according to the Chip Packaging of crystal oscillator of the present invention.
Fig. 4 is the decomposition diagram according to crystal oscillator of the present invention; And
Fig. 5 A and Fig. 5 B be according to crystal oscillator of the present invention the top view and the side view of the package panel that is used for manufacturing process (package sheet).
Embodiment
Describe the preferred embodiments of the present invention with reference to the accompanying drawings in detail.
Fig. 2 is the plane graph according to the Chip Packaging of crystal oscillator of the present invention, and Fig. 3 is the bottom view according to the Chip Packaging of crystal oscillator of the present invention, and Fig. 4 is the decomposition diagram of crystal oscillator of the present invention.
Extremely shown in Figure 4 as Fig. 2, crystal oscillator 1 of the present invention is the lateral wall that will partly replace the cavity 20a that is used to install integrated circuit (IC) chip I with moulding compound, promoting the miniaturization of described crystal oscillator, but do not make the volume-diminished of IC chip I because of miniaturization Design.Described crystal oscillator 1 comprises crystal package 10, Chip Packaging 20 and groove 25.
Be appreciated that according to the structure of crystal oscillator 1 of the present invention and can select to be used for voltage controlled crystal oscillator (VCXOs), temperature compensating crystal oscillator (TCXOs) and thermostatic control crystal oscillator (OCXOs).
Crystal package 10 comprises ceramic wafer 13 and lid 14, and ceramic wafer 13 has the interior space of the depression of preliminary dimension, is used for installing therein the rectangular crystal plate, and lid 14 is used for covering ceramic wafer 13.
Ceramic wafer 13 comprises: first ceramic layer 11 of rectangular frame shape, and its top is printed on circuitous pattern; Second ceramic layer 12 of rectangular frame shape is laminated between the ceramic wafer 13 and first ceramic layer along the periphery of ceramic wafer 13.Lid 14 is connected to the top of ceramic wafer 13, the inner space that described crystal slab is held in complete from the outside capping.
Chip Packaging 20 comprises ceramic wafer 24, and ceramic wafer 24 has the recessed cavity 20a of preliminary dimension, so that installed various circuit integrated and the IC chip of memory in cavity 20a.Ceramic wafer 24 comprises first ceramic layer 21 and 22 of rectangular frame shape, is printed on circuitous pattern 22a at the top, also comprises second ceramic layer 23, overlays on first ceramic layer 21 and 22 along two relative edge, forms two opposite external side wall 23a and 23b.
At this, there are a plurality of splicing ears 27 to form at the top of opposite external side wall 23a and 23b, is electrically connected with the outside terminal that below crystal package 10, forms, and is electrically connected with circuitous pattern 22a in the formation of the top of first ceramic layer 22.
In addition, the cavity 20a of Chip Packaging 20 is limited in the groove 25, and groove 25 forms between two opposite external side wall 23a and 23b, and two sides opening is outwards arranged.In groove 25, by in groove, filling moulding compound,, form molding portion 26 as epoxy resin, be used to protect the IC chip I that is installed on first ceramic layer 22.
The IC chip I can be connected on first ceramic layer 22 by the flip chip bonding connection technology, promptly be installed on first ceramic layer 22: at first, on the terminal electrode of the circuitous pattern 22a on second ceramic layer 22, form terminal pad respectively according to following flip-chip connection mode.Next step, directly to pressing down the IC chip I, the bittiness 22b of IC chip I pad that forms below and the metal bump that is positioned at terminal pad contacts simultaneously with predetermined pressure.Then, the thermal source by about 300 degree solidifies the bittiness 22a of metal bump with the ultrasonic wave that is no more than 2 watts of 230 megaseconds.In addition, also can the IC chip I be installed according to the wire-bonded pattern, form the stairstepping projection within the lateral wall 23a of cavity 20a and 23b, an end of lead is electrically connected to the pad that forms on the described projection then, and lead end in addition is electrically connected to the terminal pad that the top of IC chip I forms.
The size that is installed in the IC chip I among the cavity 20a is identical substantially with width with the size of molding portion 26 with width, and two of the IC chip I opposite sides can extend to and the adjoining place of the open sides of groove 25 like this.
Two opposite sides of molding portion 26 preferably are arranged on the vertical plane identical with the outer surface of Chip Packaging 20, and they are not protruded into outside it.
Concordant by the molding portion 26 of in cavity 20a, filling moulding compound formation with the top of lateral wall 23a and 23b, like this, when the IC chip I is installed among the cavity 20a, just can not be exposed to the outside.
Simultaneously, lateral wall 23a and the 23b of cavity 20a will cave in inwards, form terminal groove (terminal recesse), utilize conductive electrode to constitute a plurality of input/output terminals 28 that are electrically connected to described circuitous pattern.Input/output terminal 28 can comprise data I/O (DIO) terminal, chip selection (CS) terminal, public (UTIL) terminal and continuous clock (SCLK) terminal.
Downside at nethermost first ceramic layer 21 of Chip Packaging 20 provides a plurality of outside terminal 21a, like this, when crystal oscillator 1 is assembled into complete unit, can be connected on the terminal electrode of the graphics circuitry of printing on the mainboard (not shown).
By vertically in conjunction with the crystal package 10 that crystal slab wherein is installed as top and the Chip Packaging 20 that the IC chip I wherein is installed as the bottom, the crystal oscillator of said structure is assembled into a unit.In crystal package 10, second ceramic layer 112 overlays on first ceramic layer 111 in such a manner: align in the limit corresponding with second ceramic layer 112, four limits of first ceramic layer 111, constitute ceramic wafer 13 with interior space, in described, arrange crystal slab in the space, and seal the top of ceramic wafers 13 with lid 14.
The Chip Packaging 10 of said structure is constructed by the following process according to Fig. 5 A and Fig. 5 B explanation: at first, two potsherd G1 and G2, being printed with circuitous pattern 22a and following formation outside terminal 21a first ceramic layer 21 and 22, one of second ceramic layers above the formation overlays on another.The potsherd G3 of a plurality of elongations overlays on the second potsherd G2 with predetermined horizontal interval, forms lateral wall facing each other.Then, potsherd G3 is connected to the second potsherd G2, forms the package panel G that is cut into a plurality of Chip Packaging 20 with array format.
Like this, passage 30 forms between the 3rd adjacent potsherd G3, and passage 30 is flatly opened in the drawings, and recessed by desired depth, and the IC chip I is connected the bottom of passage 30 respectively with predetermined space.
The passage 30 that the IC chip I is installed is filled out with moulding compound, and as epoxy resin, and the process scheduled time is aging to solidify the moulding compound of being filled.After moulding compound solidified, package panel G cut along empty line of cut S1 of vertical and level and the S2 that package panel G goes up picture with laser or blade, thereby produces a plurality of Chip Packaging 20.Each Chip Packaging 20 has the molding portion 26 around the IC chip I that forms in the groove 25 between lateral wall 23a and 23b.
Before empty line of cut S1 and S2 cutting package panel G, form the through hole (not shown) with predetermined gap along the empty line of cut S1 on the center line that is drawn in the 3rd potsherd G3.Then, when the empty line of cut along the center of passing through hole cut, the 3rd potsherd G3 had the termination recess of input/output terminal 28.
And corresponding to the outside terminal that forms below crystal package 10, splicing ear 27 is formed on along the top of the 3rd potsherd G3 of dotted line S1 cutting.
Then, crystal package 10 finally constitutes crystal oscillator 1 in the following manner with Chip Packaging 20: the following outside terminal by being connected crystal package 10 and the splicing ear at Chip Packaging 20 tops make each combine with Chip Packaging 20 as the bottom as the crystal package 10 on top.
According to the present invention recited above; described relative lateral wall and between lateral wall, have the groove of the side of two relative openings to form the cavity hold the IC chip; its further groove will be filled the moulding compound that protection IC chip is avoided external environment influence; form molding portion, the lateral wall that holds the cavity of IC chip like this can partly replace with molding.Like this, product is dwindled, unless hold undue little of the cavity of IC chip.
Illustrated and illustrated the present invention by preferred embodiment, those of ordinary skill in the art can understand, and in the defined spirit and scope, can do change and variation to the present invention in not breaking away from claims of the present invention.

Claims (6)

1. crystal oscillator with crystal slab and integrated circuit (IC) chip comprises:
Crystal package wherein is equipped with crystal slab; And
Chip Packaging has a plurality of ceramic layers, stacks successively, is formed on the cavity that described IC chip wherein is installed, and described crystal package is placed on the described Chip Packaging as top,
The cavity of wherein said Chip Packaging comprises a pair of relative lateral wall with the terminal that is connected with the outside terminal of described crystal package, and formed recess space between the described opposite external side wall, described groove perpendicular to the both sides of the direction of described relative lateral wall by opening, and, form molding portion with the moulding compound filling.
2. crystal oscillator as claimed in claim 1, wherein, described IC chip is connected to the bottom of described cavity by upside-down mounting.
3. crystal oscillator as claimed in claim 1, wherein, described IC chip has size and the width identical substantially with described molding portion.
4. crystal oscillator as claimed in claim 1, wherein, described molding portion has two relative sides, is arranged on the vertical plane identical with the outer surface of described Chip Packaging.
5. crystal oscillator as claimed in claim 1, wherein, the top of described molding portion and described lateral wall evenly forms.
6. crystal oscillator as claimed in claim 1 wherein, on each described lateral wall, has at least an input/output terminal to form on its outer surface.
CNB200410045339XA 2003-06-25 2004-05-24 Crystal oscillator Expired - Fee Related CN100571029C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2003-0041385A KR100489833B1 (en) 2003-06-25 2003-06-25 A crystal oscillator
KR41385/2003 2003-06-25

Publications (2)

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CN1578130A true CN1578130A (en) 2005-02-09
CN100571029C CN100571029C (en) 2009-12-16

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CN (1) CN100571029C (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102064789A (en) * 2009-11-11 2011-05-18 日本电波工业株式会社 Surface mount crystal oscillator and manufacturing method of the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116647206B (en) * 2023-07-27 2023-09-26 北京炬玄智能科技有限公司 Crystal oscillator and chip stacked package miniaturized substrate packaging structure and processing technology

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102064789A (en) * 2009-11-11 2011-05-18 日本电波工业株式会社 Surface mount crystal oscillator and manufacturing method of the same
CN102064789B (en) * 2009-11-11 2013-10-30 日本电波工业株式会社 Surface mount crystal oscillator and manufacturing method of same

Also Published As

Publication number Publication date
KR100489833B1 (en) 2005-05-16
KR20050000832A (en) 2005-01-06
CN100571029C (en) 2009-12-16

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Granted publication date: 20091216

Termination date: 20110524