CN116647206B - Crystal oscillator and chip stacked package miniaturized substrate packaging structure and processing technology - Google Patents
Crystal oscillator and chip stacked package miniaturized substrate packaging structure and processing technology Download PDFInfo
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- CN116647206B CN116647206B CN202310928264.2A CN202310928264A CN116647206B CN 116647206 B CN116647206 B CN 116647206B CN 202310928264 A CN202310928264 A CN 202310928264A CN 116647206 B CN116647206 B CN 116647206B
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- 239000013078 crystal Substances 0.000 title claims abstract description 195
- 239000000758 substrate Substances 0.000 title claims abstract description 140
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 24
- 238000012545 processing Methods 0.000 title claims abstract description 18
- 238000005516 engineering process Methods 0.000 title claims abstract description 15
- 239000010410 layer Substances 0.000 claims abstract description 45
- 239000004065 semiconductor Substances 0.000 claims abstract description 33
- 238000003466 welding Methods 0.000 claims abstract description 32
- 239000012790 adhesive layer Substances 0.000 claims abstract description 19
- 238000002955 isolation Methods 0.000 claims description 79
- 239000003292 glue Substances 0.000 claims description 47
- 238000001746 injection moulding Methods 0.000 claims description 44
- 238000005476 soldering Methods 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 24
- 239000005022 packaging material Substances 0.000 claims description 12
- 230000001680 brushing effect Effects 0.000 claims description 11
- 238000007789 sealing Methods 0.000 claims description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 238000012858 packaging process Methods 0.000 abstract description 7
- 229910000679 solder Inorganic materials 0.000 description 23
- 239000012778 molding material Substances 0.000 description 21
- 239000000463 material Substances 0.000 description 15
- 239000000243 solution Substances 0.000 description 13
- 230000032798 delamination Effects 0.000 description 9
- 238000000465 moulding Methods 0.000 description 9
- 239000000853 adhesive Substances 0.000 description 7
- 230000001070 adhesive effect Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 238000003825 pressing Methods 0.000 description 4
- 238000007711 solidification Methods 0.000 description 4
- 230000008023 solidification Effects 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000005336 cracking Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000001125 extrusion Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/0538—Constructional combinations of supports or holders with electromechanical or other electronic elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
Landscapes
- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Oscillators With Electromechanical Resonators (AREA)
Abstract
The embodiment of the application discloses a miniaturized substrate packaging structure for crystal oscillator and chip stack packaging and a processing technology, wherein the miniaturized substrate packaging structure for crystal oscillator and chip stack packaging comprises a substrate, a crystal oscillator, an adhesive layer and a chip, wherein the crystal oscillator is welded with the substrate through the first welding layer and the second welding layer, is adhered with the substrate through the adhesive layer, and is arranged on the crystal oscillator, and the crystal oscillator and the chip are stacked together through the packaging structure provided by the embodiment of the application, so that the size of a plastic package body for packaging a semiconductor device is close to the area ratio of the crystal oscillator to the chip, namely, the area ratio of the chip is 1:1, the product miniaturization requirement is met, and meanwhile, the problems of layering, warping and the like caused by expansion coefficients of different components and parts in the plastic packaging process are solved.
Description
Technical Field
The embodiment of the application relates to the technical field of semiconductor integrated circuits, in particular to a miniaturized substrate packaging structure for crystal oscillator and chip stack encapsulation and a processing technology.
Background
Along with the development of miniaturization of equipment, consumer classes represented by mobile phones and watches, industrial classes represented by base stations and servers are more and more urgent in demand for miniaturization, a crystal oscillator is used as a frequency output end, the crystal oscillator is externally arranged and a chip is welded on a PCB, the size and the area of the PCB are greatly occupied, and semiconductor devices are easily layered and warped due to different expansion coefficients of different components and plastic packaging materials in the plastic packaging process.
Disclosure of Invention
The present application aims to solve at least one of the technical problems existing in the prior art or related art.
To this end, a first aspect of the present application provides a miniaturized substrate package structure for stacking crystal oscillator and chip.
A second aspect of the application provides a process.
In view of the above, a first aspect of the embodiments of the present application provides a miniaturized substrate package structure for stacking a crystal oscillator and a chip, comprising:
a substrate on which a first and a second soldering layer are formed to be arranged at intervals;
the crystal oscillator is connected to the substrate through the first welding layer and the second welding layer;
the bonding layer is positioned between the first welding layer and the second welding layer and is connected with the substrate and the crystal oscillator;
and the chip is arranged on the crystal oscillator.
In one possible embodiment, the miniaturized substrate packaging structure for stacking and sealing the crystal oscillator and the chip further comprises:
isolation buffer blocks, which are arranged at two sides of the crystal oscillator;
the plastic package body covers the substrate and coats the isolation buffer block and the crystal oscillator;
the substrate is provided with a groove, and the isolation buffer block is arranged in the groove.
In a possible implementation manner, the height of the isolation buffer block is higher than that of the crystal oscillator, and the height difference is 20um to 30um;
the distance between the isolation buffer block and the crystal oscillator is 50um to 100um.
In a possible embodiment, the expansion coefficient of the chip is 4.2X10 -6 At a temperature of from/DEG C to 4.7X10 -6 The expansion coefficient of the crystal oscillator is 5.5X10 DEG C -6 Per DEG C to 6.0X10 -6 The expansion coefficient of the isolation buffer block is 25×10 -6 Per DEG C to 30X 10 -6 The expansion coefficient of the plastic package body is 25 multiplied by 10 -6 Per DEG C to 30X 10 -6 The expansion coefficient of the substrate is 11 multiplied by 10 -6 Per DEG C to 16X 10 -6 /℃。
In one possible embodiment, the miniaturized substrate packaging structure for stacking and sealing the crystal oscillator and the chip further comprises:
the insulating adhesive layer is arranged between the chip and the crystal oscillator;
and the bonding wire is connected with the chip and the substrate.
According to a second aspect of the embodiments of the present application, a processing technology is provided for manufacturing the miniaturized substrate packaging structure for stacking and sealing the crystal oscillator and the chip according to any one of the above technical solutions, where the processing technology includes:
setting insulating glue on the substrate;
brushing soldering paste on two sides of the insulating glue, wherein the brushing height of the soldering paste is higher than that of the insulating glue;
the crystal oscillator is connected to the substrate through the soldering paste, the soldering paste forms the first welding layer and the second welding layer, and the crystal oscillator extrudes the insulating glue so that the insulating glue fills a gap between the crystal oscillator and the substrate;
and forming an insulating adhesive layer on one side of the crystal oscillator, which is far away from the substrate, and arranging the chip on the insulating adhesive layer.
In one possible embodiment, the process further comprises:
forming isolation buffer blocks on two sides of the crystal oscillator;
supplying plastic packaging material to the substrate in a first direction for pre-injection molding;
bonding wires to the substrate and the chip.
In one possible embodiment, the process further comprises:
and arranging the bonded semiconductor device in an injection molding machine, and supplying plastic packaging material to the substrate in a second direction for secondary injection molding.
In a possible embodiment, the difference between the brush height of the solder paste and the height of the insulating paste is 5um to 15um;
the height of the isolation buffer block is higher than that of the crystal oscillator, and the height difference is 20-30 um;
the distance between the isolation buffer block and the crystal oscillator is 50um to 100um;
the volume of the insulating glue on the substrate is used for filling the cavity area at the bottom of the whole crystal oscillator.
In a possible embodiment, before the step of disposing the insulating glue on the substrate, the method further includes:
baking the substrate to remove part of water vapor of the substrate;
the processing technology further comprises the following steps: and baking the semiconductor device after injection molding to eliminate the internal stress of the semiconductor device.
Compared with the prior art, the application at least comprises the following beneficial effects:
the semiconductor device provided by the embodiment of the application comprises the substrate, the crystal oscillator, the bonding layer and the chip, wherein the crystal oscillator is welded with the substrate through the first welding layer and the second welding layer, the bonding layer is used for bonding with the substrate, and the chip is arranged on the crystal oscillator, and the crystal oscillator and the chip of the semiconductor device provided by the embodiment of the application are stacked together, so that the size of a plastic package body for packaging the semiconductor device is close to the area ratio of the crystal oscillator to the chip, namely, the area ratio of the chip is 1:1, the product miniaturization requirement is met, and meanwhile, the problems of layering, warping and the like caused by different components in the plastic packaging process and expansion coefficient differences of plastic packaging materials are solved. According to the semiconductor device provided by the embodiment of the application, in the packaging process, the insulating adhesive is firstly arranged on the substrate, the soldering paste is arranged on the two sides of the insulating adhesive, then the crystal oscillator is connected with the substrate through the soldering paste, the first welding layer and the second welding layer can be formed by solidifying the soldering paste, a cavity is formed between the crystal oscillator and the substrate in the solidifying process of the soldering paste, the crystal oscillator extrudes the insulating adhesive along with the downward pressing of the crystal oscillator, and the insulating adhesive after extrusion can be filled in a gap between the crystal oscillator and the substrate, so that the crystal oscillator can be better connected with the substrate, and the layering, cracking and warping probability of the substrate and the crystal oscillator is reduced.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
FIG. 1 is a schematic view of a miniaturized substrate package structure with stacked crystal oscillator and chip according to an embodiment of the present application;
FIG. 2 is a schematic block diagram of an uninstalled crystal oscillator of a miniaturized substrate package structure with crystal oscillator and chip stacked package according to an embodiment of the present application;
FIG. 3 is a schematic structural diagram of a crystal oscillator of a miniaturized substrate package structure in which a crystal oscillator and a chip are stacked and sealed according to an embodiment of the present application in a state of being mounted on a substrate;
FIG. 4 is a schematic structural diagram of a crystal oscillator of a miniaturized substrate package structure in which a crystal oscillator and a chip are stacked and sealed according to another embodiment of the present application in another state of being mounted on a substrate;
fig. 5 is a schematic step flow diagram of a processing process of a miniaturized substrate package structure for stacking and sealing a crystal oscillator and a chip according to an embodiment of the present application.
The correspondence between the reference numerals and the component names in fig. 1 to 4 is:
110 base plates, 120 crystal oscillators, 130 bonding layers, 140 chips, 150 isolation buffer blocks, 160 plastic packages, 170 insulating adhesive layers, 180 bonding wires and 190 bonding pads;
111 first solder layer, 112 second solder layer.
Detailed Description
In order to better understand the above technical solutions, the following detailed description of the technical solutions of the embodiments of the present application is made by using the accompanying drawings and the specific embodiments, and it should be understood that the specific features of the embodiments of the present application are detailed descriptions of the technical solutions of the embodiments of the present application, and not limit the technical solutions of the present application, and the technical features of the embodiments of the present application may be combined with each other without conflict.
As shown in fig. 1 to 4, a miniaturized substrate package structure for stacking a crystal oscillator and a chip according to a first aspect of an embodiment of the present application includes: a substrate 110, on which a first and a second soldering layers 111 and 112 are formed to be spaced apart; the crystal oscillator 120, the crystal oscillator 120 is connected to the substrate 110 through the first welding layer 111 and the second welding layer 112; an adhesive layer 130, wherein the adhesive layer 130 is positioned between the first welding layer 111 and the second welding layer 112 and is connected with the substrate 110 and the crystal oscillator 120; and a chip 140, wherein the chip 140 is disposed on the crystal oscillator 120.
The substrate packaging structure provided by the embodiment of the application comprises the substrate 110, the crystal oscillator 120, the bonding layer 130 and the chip 140, wherein the crystal oscillator 120 is welded with the substrate 110 through the first welding layer 111 and the second welding layer 112, the bonding layer 130 is bonded with the substrate 110, and the chip 140 is arranged on the crystal oscillator 120, and the crystal oscillator 120 and the chip 140 are stacked and sealed together by the substrate packaging structure provided by the embodiment of the application, so that the size of the plastic package body 160 for packaging the substrate packaging structure is close to the area ratio of the crystal oscillator 120 to the chip 140 by 1:1, the product miniaturization requirement is met, and meanwhile, the problems of layering, warping and the like caused by different components in the plastic packaging process and expansion coefficient differences of plastic packaging materials are solved. As shown in fig. 3 and fig. 4, in the packaging process of the semiconductor device provided by the embodiment of the application, the insulating glue is firstly arranged on the substrate 110, the soldering paste is arranged on two sides of the insulating glue, then the crystal oscillator 120 is connected with the substrate 110 through the soldering paste, the soldering paste is solidified to form the first welding layer 111 and the second welding layer 112, in the solidification process of the soldering paste, a cavity is formed between the crystal oscillator 120 and the substrate 110, and along with the pressing of the crystal oscillator 120, the insulating glue is extruded by the crystal oscillator 120, as shown in fig. 4, the extruded insulating glue can be filled in the gap between the crystal oscillator 120 and the substrate 110, so that the crystal oscillator 120 can be better connected with the substrate 110, and the layering, cracking and warping probability of the substrate 110 and the crystal oscillator 120 is reduced.
As shown in fig. 1 and 2, in one possible embodiment, the substrate package structure further includes: isolation buffer blocks 150, the isolation buffer blocks 150 being disposed at both sides of the crystal oscillator 120; the plastic package body 160, the plastic package body 160 covers the substrate 110 and covers the isolation buffer block 150 and the crystal oscillator 120; wherein, a groove is formed on the substrate 110, and the isolation buffer block 150 is disposed in the groove.
In this technical solution, the semiconductor device may further include an isolation buffer block 150 and a molding body 160, where the molding body 160 may be made by filling an injection molding material onto the substrate 110, and forming the molding body 160 after the solidification of the molding material, by disposing the isolation buffer block 150 on two sides of the crystal oscillator 120, and then feeding the molding material between the isolation buffer block 150 and the crystal oscillator 120 at a slower speed in the feeding process of the molding material, after the solidification of the molding material to form the molding body 160, the isolation buffer block 150 may absorb most of the internal stress of the molding body 160, and only a part of the internal stress may act on the crystal oscillator 120, based on which the probability of delamination between the crystal oscillator 120 and the chip 140 or the substrate 110 may be reduced, thereby further reducing the probability of warpage of the semiconductor device and improving the product quality.
In this technical solution, a groove may be further formed on the substrate 110, and by the arrangement of the groove, on one hand, the plastic package body 160 may be filled in the groove, and by forming the groove, the contact area between the plastic package body 160 and the substrate 110 is increased, so as to further inhibit the delamination phenomenon and reduce the probability of warpage of the semiconductor device; on the other hand, by the provision of the grooves, the arrangement and formation of the isolation buffer blocks 150 are facilitated.
In some examples, grooves with the same length as the crystal oscillator 120 may be formed on the left and right sides of the substrate 110, and a double injection runner mode is adopted, a plastic package block is formed on the substrate 110 as the isolation buffer block 150, and the isolation buffer block 150 is made of a plastic package material with a similar expansion coefficient to that of the crystal oscillator 120.
In some examples, the grooves are disposed on both sides of the crystal 120, and the length of the grooves is greater than or equal to the length of the crystal 120.
As shown in fig. 1 and 2, in one possible embodiment, the isolation buffer block 150 has a height higher than the crystal oscillator 120, and a height difference of 20um to 30um; the distance between the isolation buffer block 150 and the crystal oscillator 120 is 50um to 100um.
In this technical solution, the size of the isolation buffer block 150 is further provided, the height of the isolation buffer block 150 is higher than that of the crystal oscillator 120, and the height difference is 20um to 30um, so that, on one hand, the isolation buffer block 150 can play a role in separation, so that it is ensured that the plastic packaging material can be filled between the isolation buffer block 150 and the crystal oscillator 120 at a slower speed, and the probability of delamination of the plastic packaging material can be reduced; on the other hand, it is ensured that part of the injection molding material can be supplied between the isolation buffer block 150 and the crystal oscillator 120 over the isolation buffer block 150, and at the same time, an increase in the flow rate of the injection molding material due to a decrease in the long path of the injection molding material can be avoided.
It is understood that if the difference between the height of the isolation buffer 150 and the height of the crystal oscillator 120 is smaller than 20um, the isolation buffer capability of the isolation buffer 150 may be reduced, and if the difference between the height of the isolation buffer 150 and the height of the crystal oscillator 120 is larger than 30um, it may be difficult for the injection molding material to pass over the isolation buffer 150.
In this technical solution, the size of the isolation buffer block 150 is further provided, the distance between the isolation buffer block 150 and the crystal oscillator 120 is 50um to 100um, so that the width of the gap between the isolation buffer block 150 and the crystal oscillator 120 is provided, and through selection of 50um to 100um, on one hand, it is ensured that enough injection molding material can be filled between the isolation buffer block 150 and the crystal oscillator 120, and it is ensured that the injection molding material can cover and protect the crystal oscillator 120; on the other hand, the plastic package body 160 between the isolation buffer block 150 and the crystal oscillator 120 is controlled within a reasonable width, so that the isolation buffer block 150 can absorb most of the internal stress of the plastic package body 160, the application of the internal stress to the crystal oscillator 120 is reduced, and the layering phenomenon is further inhibited.
It will be appreciated that if the distance between the isolation buffer 150 and the crystal oscillator 120 is less than 50um, it is possible that only a small portion of the injection molding material may pass over the isolation buffer 150, resulting in a reduced coating effect of the injection molding material on the crystal oscillator 120; if the distance between the isolation buffer 150 and the crystal oscillator 120 is greater than 100um, the width of the plastic package 160 filled between the isolation buffer 150 and the crystal oscillator 120 may be too large, which may impair the absorption effect of the isolation buffer 150 on the internal stress.
In a possible embodiment, the expansion coefficient of the chip is 4.2X10 -6 At a temperature of from/DEG C to 4.7X10 -6 The expansion coefficient of the crystal oscillator is 5.5X10 at the temperature of/DEG C -6 Per DEG C to 6.0X10 -6 Per DEG C, the expansion coefficient of the isolation buffer block is 25×10 -6 Per DEG C to 30X 10 -6 The expansion coefficient of the plastic package body is 25 multiplied by 10 at the temperature of/DEG C -6 Per DEG C to 30X 10 -6 The expansion coefficient of the substrate was 11X 10 at/. Degree.C -6 Per DEG C to 16X 10 -6 and/C. By this arrangement, the expansion coefficients of the respective members are further provided so that the expansion coefficients between the respective members are as close as possible, and the delamination phenomenon is further suppressed.
As shown in fig. 1, in one possible embodiment, the miniaturized substrate package structure of the stacked package of the crystal oscillator and the chip further includes: an insulating adhesive layer 170, wherein the insulating adhesive layer 170 is arranged between the chip 140 and the crystal oscillator 120; and a bonding wire 180, the bonding wire 180 being connected to the chip 140 and the substrate 110.
In the technical scheme, the miniaturized substrate packaging structure for stacking and sealing the crystal oscillator and the chip can further comprise an insulating adhesive layer 170, wherein the insulating adhesive layer 170 is arranged between the chip 140 and the crystal oscillator 120, and on one hand, the chip 140 is convenient to fix; on the other hand, the probability of unexpected electrification between the chip 140 and the crystal oscillator 120 can be reduced, the operation stability of the chip 140 and the crystal oscillator 120 is ensured, the communication connection of the chip 140 is facilitated through the arrangement of the bonding wire 180, and the input and the output of signals are facilitated.
In some examples, as shown in fig. 1, a reverse wire bonding process may be used to increase the bond wire 180 strength by placing a first solder joint on the substrate 110 at the location of the pad 190 and a second solder joint on the die 140 at the location of the pad 190.
In some examples, the expansion coefficient of the silicon material of chip 140 is 4.5x10 -6 Per DEG C, the expansion coefficient of the crystal oscillator 120 base alumina is 5.7X10 -6 The expansion coefficient of the epoxy plastic package material is 27 multiplied by 10 at the temperature of/DEG C -6 Substrate 110 expansion coefficient of 14×10 at/deg.c -6 And thus, the probability of delamination of the semiconductor device can be further reduced.
As shown in fig. 5, a second aspect of the embodiment of the present application provides a processing technology for manufacturing a miniaturized substrate package structure for stacking and sealing a crystal oscillator and a chip according to any one of the above-mentioned aspects, where the processing technology includes:
step 201: setting insulating glue on the substrate; it is understood that the insulating paste may be dropped on the substrate by the dispensing head.
Step 202: brushing soldering paste on two sides of the insulating glue, wherein the brushing height of the soldering paste is higher than that of the insulating glue; it is understood that the first and second solder layers are formed after the solder paste applied with the solder paste on both sides of the insulating paste is solidified.
Step 203: the crystal oscillator is connected to the substrate through soldering paste, the soldering paste forms a first welding layer and a second welding layer, and the crystal oscillator extrudes the insulating glue so that the insulating glue fills a gap between the crystal oscillator and the substrate; it can be understood that the brushing height of the soldering paste is higher than the height of the insulating glue, a cavity is formed between the crystal oscillator and the substrate in the process of pressing the crystal oscillator onto the substrate, the crystal oscillator can extrude the insulating glue along with the downward pressing of the crystal oscillator, and the insulating glue after extrusion can be filled in a gap between the crystal oscillator and the substrate, so that the crystal oscillator can be better connected to the substrate, and the layering, cracking and warping probability of the substrate and the crystal oscillator is reduced.
Step 204: and forming an insulating adhesive layer on one side of the crystal oscillator, which is far away from the substrate, and arranging the chip on the insulating adhesive layer. The insulating adhesive layer is arranged between the chip and the crystal oscillator, so that the chip is convenient to fix; on the other hand, the probability of unexpected electrification between the chip and the crystal oscillator can be reduced, and the operation stability of the chip and the crystal oscillator is ensured.
As shown in fig. 1 to 5, the processing technology provided in the embodiment of the present application is used for processing the miniaturized substrate packaging structure for stacking and sealing the crystal oscillator and the chip according to any one of the above-mentioned technical schemes, so that the processing technology has all the beneficial effects of the miniaturized substrate packaging structure for stacking and sealing the crystal oscillator and the chip according to any one of the above-mentioned technical schemes.
As shown in fig. 1 to 5, according to the processing technology provided by the embodiment of the application, as shown in fig. 3, an insulating glue is firstly disposed on a substrate 110, then solder paste is brushed on two sides of the insulating glue, the solder paste forms a first welding layer 111 and a second welding layer 112, and a crystal oscillator 120 extrudes the insulating glue so that the insulating glue fills a gap between the crystal oscillator 120 and the substrate 110, the insulating glue is solidified to form an insulating glue layer 170, and a chip 140 is disposed on the crystal oscillator 120, and the size of a plastic package 160 for packaging a semiconductor device is close to 1 in area ratio of the crystal oscillator 120 to the chip 140 by stacking the crystal oscillator 120 and the chip 140 together: 1, the product miniaturization requirement is met, and meanwhile, the problems of layering, warping and the like caused by different components in the plastic packaging process and expansion coefficient differences of plastic packaging materials are solved. Through the coating mode of solder paste and insulating glue, and at the in-process that the solder paste solidifies, can form the cavity between crystal oscillator 120 and the base plate 110, and along with the push down of crystal oscillator 120, crystal oscillator 120 can extrude the insulating glue, and the clearance between crystal oscillator 120 and base plate 110 can be filled to the insulating glue after the extrusion for crystal oscillator 120 can be connected in base plate 110 better, has reduced the probability of base plate 110 and crystal oscillator 120 layering, fracture and warpage.
In some examples, the step of disposing an insulating paste on the substrate 110 may include: dispensing two drops of insulating glue at the central position of the substrate 110 by using a dispensing head with the diameter of 0.4 um; the setting is convenient for controlling the dropping quantity of the insulating adhesive.
As shown in fig. 2, in some examples, brushing solder paste on both sides of the insulating paste, brushing the solder paste to a higher level than the insulating paste, and connecting the crystal oscillator 120 to the substrate 110 through the solder paste may include: the solder paste with the height of 30um is brushed on the two sides of the insulating glue, then the crystal oscillator 120 is grabbed by a mechanical arm of a chip mounter, one end of the crystal oscillator 120 is pressed to be arranged on the first solder paste, the other end of the crystal oscillator is arranged on the other solder paste, the solder paste is used for fixing the two ends of the crystal oscillator 120 and is communicated with the substrate 110, a height of 20um is generated during solder paste welding, at this time, the filled insulating glue at the bottom of the crystal oscillator 120 is scattered around by the pressure of the crystal oscillator 120 and fills the hollow position, and it can be understood that if the bottom is not filled with the insulating glue, the crystal oscillator 120 is separated from the substrate 110, a hollow which is difficult to fill is formed in the middle, and the substrate 110 is broken in the reflow soldering process.
In some examples, the step of disposing the chip 140 on the insulating glue layer includes: the upper part of the crystal oscillator 120 is coated with an insulating adhesive layer, the chip 140 is jacked up by a thimble of the chip mounter, the chip 140 is picked up from the wafer by a manipulator and is stuck above the crystal oscillator 120, and meanwhile, the chip 140 can be fixed after baking for 8 hours at 170 ℃.
As shown in fig. 1 and 2, in one possible embodiment, the processing process further includes: isolation buffer blocks 150 are formed at both sides of the crystal oscillator 120; supplying a molding compound onto the substrate 110 via a first direction, and performing pre-injection molding; bond wires 180 are bonded to substrate 110 and chip 140.
In this technical solution, in the injection molding process, the isolation buffer block 150 may be formed on the substrate 110 first, and then the pre-injection molding may be performed, in the pre-injection molding process, the injection molding material may be poured on the substrate 110, the plastic package body 160 is formed after the solidification of the plastic package material, by arranging the isolation buffer block 150 on two sides of the crystal oscillator 120, and then in the plastic package material supplying process, the plastic package material may be supplied between the isolation buffer block 150 and the crystal oscillator 120 at a slower speed, after the plastic package material is solidified to form the plastic package body 160, the isolation buffer block 150 may absorb most of the internal stress of the plastic package body 160, only a small part of the internal stress may act on the crystal oscillator 120, based on this, the probability of delamination between the crystal oscillator 120 and the chip 140 or the substrate 110 may be reduced, the probability of warpage occurring in the semiconductor device may be further reduced, and the product quality may be improved.
Bond wires 180 may be bonded to substrate 110 and chip 140 to facilitate communication connection of chip 140 and input and output of signals by the provision of bond wires 180.
In one possible embodiment, the process further comprises: the bonded semiconductor device is set in an injection molding machine, and a molding compound is supplied onto the substrate 110 in the second direction, thereby performing a secondary injection molding.
In this technical solution, after bonding of the bonding wire 180 is completed, secondary injection molding may be performed, in the process of secondary injection molding, a molding material may be supplied between the isolation buffer block 150 and the crystal oscillator 120 at a slower speed, after the molding material is solidified to form the molding body 160, the isolation buffer block 150 may absorb most of the internal stress of the molding body 160, and only a part of the internal stress may act on the crystal oscillator 120, based on this, the probability of delamination between the crystal oscillator 120 and the chip 140 or the substrate 110 may be reduced, the probability of warpage of the semiconductor device may be further reduced, and the product quality may be improved.
In the technical scheme, the plastic package material is supplied in the first direction in the pre-injection molding process, and then the plastic package material is supplied in the second direction for secondary injection molding, that is to say, the supply directions of the plastic package materials for the secondary injection molding are different, so that the plastic package quality can be further improved, the impact of the plastic package material on the crystal oscillator 120 and the bonding wire 180 is reduced, the quality of the semiconductor device can be further improved, and the layering probability of the semiconductor device is reduced.
In some examples, the specific steps of overmolding may include: the bonded semiconductor device is placed in an injection molding machine, an injection molding channel different from that of pre-injection molding is adopted, a plastic package cake with the expansion coefficient similar to that of the chip 140 and the substrate 110 is selected, the preheating temperature is set to 175 ℃, the mold closing pressure is 20T, the injection molding time is 9S, the whole plastic package body 160 is formed, a small amount of plastic package material can be slowly injected between the isolation buffer block 150 and the crystal oscillator 120 in the injection molding process, the injection molding process is completed, the isolation buffer block 150 can absorb most of internal stress after injection molding, and only a small amount of plastic package material can act on the crystal oscillator 120, so that the problems of layering and crystal oscillator 120 crushing caused by the difference of the expansion coefficients of the plastic package material and the crystal oscillator 120 are solved.
In one possible embodiment, the difference between the brush height of the solder paste and the height of the insulating paste is 5um to 15um; the height of the isolation buffer block 150 is higher than that of the crystal oscillator 120, and the height difference is 20um to 30um; the distance between the isolation buffer block 150 and the crystal oscillator 120 is 50um to 100um; the volume of the insulating paste on the substrate 110 is the volume filling the cavity area at the bottom of the entire crystal oscillator.
In this technical solution, the size of the isolation buffer block 150 is further provided, the height of the isolation buffer block 150 is higher than that of the crystal oscillator 120, and the height difference is 20um to 30um, so that, on one hand, the isolation buffer block 150 can play a role in separation, so that it is ensured that the plastic packaging material can be filled between the isolation buffer block 150 and the crystal oscillator 120 at a slower speed, and the probability of delamination of the plastic packaging material can be reduced; on the other hand, it is ensured that part of the injection molding material can be supplied between the isolation buffer block 150 and the crystal oscillator 120 over the isolation buffer block 150, and at the same time, an increase in the flow rate of the injection molding material due to a decrease in the long path of the injection molding material can be avoided.
In this technical solution, the size of the isolation buffer block 150 is further provided, the distance between the isolation buffer block 150 and the crystal oscillator 120 is 50um to 100um, so that the width of the gap between the isolation buffer block 150 and the crystal oscillator 120 is provided, and through selection of 50um to 100um, on one hand, it is ensured that enough injection molding material can be filled between the isolation buffer block 150 and the crystal oscillator 120, and it is ensured that the injection molding material can cover and protect the crystal oscillator 120; on the other hand, the plastic package body 160 between the isolation buffer block 150 and the crystal oscillator 120 is controlled within a reasonable width, so that the isolation buffer block 150 can absorb most of the internal stress of the plastic package body 160, the application of the internal stress to the crystal oscillator 120 is reduced, and the layering phenomenon is further inhibited.
In this technical scheme, the difference of the brushing height of solder paste and the height of insulating glue is 5um to 15um, and the volume of insulating glue on base plate 110 is for filling whole crystal oscillator bottom cavity region, so the setting further provides the quantity relation between solder paste and the insulating glue, ensures at the in-process of fixed crystal oscillator 120 that crystal oscillator 120 can extrude the insulating glue to make the insulating glue fill in the clearance between crystal oscillator 120 and base plate 110, so that can form adhesive linkage 130 between base plate 110 and the crystal oscillator 120.
In one possible embodiment, before the step of disposing the insulating paste on the substrate 110, further includes: the substrate 110 is baked to remove a portion of the water vapor of the substrate 110.
Before the insulating glue is disposed on the substrate 110, the substrate 110 may be baked to remove part of the water vapor of the substrate 110, and then the semiconductor device is injection molded, so as to improve the injection molding effect and reduce the layering probability.
In this technical scheme, the substrate 110 may be baked at 100 ℃ to 150 ℃, preferably 125 ℃ for 24 hours, excess steam is removed, the wafer is thinned simultaneously, dicing is performed, and then an insulating adhesive is disposed on the substrate 110.
In one possible embodiment, the process further comprises: and baking the semiconductor device after injection molding to eliminate the internal stress of the semiconductor device.
In the technical scheme, after injection molding is finished, the semiconductor device can be baked again, and the probability of delamination of the semiconductor device can be further reduced by the arrangement.
In some examples, after curing of the semiconductor device is completed, the semiconductor device may be placed on a marking station, the stamp position is debugged using laser, dicing is performed after completion, and packaging is performed to form a single shipment chip.
In summary, the substrate packaging structure and the processing technology of the semiconductor device provided by the embodiment of the application reduce the area occupied by the independent welding of the crystal oscillator 120 and the chip 140 through the stacked structure, thereby realizing the miniaturization requirement; by the processing technology, the product reliability is improved by using the coating mode of the insulating glue and the soldering paste and arranging the isolation buffer block 150.
In the present application, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance; the term "plurality" means two or more, unless expressly defined otherwise. The terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; "coupled" may be directly coupled or indirectly coupled through intermediaries. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.
In the description of the present application, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "left", "right", "front", "rear", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or units referred to must have a specific direction, be constructed and operated in a specific direction, and thus should not be construed as limiting the present application.
In the description of the present specification, the terms "one embodiment," "some embodiments," "particular embodiments," and the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The above is only a preferred embodiment of the present application, and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (8)
1. A crystal oscillator and chip stacked and sealed miniaturized substrate packaging structure is characterized by comprising:
a substrate on which a first and a second soldering layer are formed to be arranged at intervals;
the crystal oscillator is connected to the substrate through the first welding layer and the second welding layer;
the bonding layer is positioned between the first welding layer and the second welding layer and is connected with the substrate and the crystal oscillator;
the chip is arranged on the crystal oscillator;
isolation buffer blocks, which are arranged at two sides of the crystal oscillator;
the plastic package body covers the substrate and coats the isolation buffer block and the crystal oscillator;
wherein, a groove is formed on the substrate, and the isolation buffer block is arranged in the groove;
the height of the isolation buffer block is higher than that of the crystal oscillator, and the height difference is 20-30 um;
the distance between the isolation buffer block and the crystal oscillator is 50um to 100um.
2. The miniaturized substrate package of claim 1, wherein,
the expansion coefficient of the chip is 4.2×10 -6 At a temperature of from/DEG C to 4.7X10 -6 The expansion coefficient of the crystal oscillator is 5.5X10 DEG C -6 Per DEG C to 6.0X10 -6 The expansion coefficient of the isolation buffer block is 25 multiplied by 10 -6 Per DEG C to 30X 10 -6 The expansion coefficient of the plastic package body is 25 multiplied by 10 -6 Per DEG C to 30X 10 -6 The expansion coefficient of the substrate is 11 multiplied by 10 -6 Per DEG C to 16X 10 -6 /℃。
3. The miniaturized substrate package of any one of claims 1 or 2, further comprising:
the insulating adhesive layer is arranged between the chip and the crystal oscillator;
and the bonding wire is connected with the chip and the substrate.
4. A process for manufacturing a miniaturized substrate package structure for stacking and sealing a crystal oscillator and a chip as set forth in any one of claims 1 to 3, the process comprising:
setting insulating glue on the substrate;
brushing soldering paste on two sides of the insulating glue, wherein the brushing height of the soldering paste is higher than that of the insulating glue;
the crystal oscillator is connected to the substrate through the soldering paste, the soldering paste forms the first welding layer and the second welding layer, and the crystal oscillator extrudes the insulating glue so that the insulating glue fills a gap between the crystal oscillator and the substrate;
and forming an insulating adhesive layer on one side of the crystal oscillator, which is far away from the substrate, and arranging the chip on the insulating adhesive layer.
5. The process of claim 4, further comprising:
forming isolation buffer blocks on two sides of the crystal oscillator;
supplying plastic packaging material to the substrate in a first direction for pre-injection molding;
bonding wires to the substrate and the chip.
6. The process of claim 5, further comprising:
and arranging the bonded semiconductor device in an injection molding machine, and supplying plastic packaging material to the substrate in a second direction for secondary injection molding.
7. The process according to claim 5, wherein,
the difference between the brushing height of the soldering paste and the height of the insulating glue is 5um to 15um;
the height of the isolation buffer block is higher than that of the crystal oscillator, and the height difference is 20-30 um;
the distance between the isolation buffer block and the crystal oscillator is 50um to 100um;
and the insulating glue on the substrate fills the hollow area at the bottom of the whole crystal oscillator.
8. The process according to any one of claims 4 to 7, further comprising, before the step of disposing an insulating paste on the substrate:
baking the substrate to remove part of water vapor of the substrate;
the processing technology further comprises the following steps: and baking the semiconductor device after injection molding to eliminate the internal stress of the semiconductor device.
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