CN1576974A - Liquid crystal display device - Google Patents
Liquid crystal display device Download PDFInfo
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- CN1576974A CN1576974A CNA2004100550402A CN200410055040A CN1576974A CN 1576974 A CN1576974 A CN 1576974A CN A2004100550402 A CNA2004100550402 A CN A2004100550402A CN 200410055040 A CN200410055040 A CN 200410055040A CN 1576974 A CN1576974 A CN 1576974A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
- G09G3/3655—Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0876—Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/026—Arrangements or methods related to booting a display
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Power Engineering (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The liquid crystal display device is provided with an auxiliary capacitance power source selection circuit 6 for setting the voltage of auxiliary capacitance power source lines CS1-CSn. The auxiliary capacitance power source selection circuit 6 comprises an NMOS transistor 8 for choosing whether to supply a first reference voltage VcsH to the auxiliary capacitance power source lines CS1-CSn or not, and a PMOS transistor 9 for choosing whether to supply a second reference voltage VcsL (<VcsH) to the auxiliary capacitance power source lines CS1-CSn. On/off of these transistors 8, 9 are controlled by an AND gate 10 in a scanning line driving circuit 4. The voltage of all the auxiliary capacitance power source lines CS1-CSn is set to the same power source voltage (the first reference voltage) for a specified period of time from the time when the power is supplied, thus the voltage level of the auxiliary capacitance power source lines CS1-Csn does not fluctuate and the lateral stripe shaped emission line is not visually recognized.
Description
Technical field
The present invention relates to a kind of on insulated substrate signal wire and each point of crossing of sweep trace near form the liquid crystal indicator of display element.
Background technology
Owing to usually apply voltage, can cause the sintering of liquid crystal along same direction with respect to liquid crystal, usually, the reversal of poles that applies polarity with the voltage that carries out the switchable liquid crystal layer in the some cycles drives.In reversal of poles drives, exist to per 1 pixel carry out the reverse of polarity the some inversion driving, per 1 line is carried out the line inversion driving of the reverse of polarity, per 1 frame element is carried out the frame inversion driving of the reverse of polarity etc.
Carry out under the situation of reversal of poles driving, the polar cycle of the voltage of the auxiliary capacitor power lead that connects line voltage signal and auxiliary capacitor is changed.For this reason, prepare a plurality of reference power supplies (with reference to TOHKEMY 2001-255851 communique) that are used to set the auxiliary capacitor power line voltage in advance.
But, when power connection, because the spread of voltage of these reference power supplies will make the voltage of auxiliary capacitor power lead itself also become unstable.Will there be voltage changed, can observe horizontal stripe shape bright line at each auxiliary capacitor power lead the problem that applies of so-called liquid crystal layer in its result.
Summary of the invention
The present invention is in view of this viewpoint, and its purpose is to provide a kind of liquid crystal indicator that can not observe horizontal stripe shape bright line when power connection.
Display device according to a form of the present invention comprises: arrange signal wire and the sweep trace that is provided with in insulated substrate upper edge the 1st and the 2nd direction; Near the display element that each point of crossing of signal wire and sweep trace, forms;
By liquid crystal capacitance and the auxiliary capacitor of above-mentioned display element storage corresponding to the electric charge of the voltage of signal wire; The signal-line driving circuit of drive signal line; The scan line drive circuit of driven sweep line; Storage is corresponding to the liquid crystal capacitance and the auxiliary capacitor of the electric charge of the voltage of signal wire; The a plurality of auxiliary capacity power source line that is connected jointly with each terminal and disposes along above-mentioned the 1st direction along a plurality of above-mentioned auxiliary capacitors of above-mentioned the 2nd direction configuration; Auxiliary capacitor power line voltage control circuit with the voltage of the cycle synchronisation of above-mentioned liquid crystal capacitance of inversion driving and above-mentioned auxiliary capacitor polarity, the above-mentioned auxiliary capacitor power lead of control, specified time limit behind power connection, above-mentioned auxiliary capacitor power line voltage control circuit is supplied with the 1st identical reference voltage to all above-mentioned auxiliary capacitor power leads.
In addition, the display device according to a form of the present invention comprises: arrange signal wire and the sweep trace that is provided with in insulated substrate upper edge the 1st and the 2nd direction; Near the pixel switch element that each point of crossing of signal wire and sweep trace, forms; The signal-line driving circuit of drive signal line; The scan line drive circuit of driven sweep line, above-mentioned scan line drive circuit are used for making before the specified time limit of cutting off the electricity supply all above-mentioned pixel switch element conductive to come the driven sweep line; Before the specified time limit of cutting off the electricity supply, above-mentioned signal-line driving circuit imposes on all signal wires with identical assigned voltage.
In addition, the display device according to a form of the present invention comprises: arrange signal wire and the sweep trace that is provided with in insulated substrate upper edge the 1st and the 2nd direction; Near the pixel switch element that each point of crossing of signal wire and sweep trace, forms; The signal-line driving circuit of drive signal line; The scan line drive circuit of driven sweep line; Correspond respectively to above-mentioned pixel switch element setting and storage liquid crystal capacitance and auxiliary capacitor corresponding to the electric charge of the voltage of signal wire; Each pixel electrode that terminal is connected with above-mentioned pixel switch element, above-mentioned liquid crystal capacitance and above-mentioned auxiliary capacitor; When the control signal of supplying with from the outside of above-mentioned insulated substrate is the 1st logic, above-mentioned signal-line driving circuit applies the voltage identical with above-mentioned comparative electrode to all signal wires, when above-mentioned control signal is above-mentioned the 1st logic, the above-mentioned pixel switch element that above-mentioned scan line drive circuit conducting is all.
The diagrammatic illustration of accompanying drawing
Fig. 1 is the block scheme of schematic configuration of an example of expression liquid crystal indicator of the present invention.
Fig. 2 is the circuit diagram of the detailed structure of expression auxiliary capacitor power selection circuit 6.
Fig. 3 is the working timing figure that the auxiliary capacity power source of Fig. 2 is selected circuit 6.
Fig. 4 is the block scheme of schematic configuration of the liquid crystal indicator of expression the 2nd example of the present invention.
Fig. 5 is the summary layout on the glass substrate.
Fig. 6 is the working timing figure of the liquid crystal indicator of Fig. 4.
Fig. 7 is the block scheme of schematic configuration of the liquid crystal indicator of expression the 3rd example of the present invention.
Fig. 8 is the circuit diagram of an instantiation of the buffer circuit 13 of the afterbody in the expression scan line drive circuit 4.
Fig. 9 is the detailed placement figure on the glass substrate.
Working timing figure when Figure 10 is power connection.
Figure 11 is the working timing figure of power supply when blocking.
Best example of the present invention
Specify relevant liquid crystal indicator of the present invention with reference to the accompanying drawings.
(the 1st example)
Fig. 1 is the block scheme of schematic configuration of the liquid crystal indicator of expression the 1st example of the present invention.The liquid crystal indicator of Fig. 1 comprises: arrange signal wire S1～Sn and the sweep trace G1～Gn that is provided with along the 1st on glass substrate and the 2nd direction; Near the pixel TFT 1 (thin film transistor (TFT)) that each point of crossing of signal wire and sweep trace, forms; The auxiliary capacitor C1 and the pixel electrode 2 that connect the drain terminal of pixel TFT 1; The liquid crystal capacitance 2 that between the comparative electrode 3 of pixel electrode 2 relative configuration, forms with the clamping liquid crystal layer; The scan line drive circuit 4 of driven sweep line; The Source drive 5 of drive signal line; With the common auxiliary capacitor power lead CS1～CSn that is connected of the terminal of the auxiliary capacitor C1 that arranges along scan-line direction (the 2nd direction); Set the auxiliary capacitor power selection circuit 6 of the voltage of auxiliary capacitor power lead CS1～CSn.Source drive 5 be arranged on the outside of glass substrate, but be installed in the exchange of carrying out pixel data and control signal between the external drive circuit 7 on the glass substrate.Constitute signal-line driving circuit by Source drive 5 and external drive circuit 7.
Only the pixel portions office along the 1st direction is provided with auxiliary capacitor power lead CS1～CSn, corresponds respectively to each auxiliary capacitor power lead CS1～CSn auxiliary capacitor power selection circuit 6 is set.
Fig. 2 is the circuit diagram of the detailed structure of expression auxiliary capacitor power selection circuit 6.As shown in the figure, auxiliary capacitor power selection circuit 6 has whether selection supplies with nmos pass transistor 8 from the VcsH of the 1st reference voltage to auxiliary capacitor power lead CS1～CSn, whether select to auxiliary capacitor power lead CS1～CSn supply with above-mentioned the 2nd reference voltage V scL (＜VscH) PMOS transistor 9, by the AND grids 10 in the scan line drive circuit 4 control these transistors 8,9 conducting, end.
The logic product of power control signal S2 during the reversal of poles of power control signal S1 when AND grid 10 calculates the power connection of the auxiliary capacitor power lead CS1～CSn voltage when being used to control power connection and the voltage of the auxiliary capacitor power lead CS1～CSn when being used to control reversal of poles, according to this result of calculation come switching transistor 8,9 conducting, end.
Fig. 3 is the working timing figure that the auxiliary capacity power source of Fig. 2 is selected circuit 6.In Fig. 3, each waveform of the both end voltage of power supply control signal, line voltage signal, comparative electrode voltage, auxiliary capacitor power lead CS1～CSn voltage and liquid crystal capacitance system C2 when showing supply voltage, the 1st and the 2nd reference voltage V csH, VscL, the power connection of Source drive 5 usefulness.
Work below with reference to the auxiliary capacitor power selection circuit 6 of Fig. 3 key diagram 2.All auxiliary capacitor power selection circuits 6 in the liquid crystal indicator are identical with the structure of Fig. 2, use the same method to drive all auxiliary capacitor power lead CS1～CSn.
When being in the moment A of Fig. 3, connect the power supply of liquid crystal indicator.Raise at leisure when as shown in Figure 3, each voltage of Fig. 2 is from power connection.Therefore, the moment during from power connection, each voltage waveform of Fig. 2 is unsettled.
In this example, in the specified time limit during power connection (constantly between the A-B), power control signal S1 is low level (0V) during power connection.Thus, the output of the AND grid 10 in the auxiliary capacitor power selection circuit of Fig. 26 is low level just, and 9 conductings of PMOS transistor are also supplied with the 1st reference voltage V scH to auxiliary capacitor power lead CS1～CSn.
Because the 1st reference voltage V scH is than the 2nd reference voltage V scL height, in the specified time limit that begins during therefore from power connection, the voltage of all auxiliary capacitor power lead CS1～CSn all can raise.In a single day the voltage of auxiliary capacitor power lead CS1～CSn raise, and the voltage of pixel electrode 2 also can correspondingly raise, and has just reduced the voltage (voltage difference of the voltage of the voltage of comparative electrode 3 and pixel electrode 2) at liquid crystal capacitance C2 two ends.Thus, for example under the situation of the liquid crystal indicator of Chang Bai (when applying signal show for white), also be shown as broken white during power connection and show, just can not observe bright line.
After this, when becoming constantly B, the power control signal S1 of the auxiliary capacitor power selection circuit 6 of Fig. 2 during with power connection becomes high level.Thus, the logic of power control signal S2 during corresponding to reversal of poles changes the logic of AND grid 10, and is corresponding, the cycle synchronisation ground that drives with reversal of poles change nmos pass transistor 8 and PMOS transistor 9 conducting, end.
Thus, the cycle synchronisation that the voltage of auxiliary capacitor power lead CS1～CSn and reversal of poles drive becomes the 1st reference voltage V scH or the 2nd reference voltage V scL.
So, in this example, in the specified time limit that begins during from power connection, because all auxiliary capacitor power lead CS1～CSn are set at identical supply voltage (the 1st reference voltage), so do not cause voltage discrete of auxiliary capacitor power lead CS1～CSn, do not observe bright line.
In addition, in specified time limit when power connection, owing to the voltage difference between the voltage of voltage that has reduced auxiliary capacitor power lead CS1～CSn and comparative electrode 3, under the situation of Chang Bai, also be shown as broken white in stipulated time when power connection and show, just can not observe bright line.
(the 2nd example)
The form that does not show horizontal stripe when the 2nd example is dump.
Fig. 4 is the block scheme of schematic configuration of the liquid crystal indicator of expression the 2nd example of the present invention.In Fig. 4, give identical symbol with the structure identical with Fig. 1, stress difference below.
The liquid crystal indicator of Fig. 4 comprises: the viewing area portion 11 that forms on glass substrate is installed in the Source drive 5 on the glass substrate 20, the switch 12 that can select 1 selection signal to use at least from many signal line.Select with the output signal of switch 12 by signal to the signal wire supply source driver of selecting 5.In the example of Fig. 4, an output signal of Source drive 5 is selected to supply to 3 signal line with switch 12 by signal.Because signalization is selected with switch 12, so can cut down the quantity of the lead-out terminal of Source drive 5.
Having, select quantity with the signal wire of switch 12 selections not to be defined as by signal and must be 3, also can be 2, can also be more than 4.
COG on glass substrate 20 (glass top chip) installs Source drive 5.In practice, as shown in Figure 5, Source drive 5 is installed near the end of glass substrate 20.
Under conventional show state, scan line drive circuit 4 drives each sweep trace in order.When sweep trace control signal step-down that Source drive 5 is supplied with, the buffer circuit 13 of the afterbody in the scan line drive circuit 4 is raise forcibly.Thus, all pixel TFT 1 of conducting.
When dump, Source drive 5 is with sweep trace control signal step-down.Thus, when dump, before supply voltage reduces, the pixel TFT that conducting is all.
In addition, when dump, signal is selected with switch 12 conducting immediately.At this moment, identical voltage is supplied with on Source drive 5 full output ground.This voltage is the voltage (to call comparative electrode voltage in the following text) that equates with comparative electrode voltage.Because signal is selected with switch 12 and all conductings of pixel TFT 1, so the voltage of liquid crystal capacitance C2 one end just becomes comparative electrode voltage.
Contain a part of circuit and another part circuit region power distribution voltage in the scan line drive circuit 4 of buffer circuits 13.To after of power control circuit 14 delays of another part electrical source supplied voltage, supply to a part of circuit that contains buffer circuits 13 by Fig. 4.Therefore, when dump, will lag behind fall time of output voltage of containing a part of circuit of buffer circuits 13 than fall time of another part circuit.
In this example, carry out CC (coupling capacitance drives Capacitively Coupled Driving) and drive.In CC drives, in that pixel TFT 1 is under the conducting state, line voltage signal is supplied to signal wire, with the cycle synchronisation of reversal of poles,, set the voltage at liquid crystal layer two ends by changing the current potential of auxiliary capacitance line CS1.More specifically, under the situation of positive polarity, auxiliary capacitance line CS1 is uprised, under the situation of negative polarity, make auxiliary capacitance line CS1 step-down.Have again, make comparative electrode be fixed as the DC voltage of regulation.CC drives has the good characteristics of so-called response, particularly carries out the picture quality height under the situation that dynamic image shows.Drive in order to carry out CC, the CC driving circuit 15 of the voltage of control auxiliary capacitance line CS is set.
Fig. 6 is the working timing figure of the liquid crystal indicator of Fig. 4, the work schedule when showing dump.Before moment t1, carry out conventional display operation.At moment t1, the drive signal that scanning line driving is used becomes low level, and the output of Source drive 5 becomes comparative electrode voltage in addition.In addition, signal is selected to supply with comparative electrode voltage with switch 12 whole conductings and to all signal wires.
And, will raise from the sweep trace control signal that Source drive 5 is supplied with to scan line drive circuit 4.Thus, the buffer circuits 13 of the afterbody in the scan line drive circuit 4 just uprises.Therefore, all sweep traces uprise, with regard to the used pixel TFT 1 of conducting.At this moment, owing to supply with comparative electrode voltage to all signal wires, so the voltage at liquid crystal capacitance C2 two ends about equally, liquid crystal applied voltages just becomes 0V.
After this, in case become t2 constantly, the supply voltage of each circuit outside the buffer circuits 13 of the afterbody in the scan line drive circuit 4 begins to descend.Follow this situation, the voltage of comparative electrode and auxiliary capacitance line CS1 also descends, and is stored in the charge discharge of liquid crystal capacitance C2 and auxiliary capacitor C1.
After this, in case become t3 constantly, the supply voltage of the buffer circuits 13 of the afterbody in the scan line drive circuit 4 begins to descend.And in case become t4 constantly, all circuit just become the state that operation stops.
So, in the 2nd example, when dump,,, therefore just can not observe the display dot of horizontal stripe shape because liquid crystal applied voltages is 0V in case supply with comparative electrode voltage to all signal wires.In addition, owing to, make pixel TFT 1 conducting, also just suppressed the display dot that causes because of residual charge by making the stored charge discharge of liquid crystal capacitance C2 and auxiliary capacitor C1.
(the 3rd example)
The 3rd example is the form by the display dot when the outside control signals of supplying with of glass substrate 20 suppress to control power connection and during dump.
Fig. 7 is the block scheme of schematic configuration of the liquid crystal indicator of expression the 3rd example of the present invention.In Fig. 7, give identical symbol for the structure division identical with Fig. 1, stress difference below.
The liquid crystal indicator of Fig. 7 comprises glass substrate 20 and external drive circuit 7.Glass substrate 20 is connected by FPC (flexible print circuit) etc. with external drive circuit 7.On glass substrate 20, be provided with pixel TFT 1, liquid crystal capacitance C2, auxiliary capacitor C1, scan line drive circuit 4 and Source drive 5, in addition, also be provided with when setting power connection and the line voltage signal control circuit 21 of the line voltage signal during dump.Source drive 5 is mounted in the IC on the glass substrate 20.Scan line drive circuit 4 and line voltage signal control circuit 21 both can form on glass substrate 20, also can be installed on the glass substrate 20 by the form of IC.
Supply with control signal FDON from external drive circuit 7 to scan line drive circuit 4.Utilize this control signal FDON, suppress the control of display dot when power connection and during dump.
Fig. 8 is the circuit diagram of an object lesson of the buffer circuit 13 of the afterbody in the expression scan line drive circuit 4.As shown in the figure, each sweep trace 2 phase inverters 23,24 of having NAND circuit 22, vertically being connected with the lead-out terminal of NAND circuit 22.NAND circuit 22 computing scanning line driving are long-pending with the reverse logic of drive signal and control signal FDON.For example, when control signal FDON is low, the output of NAND circuit 22 is uprised, sweep trace also can uprise.Therefore, connect all pixel TFT 1 conductings of this sweep trace.
Because all the NAND circuit 22 in scan line drive circuit 4 are supplied with control signal FDON, when control signal FDON is low, all pixel TFT 1 conductings in the viewing area portion 11.
Because external drive circuit 7 only makes control signal FDON step-down in the stipulated time when power connection and during dump respectively, so all pixel TFT 1 conducting between this.
Line voltage signal control circuit 21 has a plurality of PMOS transistors that connect each signal wire respectively.Supply with control signal FDON to the transistorized grid of these PMOS.In addition, voltage that will be identical with comparative electrode (following title comparative electrode voltage) is applied to these PMOS transistor drain.
In case all conductings and supply with comparative electrode voltage of all the PMOS transistors in the control signal FDON step-down, line voltage signal control circuit 21 to signal wire.As shown in Figure 9, the metal line of using by the shading that is configured in around the viewing area portion 11 26 is supplied with and is applied to the transistorized comparative electrode voltage of each PMOS.So, owing to comparative electrode voltage is applied to the PMOS transistor, the wiring zone that comparative electrode voltage is used need not be set especially by the lightproof area 25 that utilizes prior setting.
Working timing figure when Figure 10 is power connection.In case at moment A power connection, the supply voltage of Source drive 5 and scan line drive circuit 4 just begins to rise.At the time point of moment A, control signal FDON becomes low.After this, in case become B constantly, scan line drive circuit 4 drives with regard to the output scanning line and uses drive signal.Point at this moment, control signal FDON still are low, in case become C constantly, control signal FDON just uprises.During control signal FDON is low, all pixel TFT 1 conductings, in addition, owing to supply with comparative electrode voltage to all signal wires, so the voltage at liquid crystal capacitance C2 two ends is identical, liquid crystal applied voltages is 0V just.Therefore, during this period in, do not observe the display dot of horizontal stripe shape.
Constantly A～C time is to carry out during the display update of 1～multiframe.After this, in case become C constantly, control signal FDON just uprises, and scan line drive circuit 4 just drives each bar sweep trace in order, and in addition, Source drive 5 is supplied with line voltage signal to each signal line, carries out conventional display operation.
Utilize the power control circuit 27 of Figure 11 to come the power supply of gated sweep line drive circuit 4 and Source drive 5.
Working timing figure when Figure 11 is dump.Cut off before the power supply of Source drive 5 and scan line drive circuit 4, at first make control signal FDON step-down, stop the output of scanning line driving with drive signal at moment D.By with control signal FDON step-down, make the output of the buffer circuits 13 of the afterbody in the scan line drive circuit 4 all uprise all pixel TFT 1 conductings.In addition, all PMOS transistor turns in the line voltage signal control circuit 21 and supply with comparative electrode voltage to all signal wires.Thus, make the voltage at liquid crystal capacitance C2 two ends roughly the same, liquid crystal applied voltages is 0V, does not observe the bright line of horizontal stripe shape.
After this, in case become E constantly, the supply voltage of scan line drive circuit 4 and Source drive 5 just begins to descend.Thus, similarly comparative electrode voltage and pixel electrode voltage also reduce, and liquid crystal applied voltages remains on 0V and just do not change.Therefore, even after moment E, do not observe the bright line of horizontal stripe shape yet.
So, in the 2nd example, utilize, in the time of just can controlling power connection and the display dot during dump, can not make circuit complicated, also can control display dot as requested from the outside control signal FDON that supplies with of glass substrate.
In addition, configuration is used for signal wire is set at the comparative electrode pressure-wire of comparative electrode voltage in the lightproof area owing to being provided with in advance, so the new configuration place that comparative electrode voltage is used just needn't be set, just can dwindle the picture frame area of display panel.
Claims (20)
1, a kind of display device is characterized in that, comprising:
Arrange signal wire and the sweep trace that is provided with in insulated substrate upper edge the 1st and the 2nd direction;
Near the display element that each point of crossing of signal wire and sweep trace, forms;
By liquid crystal capacitance and the auxiliary capacitor of described display element storage corresponding to the electric charge of the voltage of signal wire;
The signal-line driving circuit of drive signal line;
The scan line drive circuit of driven sweep line;
Storage is corresponding to the liquid crystal capacitance and the auxiliary capacitor of the electric charge of the voltage of signal wire;
Be connected jointly with each terminal along a plurality of described auxiliary capacitors of described the 2nd direction configuration, along a plurality of auxiliary capacitor power leads of described the 1st direction configuration; And
With the cycle synchronisation that described liquid crystal capacitance and described auxiliary capacitor reversal of poles are driven, control the auxiliary capacitor power line voltage control circuit of the voltage of described auxiliary capacitor power lead,
The specified time limit behind power connection supplied with the 1st identical reference voltage to all described auxiliary capacitor power leads by described auxiliary capacitor power line voltage control circuit.
2, according to the liquid crystal indicator of claim 1 record, it is characterized in that,
Only the part along the pixel quantity of described the 1st direction is provided with described auxiliary capacitor power lead;
Correspond respectively to described auxiliary capacitor power lead described auxiliary capacitor power line voltage control circuit is set.
3, according to the liquid crystal indicator of claim 1 record, it is characterized in that, comprising:
The pixel electrode that connects each terminal of described display element, described liquid crystal capacitance and described auxiliary capacitor; And
Clamping liquid crystal layer on described pixel electrode and the relative comparative electrode of configuration,
Described auxiliary capacitor power line voltage control circuit is selected a voltage arbitrarily and is supplied to described auxiliary capacitor power lead from a plurality of reference voltages that contain described the 1st reference voltage; Specified time limit behind power connection, with in described a plurality of reference voltages the reference voltage of approaching described comparative electrode supply to described auxiliary capacitor power lead as described the 1st reference voltage.
According to the liquid crystal indicator of claim 3 record, it is characterized in that 4, be to comprise during till the voltage level of determining other all reference voltages beyond described the 1st reference voltage described specified time limit.
5, according to the liquid crystal indicator of claim 1 record, it is characterized in that described auxiliary capacitor power line voltage control circuit comprises:
Select whether to supply with the 1st change-over circuit of described the 1st reference voltage to described auxiliary capacitor power lead; And
Select whether to supply with the 2nd change-over circuit of described the 2nd reference voltage to described auxiliary capacitor power lead,
Specified time limit behind power connection, supply with described the 1st reference voltage in order to make described the 1st change-over circuit to described auxiliary capacitor power lead, also comprise the selection control circuit of the selection operation of control the described the 1st and the 2nd change-over circuit.
6, according to the liquid crystal indicator of claim 5 record, it is characterized in that one in the described the 1st and the 2nd change-over circuit is nmos pass transistor, another is the PMOS transistor.
7, the liquid crystal indicator of putting down in writing according to claim 5, it is characterized in that, after specified time limit behind the described selection circuit process power connection, cycle synchronisation with the reversal of poles driving that makes described liquid crystal capacitance and described auxiliary capacitor, to supply with the described the 1st and the 1st reference voltage in order replacing, to control the described the 1st and the selection operation of the 2nd change-over circuit to described auxiliary capacitor power lead.
8, a kind of display device is characterized in that, comprising:
Arrange signal wire and the sweep trace that is provided with in insulated substrate upper edge the 1st and the 2nd direction;
Near the pixel switch element that each point of crossing of signal wire and sweep trace, forms;
The signal-line driving circuit of drive signal line; And
The scan line drive circuit of driven sweep line,
Described scan line drive circuit makes all described pixel switch element conductive for before the specified time limit of cutting off the electricity supply, and the driven sweep line,
Described signal-line driving circuit before the specified time limit of cutting off the electricity supply, is applied to all signal wires with identical assigned voltage.
9, the liquid crystal indicator of putting down in writing according to Claim 8 is characterized in that,
Described scan line drive circuit has the buffer circuit of driven sweep line at each sweep trace,
Comprise: when cutting off the electricity supply, after the supply voltage of described signal-line driving circuit descends, make the power control circuit of the supply voltage reduction of described buffer circuit staggered time.
10, according to the liquid crystal indicator of claim 9 record, it is characterized in that, comprising:
Correspond respectively to described pixel switch element setting and storage liquid crystal capacitance and auxiliary capacitor corresponding to the electric charge of line voltage signal;
The pixel electrode that connects each terminal of described pixel switch element, described liquid crystal capacitance and described auxiliary capacitor;
At the common auxiliary capacitor power lead that connects of each terminal of described auxiliary capacitor; And
Clamping liquid crystal layer on described pixel electrode and the relative comparative electrode of configuration,
When cutting off the electricity supply, described power control circuit is under the conducting state at all described pixel switch elements, after the stored charge discharge that makes described liquid crystal capacitance and described auxiliary capacitor, reduces the supply voltage of described buffer circuit.
11, the liquid crystal indicator of putting down in writing according to Claim 8 is characterized in that, comprising:
Correspond respectively to described pixel switch element setting and storage liquid crystal capacitance and auxiliary capacitor corresponding to the electric charge of line voltage signal;
At the common auxiliary capacitor power lead that connects of each terminal of described auxiliary capacitor; And
In the time that makes described pixel switch element conductive, the CC driving circuit of the described auxiliary capacitor power lead of pulsed drive.
12, the liquid crystal indicator of putting down in writing according to Claim 8 is characterized in that, comprising:
The signal-line choosing circuit is arranged at each bars of many signal line, for the signal wire that from these many signal line, chooses, supplies with from the line voltage signal of described signal-line driving circuit output,
When cutting off the electricity supply, described signal-line choosing circuit with respect to all corresponding many signal line, supply with from described signal-line driving circuit output with comparative electrode voltage voltage about equally.
13, a kind of display device is characterized in that, comprising:
Arrange signal wire and the sweep trace that is provided with in insulated substrate upper edge the 1st and the 2nd direction;
Near the pixel switch element that each point of crossing of signal wire and sweep trace, forms;
The signal-line driving circuit of drive signal line;
The scan line drive circuit of driven sweep line;
Correspond respectively to described pixel switch element setting and storage liquid crystal capacitance and auxiliary capacitor corresponding to the electric charge of line voltage signal; And
The pixel electrode that connects each terminal of described pixel switch element, described liquid crystal capacitance and described auxiliary capacitor,
When the control signal of supplying with from the outside of described insulated substrate was the 1st logic, described signal-line driving circuit applied the voltage identical with described comparative electrode to all signal wires,
When described control signal is described the 1st logic, all described pixel switch elements of described scan line drive circuit conducting.
14, according to the display device of claim 13 record, it is characterized in that,
Behind the power connection, drive up to described scan line drive circuit till the sweep trace of regulation frame part, described control signal is described the 1st logic.
15, according to the display device of claim 13 record, it is characterized in that,
In case described control signal is changed to the 2nd logic from described the 1st logic, described signal-line driving circuit is to each signal wire sequentially feeding line voltage signal behind power connection,
In case described control signal is changed to the 2nd logic from described the 1st logic, described scan line drive circuit drives each sweep trace in proper order behind power connection.
16, according to the display device of claim 13 record, it is characterized in that, comprising:
When cutting off the electricity supply, described control signal becomes after described the 1st logic, staggers the time, makes the power control circuit of the supply voltage reduction of described signal-line driving circuit and described scan line drive circuit.
17, according to the display device of claim 16 record, it is characterized in that,
After the stored charge discharge that makes described liquid crystal capacitance and described auxiliary capacitor, described power control circuit reduces the supply voltage of described signal-line driving circuit and described scan line drive circuit.
18, according to the display device of claim 13 record, it is characterized in that, comprising:
When described control signal is described the 1st logic, all signal wires are supplied with voltage supply change-over circuit with the identical voltage of described comparative electrode.
19, according to the display device of claim 18 record, it is characterized in that,
Around viewing area part that signal wire, sweep trace and described pixel switch element form, configuration is supplied with the metal line that change-over circuit is supplied with the voltage identical with described comparative electrode to described voltage.
20, according to the display device of claim 13 record, it is characterized in that,
Described the 1st logic is a low level.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003195992 | 2003-07-11 | ||
| JP2003195992 | 2003-07-11 |
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| CN1576974A true CN1576974A (en) | 2005-02-09 |
| CN1332247C CN1332247C (en) | 2007-08-15 |
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|---|---|---|---|
| CNB2004100550402A Active CN1332247C (en) | 2003-07-11 | 2004-07-12 | Liquid crystal display device |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7187421B2 (en) |
| KR (1) | KR100608191B1 (en) |
| CN (1) | CN1332247C (en) |
| TW (1) | TWI279760B (en) |
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| CN101535883B (en) * | 2006-11-09 | 2011-08-10 | 夏普株式会社 | Liquid crystal display device |
| CN101672994B (en) * | 2009-09-29 | 2011-12-07 | 友达光电股份有限公司 | Liquid crystal display capable of switching common voltage |
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| CN101779233B (en) * | 2007-10-16 | 2013-07-03 | 夏普株式会社 | Display driver circuit, display, and display driving method |
| WO2020186433A1 (en) * | 2019-03-19 | 2020-09-24 | 京东方科技集团股份有限公司 | Display substrate, display device, control method and control circuit |
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| CN101535883B (en) * | 2006-11-09 | 2011-08-10 | 夏普株式会社 | Liquid crystal display device |
| CN101779233B (en) * | 2007-10-16 | 2013-07-03 | 夏普株式会社 | Display driver circuit, display, and display driving method |
| US8373689B2 (en) | 2008-12-29 | 2013-02-12 | Lg Display Co., Ltd. | Organic light emitting diode display device |
| CN101672994B (en) * | 2009-09-29 | 2011-12-07 | 友达光电股份有限公司 | Liquid crystal display capable of switching common voltage |
| WO2020186433A1 (en) * | 2019-03-19 | 2020-09-24 | 京东方科技集团股份有限公司 | Display substrate, display device, control method and control circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200532615A (en) | 2005-10-01 |
| US20050036078A1 (en) | 2005-02-17 |
| TWI279760B (en) | 2007-04-21 |
| CN1332247C (en) | 2007-08-15 |
| US7187421B2 (en) | 2007-03-06 |
| KR20050009154A (en) | 2005-01-24 |
| KR100608191B1 (en) | 2006-08-08 |
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