CN1573483B - Thin film transistor substrate and method of manufacturing the same - Google Patents

Thin film transistor substrate and method of manufacturing the same Download PDF

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Publication number
CN1573483B
CN1573483B CN200410046413XA CN200410046413A CN1573483B CN 1573483 B CN1573483 B CN 1573483B CN 200410046413X A CN200410046413X A CN 200410046413XA CN 200410046413 A CN200410046413 A CN 200410046413A CN 1573483 B CN1573483 B CN 1573483B
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China
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drain
gate terminal
lead
thin film
film transistor
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Expired - Fee Related
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CN200410046413XA
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CN1573483A (en
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安田亨宁
田中宏明
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NEC Corp
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NEC Corp
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13458Terminal pads
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Thin film transistor substrate and method of manufacturing the same. Lest gate lead lines 122 which are readily corrodable in atmosphere should be exposed on the cutting surface formed at the time ofseparating an inner display area, which includes gate and drain terminals, in an eventual TFT substrate 100 from static electricity protection lead lines 4 and static electricity protection elements 19, gate terminal electrodes 115 which is formed from corrosion-resistant ITO are cut apart in the vicinity of the gate and drain terminals 3 and 8.

Description

Thin film transistor base plate and manufacture method thereof
The application requires in the rights and interests of the Japanese patent application No.2003-153751 of submission on May 30th, 2003, and its content is introduced by reference at this.
Technical field
The present invention relates to thin film transistor base plate and make the method for thin film transistor base plate, especially relate to the method for the terminal of the terminal (terminal) of thin film transistor base plate and manufacturing thin film transistor base plate.
Background technology
In thin film transistor (TFT) (TFT) substrate of LCD, electrostatic protection lead-in wire is provided on the substrate edges, and grid lead and drain lead (or signal wire) are connected to this electrostatic protection lead-in wire by electrostatic protection transistor shown in Figure 3.
In Fig. 3, TFT substrate 100 has grid lead 2 and the gate terminal 3 that is arranged in the side.Electrostatic protection lead-in wire 4 forms along substrate edges.Grid lead 2 is conducted through gate terminal 3, becomes grid lead 22 and is connected to electrostatic protection lead-in wire 4 through electrostatic protection element 19.TFT substrate 100 is arranged to the drain lead 7 perpendicular to grid lead 2 extensions in addition.Drain lead 7 also is conducted through drain terminal 8, becomes drain lead 27 and is connected to electrostatic protection lead-in wire 4 through electrostatic protection unit 19.Thin film transistor (TFT) I0 is disposed in the intersection of grid lead 2 and drain lead 7.Electrostatic protection element 19 is made up of the transistor with structure identical with thin film transistor (TFT) 10.
Amplification view shown in Fig. 4 (a) shown gate terminal 3, grid lead 22, electrostatic protection element 19 and electrostatic protection lead-in wire 4 near.By cutting decline, obtain TFT substrate 200 along the line of cut I-I shown in Fig. 4 (a).(substrate in drain terminal 8 those sides also is this situation.) this means that grid lead 22 between gate terminal 3 and the electrostatic protection element 19 and the drain lead 27 between drain terminal 8 and the electrostatic protection element 19 are cut off.Fig. 4 (b) is the sectional view of getting along the line II-II shown in Fig. 4 (a).Especially, this Fig. 4 (b) is the part of the thin film transistor (TFT) 10 in gate terminal 3, gate terminal electrodes 15, grid lead 2, grid lead 22 and the viewing area.Equally, amplification view shown in Fig. 5 (a) shown drain terminal 8, drain lead 27, electrostatic protection element 19 and electrostatic protection lead-in wire 4 near.Fig. 5 (b) is the sectional view of getting along the line II-II among Fig. 5 (a).In Fig. 4 (a) (and Fig. 5 (a)), for for purpose of brevity, diagram has shown the thin film transistor (TFT) 10 that does not comprise gate terminal 3, gate terminal electrodes 15, grid lead 2 and grid lead 22.
Near the structure of gate terminal 3 and drain terminal 8 is described hereinafter with reference to Fig. 4 (a), 4 (b) and Fig. 5 (a), 5 (b).
The molybdenum of individual layer is used as the grid lead material.In the photoresist step of grid lead, gate terminal 3 and electrostatic protection lead-in wire 4 is formed on the transparency carrier 1 with grid lead 2.Then, gate insulating film 5 is deposited, and semiconductor layer 6 is formed on the gate insulating film 5.Utilize the individual layer molybdenum to form drain lead (comprising drain electrode) 7, drain terminal 8 and source electrode 9.Single thin film transistor (TFT) 10 and electrostatic protection element 19 are formed.Simultaneously, grid lead 2 and drain lead 7 are connected to electrostatic protection lead-in wire 4 through electrostatic protection element 19.Subsequently; gate terminal electrodes 15 and drain electrode end electrode 16 and the polarized film 17 that covers these termination electrodes are formed with interlayer dielectric 11, and this interlayer dielectric 11 comprises diaphragm and by terminal part contact hole (terminal part contact hole) 12 and 13 and the pixel capacitors formed of indium tin oxide (ITO).At last; lead-in wire 27 between grid lead 22 between cut-out electrostatic protection lead-in wire 4 and the gate terminal 3 and electrostatic protection lead-in wire 4 and the drain terminal 8 is so that separate electrostatic protection lead-in wire 4 and electrostatic protection element 19 along the edge of last TFT substrate 100 with the TFT substrate 200 that comprises gate terminal 3 and drain terminal 8.
For example, in document 1 (the open Hei 6-95146 of Jap.P. is referring to [0020] hurdle and Fig. 4), shown the structure that has gate terminal part with ITO gate terminal electrodes.
Yet; by the lead-in wire 27 between the lead-in wire 22 between cut-out electrostatic protection lead-in wire 4 and the gate terminal 3 and electrostatic protection lead-in wire 4 and the drain terminal 8; because the exposure of the cut surface of the molybdenum that in air, is corroded easily; cause grid lead 22 and drain lead 27 to be corroded easily, might be damaged after long-term the use thereby cause.Except that molybdenum, aluminum monolayer, molybdenum/aluminium composite bed etc. are corroded in air easily.Especially, under the situation of molybdenum/aluminum compound structure, corrosion has been quickened in the galvanic action between the different metal.
Summary of the invention
Therefore; the method that the purpose of this invention is to provide a kind of thin film transistor base plate and manufacturing thin film transistor base plate; when viewing area and the cut-out of electrostatic protection lead-in wire, the method for described manufacturing thin film transistor base plate is guaranteed not corroded from the lead-in wire of the cut surface of viewing area.
According to an aspect of the present invention, provide a kind of thin film transistor base plate, comprising: first substrate; Grid lead is disposed on first substrate and has the gate terminal that forms along substrate edges; First dielectric film is disposed on first substrate so that the cover gate lead-in wire; Drain lead, it crosses grid lead and has the drain terminal that forms along substrate edges; Second dielectric film is formed on first dielectric film so that cover drain lead; And the gate terminal electrodes and the drain electrode end electrode in difference cover gate terminal hole and drain terminal hole, described gate terminal electrodes and drain electrode end electrode are formed on respectively in the dielectric film on gate terminal and the drain terminal, and extend to the outside of gate terminal and drain terminal, described gate terminal electrodes and drain electrode end electrode are formed by the material with characteristic anti-corrosion in air, extend to the first described thin film transistor base plate edge, and on the cut surface of described thin film transistor base plate, expose.
By extending to the outside of gate terminal and drain terminal respectively at gate terminal electrodes and drain electrode end electrode and being connected under the state of the electrostatic protection lead-in wire that forms along the edge of first substrate; cut-out reaches the gate terminal electrodes and the drain electrode end electrode part of the outside of gate terminal and drain terminal, forms gate terminal electrodes and drain electrode end electrode.Material with characteristic anti-corrosion in air is a transparent material.Described transparent material is indium tin oxide (ITO) or indium-zinc oxide (IZO).Described material with characteristic anti-corrosion in air is a refractory metal.Described refractory metal is to choose from the group of being made up of Cr, Ti, Nb, V, W, Ta, Zr or Hf.
According to a further aspect in the invention, provide a kind of method of making thin film transistor base plate: comprising: formation has the grid lead formation step along the grid lead of the gate terminal at the edge of first substrate; On first substrate, form first dielectric film so that first dielectric film of cover gate lead-in wire forms step; The drain lead that forms drain lead on first dielectric film forms step, and described drain lead crosses grid lead and has the drain terminal that forms along substrate edges; On first dielectric film, form second dielectric film and form step so that cover second dielectric film of drain lead; The terminal hole that forms gate terminal hole and drain terminal hole in the dielectric film part on gate terminal and drain terminal forms step; And the termination electrode formation step that forms gate terminal electrodes and drain electrode end electrode, described gate terminal electrodes and drain electrode end electrode be cover gate terminal hole and drain terminal hole respectively, and extends to the outside of gate terminal and drain terminal; Described gate terminal electrodes and drain electrode end electrode are formed by the material with characteristic anti-corrosion in air, extend to described thin film transistor base plate edge, and expose on the cut surface of described thin film transistor base plate.
The electrostatic protection lead-in wire is formed on first substrate along the edge of first substrate in grid or drain lead formation step; forming electrostatic protection fairlead in the step at terminal hole is formed on the dielectric film on the electrostatic protection lead-in wire; gate terminal electrodes and drain electrode end electrode are formed so that reach the outside of gate terminal and drain terminal in termination electrode formation step; and by the electrostatic protection fairlead so that be connected to electrostatic protection lead-in wire, and be to cut off the grid that reaches gate terminal and drain terminal outside and the termination electrode of drain electrode end electrode part cuts off step in the back that termination electrode forms step.
Material with characteristic anti-corrosion in air is a transparent material.Described transparent material is indium tin oxide (ITO) or indium-zinc oxide (IZO).Described material with characteristic anti-corrosion in air is a refractory metal.Described refractory metal is to choose from the group of being made up of Cr, Ti, Nb, V, W, Ta, Zr or Hf.
By following detailed description with reference to accompanying drawing, it is clear that the other objects and features of the invention will become.
Description of drawings
Fig. 1 (a) is according near the planimetric map the gate terminal among the embodiment of the thin film transistor base plate of the embodiment of the invention, and Fig. 1 (b) is the sectional view of getting along the line II-II among Fig. 1 (a);
Fig. 2 (a) is according near the planimetric map the drain terminal among the embodiment of the thin film transistor base plate of the embodiment of the invention, and Fig. 2 (b) is the sectional view of getting along the line II-II among Fig. 2 (a);
Partial plan shown in Figure 3 has shown near the terminal of thin film transistor base plate;
Fig. 4 (a) is near the planimetric map of gate terminal of the thin film transistor base plate of prior art, and Fig. 4 (b) is the sectional view of getting along the line II-II among Fig. 4 (a); And
Fig. 5 (a) is near the planimetric map of drain terminal of the thin film transistor base plate of prior art, and Fig. 5 (b) is the sectional view of getting along the line II-II among Fig. 5 (a)
Embodiment
Hereinafter with reference to accompanying drawing the preferred embodiments of the present invention are described.
Fig. 1 (a) is according near the planimetric map the gate terminal among the embodiment of the thin film transistor base plate of the embodiment of the invention.Amplification sectional view shown in Fig. 1 (b) has shown near the gate terminal after the grid lead that cuts off between gate terminal and the electrostatic protection element.Fig. 1 (b) and 2 (b) are respectively the sectional views of getting along the line II-II among Fig. 1 (a) and 2 (a).Identical among the circuit structure of TFT substrate and Fig. 3, therefore be not described.
In the photoetching of grid lead process against corrosion, utilize 150 to 300nm thick aluminium and 50 to arrive the lamination of the thick molybdenum of 200nm, form the gate terminal 3 and electrostatic protection lead-in wire 4 and the grid lead 2 that form along the edge of final TFT substrate 100 together.At this moment, grid lead 2 is connected to gate terminal 3, and is cut off in the front of imaginary line I-I from the grid lead 122 that gate terminal 3 stretches out.
Subsequently, the gate insulating film 5 that deposition is made up of 300 to 600nm nitride film forms semiconductor layer 6 then, and utilizes 50 to 200nm thick individual layer molybdenums to form drain lead 7 (comprising drain electrode), drain terminal 8 and source electrode 9.Like this, thin film transistor (TFT) 10 and electrostatic protection element 19 have been formed.
Drain lead 7 is connected to drain terminal 8, and the same with grid lead 122, and the front of the drain lead 127 online I-I that stretch out from drain terminal 8 is cut off.Subsequently, gate terminal electrodes 115 and drain electrode end electrode 116 are formed with the pixel element (not shown) of being made up of interlayer dielectric 11, wherein this interlayer dielectric 11 by 100 to 250nm thick nitride films, terminal part contact hole 12 and 13 and ITO form, the polarized film 17 that covers above element then is formed.In this stage, gate terminal electrodes 115 and drain electrode end electrode 116 are connected to electrostatic protection unit 19 to gate terminal 3 and drain terminal 8 respectively, and gate terminal 3 and drain terminal 8 is connected to electrostatic protection lead-in wire 4 through electrostatic protection unit 19.In the planimetric map of Fig. 1 (a), except that the part of exposing, each gate terminal electrodes 115 all is drawn within each gate terminal 3 covering each contact hole 12, but each gate terminal electrodes 115 can be an Any shape, as long as it can cover contact hole 12 at least.This is equally applicable to each the drain electrode end electrode 116 shown in the planimetric map of Fig. 2 (a).
At last; cut off the drain electrode end electrode 116 between gate terminal electrodes 115 between electrostatic protection lead-in wire 4 and the gate terminal 3 and electrostatic protection lead-in wire 4 and the drain terminal 8, so as the electrostatic protection along the edge formation of final TFT substrate 100 go between 4 and an electrostatic protection element 19 separate with finished product TFT substrate 200 with gate terminal 3 and drain terminal 8.
In the TFT substrate 200 that obtains like this; on the cut surface of TFT substrate 200; the gate terminal electrodes 115 and the drain electrode end electrode 116 that are formed by the ITO that is difficult to be corroded in air are exposed in the air, grid lead 122 that is formed by the molybdenum that is corroded easily in air and drain lead 127 protection that is protected film 10 and interlayer dielectric 11 simultaneously.Thereby, being exposed in the air even work as TFT 200, cut surface also is difficult to be corroded, and can obtain high reliability.
Though use ITO as corrosion-resistant material in this embodiment, might use indium-zinc oxide (IZO).Using under the situation of refractory metal as corrosion-resistant material, can from the group of forming by Cr (chromium), Ti (titanium), Nb (niobium), V (vanadium), W (tungsten), Ta (tantalum), Zr (zirconium) and Hf (hafnium), choose this metal.
As previously mentioned; utilize the method for membrane according to the invention transistor base and manufacturing thin film transistor base plate; when the viewing area with gate terminal and drain terminal in the TFT substrate is separated with electrostatic protection lead-in wire that forms along substrate edges and electrostatic protection terminal, near gate terminal and drain terminal, cut anti-corrosion ITO.Thereby the lead material that is not corroded easily in air is exposed in the air, and might improve the reliability of grid lead and drain lead.
For those skilled in the art, structural change will take place, and can carry out various obviously different change and embodiments to the present invention under the situation that does not deviate from scope of the present invention.More than the thing of being set forth in description and the accompanying drawing just is provided as an illustration.Therefore, more than describe and be considered to illustrative and nonrestrictive.

Claims (11)

1. a thin film transistor base plate comprises: first substrate; Grid lead is disposed on first substrate and has the gate terminal that forms along first substrate edges; First dielectric film is disposed on first substrate so that the cover gate lead-in wire; Drain lead, it crosses grid lead and has the drain terminal that forms along first substrate edges; Second dielectric film is formed on first dielectric film so that cover drain lead; And the gate terminal electrodes and the drain electrode end electrode in difference cover gate terminal hole and drain terminal hole, described gate terminal electrodes and drain electrode end electrode are formed on respectively in the dielectric film on gate terminal and the drain terminal, and extend to the outside of gate terminal and drain terminal, described gate terminal electrodes and drain electrode end electrode are formed by the material with characteristic anti-corrosion in air, extend to described thin film transistor base plate edge, and on the cut surface of described thin film transistor base plate, expose.
2. thin film transistor base plate according to claim 1; wherein by extending to the outside of gate terminal and drain terminal respectively at gate terminal electrodes and drain electrode end electrode and being connected under the state of the electrostatic protection lead-in wire that forms along the edge of first substrate; cut-out reaches the gate terminal electrodes and the drain electrode end electrode part of the outside of gate terminal and drain terminal, forms gate terminal electrodes and drain electrode end electrode.
3. thin film transistor base plate according to claim 1 and 2, the material that wherein has characteristic anti-corrosion in air is a transparent material.
4. thin film transistor base plate according to claim 3, wherein transparent material is indium tin oxide or indium-zinc oxide.
5. thin film transistor base plate according to claim 1 and 2, the material that wherein has characteristic anti-corrosion in air is a refractory metal.
6. thin film transistor base plate according to claim 5, wherein refractory metal is to choose from the group of being made up of Cr, Ti, Nb, V, W, Ta, Zr or Hf.
7. method of making thin film transistor base plate comprises:
Formation has the grid lead formation step along the grid lead of the gate terminal at the edge of first substrate;
On first substrate, form first dielectric film so that first dielectric film of cover gate lead-in wire forms step;
The drain lead that forms drain lead on first dielectric film forms step, and described drain lead crosses grid lead and has the drain terminal that forms along first substrate edges;
On first dielectric film, form second dielectric film and form step so that cover second dielectric film of drain lead;
The terminal hole that forms gate terminal hole and drain terminal hole in the dielectric film part on gate terminal and drain terminal forms step; And
The termination electrode that forms gate terminal electrodes and drain electrode end electrode forms step, and described gate terminal electrodes and drain electrode end electrode be cover gate terminal hole and drain terminal hole respectively, and extends to the outside of gate terminal and drain terminal;
Described gate terminal electrodes and drain electrode end electrode are formed by the material with characteristic anti-corrosion in air, extend to described thin film transistor base plate edge, and expose on the cut surface of described thin film transistor base plate;
Wherein forming electrostatic protection lead-in wire in the step at grid or drain lead is formed on first substrate along the edge of first substrate; forming electrostatic protection fairlead in the step at terminal hole is formed on the dielectric film on the electrostatic protection lead-in wire; gate terminal electrodes and drain electrode end electrode are formed so that reach the outside of gate terminal and drain terminal in termination electrode formation step; and by the electrostatic protection fairlead so that be connected to electrostatic protection lead-in wire, and be to cut off the grid that reaches gate terminal and drain terminal outside and the termination electrode of drain electrode end electrode part cuts off step in the back that termination electrode forms step.
8. the method for manufacturing thin film transistor base plate according to claim 7, the material that wherein has characteristic anti-corrosion in air is a transparent material.
9. the method for manufacturing thin film transistor base plate according to claim 8, wherein transparent material is indium tin oxide or indium-zinc oxide.
10. the method for manufacturing thin film transistor base plate according to claim 7, the material that wherein has characteristic anti-corrosion in air is a refractory metal.
11. the method for manufacturing thin film transistor base plate according to claim 10, wherein refractory metal is to choose from the group of being made up of Cr, Ti, Nb, V, W, Ta, Zr or Hf.
CN200410046413XA 2003-05-30 2004-05-28 Thin film transistor substrate and method of manufacturing the same Expired - Fee Related CN1573483B (en)

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Application Number Priority Date Filing Date Title
JP2003153751 2003-05-30
JP2003-153751 2003-05-30
JP2003153751A JP2004354798A (en) 2003-05-30 2003-05-30 Thin film transistor substrate and its manufacturing method

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CN1573483A CN1573483A (en) 2005-02-02
CN1573483B true CN1573483B (en) 2010-06-16

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US (1) US20040238888A1 (en)
JP (1) JP2004354798A (en)
KR (2) KR100708443B1 (en)
CN (1) CN1573483B (en)
TW (1) TWI283766B (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100647704B1 (en) * 2005-09-26 2006-11-23 삼성에스디아이 주식회사 Organic thin film transistor, flat panel display apparatus comprising the organic thin film transistor, method of manufacturing the organic thin film transistor, method of manufacturing the flat panel display apparatus
JP4723654B2 (en) * 2006-12-22 2011-07-13 シャープ株式会社 Active matrix substrate and display panel having the same
CN101599496B (en) * 2008-06-06 2011-06-15 群康科技(深圳)有限公司 Base plate and mother base plate of thin-film transistor
JP4911169B2 (en) * 2008-12-25 2012-04-04 三菱電機株式会社 Array substrate and display device
WO2012043366A1 (en) * 2010-09-29 2012-04-05 シャープ株式会社 Active matrix substrate, and display device
CN103698952B (en) * 2013-12-18 2016-05-25 京东方科技集团股份有限公司 A kind of array base palte and preparation method thereof
CN106057782A (en) * 2016-08-04 2016-10-26 上海奕瑞光电子科技有限公司 Antistatic protection structure and reliability improving method of semiconductor panel
JP2019101128A (en) * 2017-11-30 2019-06-24 株式会社ジャパンディスプレイ Display, and method for manufacturing display
WO2019186845A1 (en) * 2018-03-28 2019-10-03 シャープ株式会社 Display device and method for manufacturing display device
TWI702453B (en) * 2019-01-04 2020-08-21 友達光電股份有限公司 Display device and manufacturing method thereof
CN113903783A (en) * 2021-09-29 2022-01-07 深圳市华星光电半导体显示技术有限公司 Display panel and method for manufacturing the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1165568A (en) * 1995-10-03 1997-11-19 精工爱普生株式会社 Active matrix substrate
US5825439A (en) * 1994-12-22 1998-10-20 Kabushiki Kaisha Toshiba Array substrate for display
US6373546B1 (en) * 1997-03-03 2002-04-16 Lg Philips Lcd Co., Ltd. Structure of a liquid crystal display and the method of manufacturing the same
JP2002258319A (en) * 2001-02-28 2002-09-11 Advanced Display Inc Liquid crystal display device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0657182A (en) * 1992-07-06 1994-03-01 Minnesota Mining & Mfg Co <3M> Production of magnetic coating material
JP3315834B2 (en) * 1995-05-31 2002-08-19 富士通株式会社 Thin film transistor matrix device and method of manufacturing the same
US6613650B1 (en) * 1995-07-31 2003-09-02 Hyundai Electronics America Active matrix ESD protection and testing scheme
JP3819590B2 (en) * 1998-05-07 2006-09-13 三菱電機株式会社 Liquid crystal display element, liquid crystal display apparatus using the element, and reflective liquid crystal display apparatus
JP2000029053A (en) * 1998-07-14 2000-01-28 Mitsubishi Electric Corp Liquid crystal display device and is manufacture
JP3139549B2 (en) * 1999-01-29 2001-03-05 日本電気株式会社 Active matrix type liquid crystal display
KR20000066953A (en) * 1999-04-22 2000-11-15 김영환 Data pad region of liquid crystal panel
KR100767357B1 (en) * 2000-09-22 2007-10-17 삼성전자주식회사 thin film transistor array panel for liquid crystal display and manufacturing method thereof
TW492202B (en) * 2001-06-05 2002-06-21 South Epitaxy Corp Structure of III-V light emitting diode (LED) arranged in flip chip configuration having structure for preventing electrostatic discharge
KR100831280B1 (en) * 2001-12-26 2008-05-22 엘지디스플레이 주식회사 Liquid Crystal Display Device
TW538541B (en) * 2002-05-15 2003-06-21 Au Optronics Corp Active matrix substrate of liquid crystal display device and the manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5825439A (en) * 1994-12-22 1998-10-20 Kabushiki Kaisha Toshiba Array substrate for display
CN1165568A (en) * 1995-10-03 1997-11-19 精工爱普生株式会社 Active matrix substrate
US6373546B1 (en) * 1997-03-03 2002-04-16 Lg Philips Lcd Co., Ltd. Structure of a liquid crystal display and the method of manufacturing the same
JP2002258319A (en) * 2001-02-28 2002-09-11 Advanced Display Inc Liquid crystal display device

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TW200426445A (en) 2004-12-01
KR20070003725A (en) 2007-01-05
CN1573483A (en) 2005-02-02
TWI283766B (en) 2007-07-11
US20040238888A1 (en) 2004-12-02
KR20040103474A (en) 2004-12-08
KR100721113B1 (en) 2007-05-23
KR100708443B1 (en) 2007-04-18

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