CN1567465A - Error correction apparatus and method for block code - Google Patents

Error correction apparatus and method for block code Download PDF

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CN1567465A
CN1567465A CNA03145142XA CN03145142A CN1567465A CN 1567465 A CN1567465 A CN 1567465A CN A03145142X A CNA03145142X A CN A03145142XA CN 03145142 A CN03145142 A CN 03145142A CN 1567465 A CN1567465 A CN 1567465A
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mrow
block code
error
row
address table
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CN1312696C (en
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沈育成
王国铭
哈珮
萧铮岳
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Sunplus Technology Co Ltd
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Sunplus Technology Co Ltd
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Abstract

This invention provides a kind of block code error revision apparatus and method. The block code includes plural resource items that arranged by row and line. The apparatus consists of: a block code input apparatus that used for input a block code, a address erasing list, a error list, and a decoder. The address-erasing list includes plural erasing items that arranged by row and line, which correspond to the plural resource items in the block code. The error list includes plural error items that arranged by row and line, which correspond to the plural resource items in the block code. The decoder decodes this block code by the direction of line and gets the error in each line based on the address erasing list, so to updates the error list, and updates the address erasing list by the direction of line based on the first judgment rule. Then the decoder decodes this block code by the direction of row and gets the error in each row based on the address erasing list, so to updates the error list, and updates the address erasing list by the direction of row based on the second judgment rule.

Description

Block code error correction device and method
Technical Field
The present invention relates to the field of decoding technologies, and in particular, to a block code error correction apparatus and method.
Background
During the transfer and storage of data (data) in a digital optical disc system, the data is easily damaged by external factors (e.g., scratch of the disc or dirty finger print) and errors of writing and reading equipment. Various encoding techniques have been developed to reduce the error probability of data. Error Correction Code (ECC) is a generic term of codes generally used to correct errors, and is a Code word (codeword) obtained by adding redundant extra information to original data, and then writing the codeword to a storage medium. Because the character code has redundant information, the reading device can better understand the original data, and then the decoding procedure of specific steps can obtain data with better reliability. Of course, more redundancy can provide more information to the reader, resulting in more decoding performance, but at the expense of data transfer rate.
The goal of the development of error correction codes is to ensure the correctness of data, and the low complexity decoding device is also an important issue for system implementation. In general, block codes are easier to decode and are often used in disk storage devices. Among them, Reed-Solomon code (Reed-Solomon code) has excellent error correction capability among many error correction codes, and the algebraic structure implied by its word code is easy to implement in decoding device. Since the physical density of the stored data of the DVD is high and the number of data affected by the damage of the storage medium is large, the DVD system must have more error correction capability, so that the conventional DVD system uses Reed-Solomon product (RSPC) code for good error correction performance and low complexity of the decoding device.
FIG. 1 shows the format of coded blocks published in the digital versatile disc specification (DVD specification), wherein a data frame is a 12-byte high by 172-byte matrix, and an error correction code block (ECC block) is a matrix formed by stacking 16 data frame blocks and adding redundancy to form a 208-bit high by 182-bit matrix.
The Reed-Solomon product code is encoded in the row direction of the matrix, and each bit group in each row is regarded as 28Elements in a Galois Field (GF), and the entire row can be considered a polynomial in the Galois Field, denoted as Dcol(x) As shown, the redundancy is generated in a manner that follows the following equation;
Rcol(x)={Dcol(x)·x16}mod{Gcol(x)};
wherein, <math> <mrow> <msub> <mi>G</mi> <mi>col</mi> </msub> <mrow> <mo>(</mo> <mi>x</mi> <mo>)</mo> </mrow> <mo>=</mo> <munderover> <mi>&Pi;</mi> <mrow> <mi>k</mi> <mo>=</mo> <mn>0</mn> </mrow> <mn>15</mn> </munderover> <mrow> <mo>(</mo> <mi>x</mi> <mo>+</mo> <msup> <mi>&alpha;</mi> <mi>k</mi> </msup> <mo>)</mo> </mrow> <mo>,</mo> </mrow> </math> α is defined by the term P (x) x8+x4+x2+x2+1 derived galois element (principal element).
It is clear that Rcol(x) For a 15-degree polynomial, considering the coefficients as 16 bytes of data, the column redundancy, also called parity, is obtained, and thus the redundancy of each column, which is labeled PO in the coding block of fig. 1, is obtained after performing the above procedure for each column.
After all the column parity bits are generated, the redundancy P of each row is determinedrow(x) Consider each tuple in each column to be 28Elements in the Galois field, and whole columns can be considered as polynomials in the Galois field, denoted Rrow(x) The redundancy is generated in the following wayAn equation;
Rrow(x)={Drow(x)·x10}mod{Grow(x)};
while <math> <mrow> <msub> <mi>G</mi> <mi>row</mi> </msub> <mrow> <mo>(</mo> <mi>x</mi> <mo>)</mo> </mrow> <mo>=</mo> <munderover> <mi>&Pi;</mi> <mrow> <mi>k</mi> <mo>=</mo> <mn>0</mn> </mrow> <mn>9</mn> </munderover> <mrow> <mo>(</mo> <mi>x</mi> <mo>+</mo> <msup> <mi>&alpha;</mi> <mi>k</mi> </msup> <mo>)</mo> </mrow> <mo>;</mo> </mrow> </math>
Same as Rrow(x) For a 9-degree polynomial, considering the coefficients as 10 bytes of data, the redundancy of the row, also called parity (parity), is obtained, so that after the above procedure is performed on each row, the redundancy of each row, which is denoted as PI in the coding block of fig. 1, can be obtained.
The decoding order is opposite to the encoding order, first using the row parity in each row to decode each row, and then using the column parity to decode each column, where the row codec block is closer to the communication medium and called inner Parity (PI), and the parity is called outer Parity (PO).
The erased address provides more information for the decoding device to enhance the decoding capability, and in the case of digital optical disc system, the encoded word is modulated by the Modulation device to convert each byte into two-byte (ESM) and then written into the storage medium. When reading the bytes of the storage medium, a corresponding demodulator (demodulator) is needed, if the bytes can not be properly demodulated, indicating that the bytes may carry wrong data, the address of the bytes can be set as an erasure address, so that the decoder knows that the bytes are wrong, and only needs to calculate the error amount of the address to complete error correction, theoretically, under the condition of knowing the erasure address, the error correction capability of the decoder is twice as high as that under the condition of not knowing the erasure address.
As mentioned above, the Reed-Solomon product code used in the digital optical disc system is to generate parity bits for the columns and rows of the two-dimensional matrix, and in the decoding process, an iterative method is often used to effectively improve the error correction capability, FIG. 2 is a flowchart of the conventional iterative decoding method, wherein the row decoding is performed first, all erased addresses of the row are eliminated for the row which can be successfully decoded, the erased addresses are reserved for the row which can not be successfully decoded, the errors of the addresses can be corrected by the next row decoding, next, the row decoding is performed, all erased addresses of the row are eliminated for the row which can be successfully decoded, the erased addresses are continuously reserved for the row which can not be successfully decoded, the errors of the erased addresses can be corrected by the next row decoding, and the loop is repeated until the parity check is error-free, i.e. the decoding is successful. Decoding failure (decoding failure) is declared when the iterative loop is repeated and error cannot be completely corrected, however, the iterative decoding method is proportional to the number of memory accesses and the iterative decoding iteration number, and also proportional to the power consumption, i.e. the more the iterative number, the more the power consumption, therefore, the conventional iterative decoding method of error correction code block has many disadvantages and needs to be improved.
Disclosure of Invention
The present invention provides a block code error correction and device to avoid the problem of the prior art that the decoding success or decoding failure can be determined by a large number of cycles, so as to reduce the number of memory accesses and reduce the power consumption of the decoder and related circuits.
In order to achieve the above object, the present invention provides a method for correcting block code errors, the block code includes a plurality of data entries arranged in rows and columns, the block code corresponds to an erase address table and an error table, the erase address table includes a plurality of erase entries arranged in rows and columns, the error table includes a plurality of error entries arranged in rows and columns, the method includes the following steps:
(A) inputting a block code and initializing an erasure address table corresponding to the block code;
(B) decoding the block code in row and column directions according to the erasure address table to obtain errors of each row of data so as to update an error table corresponding to the block code;
(C) updating the row direction of the erasure address table according to a first judgment criterion;
(D) decoding the block code in the column direction according to the erasure address table to obtain the error of each column of data so as to update the error table;
(E) the column direction of the erased address table is updated according to a second determination criterion.
The block code error correction method, wherein the steps (B) to (E) are repeatedly performed until no error is generated or the number of times of repeated execution exceeds a predetermined value.
In the block code error correction method, in the step (C), the first judgment criterion is; when g isi(e, f) is greater than TRWhen the erase entries in the ith row of the erase address table are all set to true, TRIs a first preferred performance parameter for the first set of performance parameters,
<math> <mrow> <msub> <mi>g</mi> <mi>i</mi> </msub> <mrow> <mo>(</mo> <mi>e</mi> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>+</mo> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>n</mi> </munderover> <mi>&chi;</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>+</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>n</mi> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> </mrow> </math>
n is the number of columns of the block code, e (i, j) is the decoded value of the error entry in the ith column and jth row in the error table, f (i, j) is the value recorded in the erase entry in the ith column and jth row in the erase address table,
the block code error correction method, wherein the first better performance parameter TRIs 6, 9, 10 when steps (B) to (E) are repeatedly performed for 1, 2, 3, 4, 5, respectively.
The block code error correction method, wherein the second criterion is: when h is generatedj(e, f) is greater than TcWhen the erase entries in the jth column of the erase address table are all set to true, T iscIs a second preferred performance parameter for the device,
<math> <mrow> <msub> <mi>h</mi> <mi>j</mi> </msub> <mrow> <mo>(</mo> <mi>e</mi> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>e</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>+</mo> <mi>f</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>k</mi> </munderover> <mi>&chi;</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>+</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>k</mi> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>,</mo> </mrow> </math>
k is the row number of the block code, e (i, j) is the decoded value of the error entry in the ith column and jth row in the error table, f (i, j) is the value recorded in the erase entry in the ith column and jth row in the erase address table,
Figure A0314514200084
the block code error correction method, wherein the second better performance parameter TCIs 12, 15, 16 when steps (B) to (E) are repeatedly performed for 1, 2, 3, 4, 5, respectively.
To achieve the above object, the present invention further provides an apparatus for correcting block code errors, the block code including a plurality of data items arranged in rows and columns, the apparatus comprising:
a block code input device for inputting a block code;
an erasing address table, which includes a plurality of erasing items arranged in rows and columns, and which respectively correspond to the plurality of data items of the block code;
an error table, which includes a plurality of error items arranged in rows and columns, and which respectively correspond to the plurality of data items of the block code;
a decoder for decoding the block code in row direction according to the erasure address table to obtain the error of each row of data so as to update the error table, and updating the erasure address table in row direction according to a first judgment criterion; the block code is decoded in the column direction according to the erasure address table to obtain the errors of each column of data, so as to update the error table, and the erasure address table is updated in the column direction according to a second criterion.
The block code error correction device is characterized in that the decoder decodes the block code for a plurality of times until no error is generated or the decoding times exceed a preset value.
The block code error correction device comprises a first judgment criterion and a second judgment criterion, wherein the first judgment criterion is that the first; when g isi(e, f) is greater than TRWhen the erase entries in the ith row of the erase address table are all set to true, TRIs a first preferred performance parameter for the first set of performance parameters,
<math> <mrow> <msub> <mi>g</mi> <mi>i</mi> </msub> <mrow> <mo>(</mo> <mi>e</mi> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>+</mo> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>n</mi> </munderover> <mi>&chi;</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>+</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>n</mi> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> </mrow> </math>
n is the number of columns of the block code, e (i, j) is the decoded value of the error entry in the ith column and jth row in the error table, f (i, j) is the value recorded in the erase entry in the ith column and jth row in the erase address table,
Figure A0314514200092
the block code error correction device, wherein the first preferred performance parameter TRThe values of (a) are 6, 9, 10 when the number of decoding times is 1, 2, 3, 4, 5, respectively.
The block codeError correction means, wherein the second criterion is: when h is generatedj(e, f) is greater than TcWhen the erase entries in the jth column of the erase address table are all set to true, T isCIs a second preferred performance parameter
<math> <mrow> <msub> <mi>h</mi> <mi>j</mi> </msub> <mrow> <mo>(</mo> <mi>e</mi> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>e</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>+</mo> <mi>f</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>k</mi> </munderover> <mi>&chi;</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>+</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>k</mi> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> </mrow> </math>
K is the row number of the block code, e (i, j) is the decoded value of the error entry in the ith column and jth row in the error table, f (i, j) is the value recorded in the erase entry in the ith column and jth row in the erase address table,
Figure A0314514200101
the block code error correction device, wherein the second better performance parameter TCThe values of (a) are 12, 15, 16 when the number of decoding times is 1, 2, 3, 4, 5, respectively.
Drawings
FIG. 1 is a schematic diagram of a code block format published in the Digital Versatile Disc (DVD) specification;
FIG. 2 is a flow chart of a conventional iterative decoding method;
FIG. 3 is a block diagram of a block code error correction apparatus according to the present invention;
fig. 4 is a flowchart of the block code error correction method of the present invention.
Detailed Description
FIG. 3 is a block diagram of a block code error correction apparatus according to the present invention, which includes: a block code input device 310, an erase address table 320, an error table 330 and a decoder 340. Wherein the block code input device 310 is used to input a block code 311, and a block code 311 comprises a plurality of data items d (i, j) arranged in rows and columns; the erasure address table 320 includes a plurality of erasure entries f (i, j) arranged in rows and columns, which respectively correspond to a plurality of data entries d (i, j) of the block code, the error table 330 includes a plurality of error entries e (i, j) arranged in rows and columns, which also respectively correspond to a plurality of data entries d (i, j) of the block code, and the decoder 340 decodes the block code in the row and column directions according to the erasure address table 320 to obtain errors of each row of data, so as to update the error table 330.
The error table 330 and the erased address table 320 are defined as the following formulas (1) and (2):
<math> <mrow> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>:</mo> <msubsup> <mi>Z</mi> <mn>208</mn> <mo>+</mo> </msubsup> <mo>&times;</mo> <msubsup> <mi>Z</mi> <mn>182</mn> <mo>+</mo> </msubsup> <mo>&RightArrow;</mo> <mi>GF</mi> <mrow> <mo>(</mo> <msup> <mn>2</mn> <mn>8</mn> </msup> <mo>)</mo> </mrow> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mrow> <mo>(</mo> <mn>1</mn> <mo>)</mo> </mrow> </mrow> </math>
<math> <mrow> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>:</mo> <msubsup> <mi>Z</mi> <mn>208</mn> <mo>+</mo> </msubsup> <mo>&times;</mo> <msubsup> <mi>Z</mi> <mn>182</mn> <mo>+</mo> </msubsup> <mo>&RightArrow;</mo> <mo>{</mo> <mn>0,1</mn> <mo>}</mo> <mo>&Element;</mo> <mi>Z</mi> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mrow> <mo>(</mo> <mn>2</mn> <mo>)</mo> </mrow> </mrow> </math>
where e is the error value decoded by the decoder 340 and is the element in the 28 Galois field, f is the erasure value recorded, and an erasure value of 1 indicates that the address is an erasure address, otherwise, if 0, the address is not an erasure address.
The decoder 340 decodes the block code in the row-column direction first, for the row that can be decoded successfully in the block code, eliminates all the erased addresses corresponding to the row in the erased address table 320, for the row that can not be decoded in the block code, the error table 330 is used with the first criterion to decide whether to retain the corresponding erased addresses, so as to decide whether to decode with the information provided by the erased addresses when the decoder 340 decodes in the column direction, next, the decoder 340 uses the updated erased address table 320 to decode in the column direction, can decode successfully the columns, eliminates all the erased addresses corresponding to the columns in the erased address table 320, for the columns that can not be decoded in the block code, the error table 330 is used with the second criterion to decide whether to retain the corresponding erased addresses, so as to decide whether to use the erased address information in the column direction decoding of the next cycle, this increases the decoding performance of the decoder 340.
The first and second criteria of the present invention are different depending on whether column decoding or row decoding is performed, and are different depending on the number of iterations (ITE variable), (3) is the first criterion of updating the erase address used for row decoding, and (4) is the second criterion of updating the erase address used for column decoding:
f(i,j)=u(gi(e,f)-TR) (3)
f(i,j)=u(hj(e,j)-Tc) (4)
where i is the number of columns, j is the number of rows, gi、hjChanges with the change of the number of iterations, and
gi(e,f)=2e(i,:)+f(i,:)’
hj(e,f)=2e(:,j)+f(:,j)’ <math> <mrow> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>=</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mn>182</mn> </munderover> <mi>x</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>,</mo> </mrow> </math> <math> <mrow> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>=</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mn>182</mn> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>,</mo> </mrow> </math>
<math> <mrow> <mi>e</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>=</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mn>208</mn> </munderover> <mi>x</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>,</mo> </mrow> </math> <math> <mrow> <mi>f</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>=</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mn>208</mn> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>,</mo> </mrow> </math>
Figure A0314514200116
parameter TR、TcAlso as a function of the number of iterations, different TR、TcThe value will cause obvious difference in decoding and performance of the same decoder, and the meaning of formula (3) is when gi(e, f) is greater than TRAll the erase addresses corresponding to the row in the erase address table 320 are reserved, and the meaning of formula (4) is when h is enteredj(e, f) is greater than TcAll the erased addresses corresponding to the columns in the erased address table 320 are reserved, a set of T's for obtaining the best decoding performanceR、TcThe reference values are listed in table one:
ITE=1 2 3 4 5
TR 6 9 10 10 10
Tc 12 15 16 16 16
FIG. 4 is a flowchart of a block code error correction method according to the present invention, first, a block code 311 is input in step S410, an erasure address table 320 corresponding to the block code 311 is initialized in step S411, the iteration count (ITE variable) is initialized in step S412, and the block code is row-column decoded according to the erasure address table 320 in step S413 to obtain errors of each row of data, so as to update the error table 330 corresponding to the block code in step S414.
In steps S415 to S421, u (g) is determined according to the first criterion f (i, j)i(e,f)-TR) The erase address table 320 is updated in the row direction, i.e., when the ith row gi(e, f) is greater than TRThen, all the erase entries f (i, j) corresponding to the row in the erase address table 320 are set as erase addresses.
In step S422, the block code 311 is decoded in the column direction according to the erasure address table 320 to obtain the errors of each column of data, so as to update the error table 330 in step S423. In steps S424 to S430, u (h) is determined according to the second criterion f (i, j)j(e,f)-Tc) The erase address table 320 is updated in the column direction, i.e., when h is in the jth rowj(e, f) is greater than TcThen, all the erase entries f (i, j) corresponding to the column in the erase address table 320 are set as erase addresses.
In step S431, it is determined whether there is an error in the decoded block code 311, if it is determined that there is no error in the decoded block code 311, a success message is generated (step S432), if it is determined that there is an error in the decoded block code, it is determined in step S433 whether the ITE variable exceeds a specific value, if so, a failure message is generated (step S435), and if it is determined in step S433 that the ITE variable does not exceed a specific value, the TE variable is incremented by 1 (step S434) and step S413 is repeated.
As can be seen from the above description, since the update criteria of the erasure address table 320 used in the present invention changes with the decoding result of the decoder and the number of iterations, better decoding performance can be obtained with fewer decoding times compared to the conventional decoder using iterative decoding, and meanwhile, the number of cycles can be reduced to determine the decoding success or decoding failure, thereby reducing the number of accesses to the memory, i.e., reducing the power consumption of the decoder and related circuits.
The above embodiments are merely examples for convenience of description, and the claimed invention should not be limited to the above embodiments but should be limited only by the scope of the claims.

Claims (12)

1. A method for correcting block code error is characterized in that the block code comprises a plurality of data items arranged in rows and columns, the block code is corresponding to an erasing address table and an error table, the erasing address table comprises a plurality of erasing items arranged in rows and columns, the error table comprises a plurality of error items arranged in rows and columns, the method comprises the following steps:
(A) inputting a block code and initializing an erasure address table corresponding to the block code;
(B) decoding the block code in row and column directions according to the erasure address table to obtain errors of each row of data so as to update an error table corresponding to the block code;
(C) updating the row direction of the erasure address table according to a first judgment criterion;
(D) decoding the block code in the column direction according to the erasure address table to obtain the error of each column of data so as to update the error table;
(E) the column direction of the erased address table is updated according to a second determination criterion.
2. The method of claim 1, wherein steps (B) to (E) are repeated until no error occurs or the number of times of the repeated execution exceeds a predetermined value.
3. The method of claim 2, wherein in step (C), the first criterion is; when g isi(e, f) is greater than TRWhen the erase entries in the ith row of the erase address table are all set to true, TRIs a first preferred performance parameter for the first set of performance parameters,
<math> <mrow> <msub> <mi>g</mi> <mi>i</mi> </msub> <mrow> <mo>(</mo> <mi>e</mi> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>+</mo> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>n</mi> </munderover> <mi>&chi;</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>+</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>n</mi> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> </mrow> </math>
n is the number of columns of the block code, e (i, j) is the decoded value of the error entry in the ith column and jth row in the error table, f (i, j) is the value recorded in the erase entry in the ith column and jth row in the erase address table,
4. the method of claim 3, wherein the first better performance parameter TRIs 6, 9, 10 when steps (B) to (E) are repeatedly performed for 1, 2, 3, 4, 5, respectively.
5. The method of claim 2, wherein the second criterion is: when h is generatedj(e, f) is greater than TCWhen the erase entries in the jth column of the erase address table are all set to true, T isCIs a second preferred performance parameter for the device,
<math> <mrow> <msub> <mi>h</mi> <mi>j</mi> </msub> <mrow> <mo>(</mo> <mi>e</mi> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>e</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>+</mo> <mi>f</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>k</mi> </munderover> <mi>&chi;</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>+</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>k</mi> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> </mrow> </math>
k is the number of rows of the block code, e (i, j) is the number of columns in the error tableThe value of the error entry in the ith column and the jth row obtained by decoding, f (i, j) is the value recorded in the erase entry in the ith column and the jth row in the erase address table,
Figure A031451420003C2
6. the method of claim 5, wherein the second better performance parameter TCIs 12, 15, 16 when steps (B) to (E) are repeatedly performed for 1, 2, 3, 4, 5, respectively.
7. A block code error correction apparatus, wherein the block code includes a plurality of data items arranged in rows and columns, the apparatus comprising:
a block code input device for inputting a block code;
an erasing address table, which includes a plurality of erasing items arranged in rows and columns, and which respectively correspond to the plurality of data items of the block code;
an error table, which includes a plurality of error items arranged in rows and columns, and which respectively correspond to the plurality of data items of the block code;
a decoder for decoding the block code in row direction according to the erasure address table to obtain the error of each row of data so as to update the error table, and updating the erasure address table in row direction according to a first judgment criterion; the block code is decoded in the column direction according to the erasure address table to obtain the errors of each column of data, so as to update the error table, and the erasure address table is updated in the column direction according to a second criterion.
8. The apparatus of claim 7, wherein the decoder decodes the block code a plurality of times until no errors are generated or the number of decoding times exceeds a predetermined value.
9. According to the claimsSolving 8 the block code error correction device, wherein the first judgment criterion is; when g isi(e, f) is greater than TRWhen the erase entries in the ith row of the erase address table are all set to true, TRIs a first preferred performance parameter for the first set of performance parameters,
<math> <mrow> <msub> <mi>g</mi> <mi>i</mi> </msub> <mrow> <mo>(</mo> <mi>e</mi> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>+</mo> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mo>:</mo> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>n</mi> </munderover> <mi>&chi;</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>+</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>j</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>n</mi> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> </mrow> </math>
n is the number of columns of the block code, e (i, j) is the decoded value of the error entry in the ith column and jth row in the error table, f (i, j) is the value recorded in the erase entry in the ith column and jth row in the erase address table,
Figure A031451420004C1
10. the apparatus of claim 9, wherein the first better performance parameter TRThe values of (a) are 6, 9, 10 when the number of decoding times is 1, 2, 3, 4, 5, respectively.
11. The block code error correction apparatus of claim 9, wherein the second criterion is: when h is generatedj(e, f) is greater thanTCWhen the erase entries in the jth column of the erase address table are all set to true, T isCIs a second preferred performance parameter for the device,
<math> <mrow> <msub> <mi>h</mi> <mi>j</mi> </msub> <mrow> <mo>(</mo> <mi>e</mi> <mo>,</mo> <mi>f</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>e</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>+</mo> <mi>f</mi> <mrow> <mo>(</mo> <mo>:</mo> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>k</mi> </munderover> <mi>&chi;</mi> <mrow> <mo>(</mo> <mi>e</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> <mo>)</mo> </mrow> <mo>+</mo> <munderover> <mi>&Sigma;</mi> <mrow> <mi>i</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>k</mi> </munderover> <mi>f</mi> <mrow> <mo>(</mo> <mi>i</mi> <mo>,</mo> <mi>j</mi> <mo>)</mo> </mrow> </mrow> </math>
k is the row number of the block code, e (i, j) is the decoded value of the error entry in the ith column and jth row in the error table, f (i, j) is the value recorded in the erase entry in the ith column and jth row in the erase address table,
Figure A031451420004C3
12. the block code error correction device of claim 11, wherein the second better performance parameter TCThe values of (a) are 12, 15, 16 when the number of decoding times is 1, 2, 3, 4, 5, respectively.
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