CN1567214A - Adaptation type method for controlling refresh interval of DRAM - Google Patents
Adaptation type method for controlling refresh interval of DRAM Download PDFInfo
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- CN1567214A CN1567214A CN 03145213 CN03145213A CN1567214A CN 1567214 A CN1567214 A CN 1567214A CN 03145213 CN03145213 CN 03145213 CN 03145213 A CN03145213 A CN 03145213A CN 1567214 A CN1567214 A CN 1567214A
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Abstract
This invention provides a kind of method to find out update interval. It applies to dynamic random access memory chip. The method comprises: (a) detecting whether the dynamic random access memory chip is under the just starting state; (b) providing a update pulse that with a update interval under the just starting state; (c) self-testing multiple locations in dynamic random access memory chip according to the update pulse; (d) varying this update pulse, and repeating step (c), until find out the maximum update interval of successful self-testing of dynamic random access memory chip; (f) defining the most proper update interval according to the maximum update interval. So the dynamic random access memory chip can update when under normal power supply. This invention can provide proper update interval according to the different dynamic random access memory chips, so to avoid energy consumption that caused by too short update interval.
Description
(1) technical field
Relevant a kind of adjustment dynamic RAM (the dynamic random access memory of the present invention, DRAM) method of update time and device, selftest when referring to a kind of electric power starting especially, and produce method and the device of different update times.
(2) background technology
DRAM is that integrated level is higher in all solid state device storeies, and is relatively more cheap, and pretty good a kind of of reading speed.Therefore, widely be used in the appliance and electronic.Yet it is that number with the quantity of electric charge comes representative data that DRAM has the storage element of a kind of feature: DRAM, and electric charge wherein can be passed along with the time.The main cause of its electric leakage is the reverse blas leakage current that the PN of the NMOS in the DRAM storage element connects face.Therefore, the storage element of each DRAM after every process regular hour, just must upgrade the data of wherein being stored, and runs off to avoid data, and this action is called renewal (refresh), should then be called the regular hour and upgrade (refreshinterval) at interval.In other words, even if DRAM does not carry out reading of data with the IC in the external world, be under the pattern of standby (stand-by), DRAM upgrades at interval every one, still must consume certain electric energy and upgrade.Scrutable is that if it is short more to upgrade the interval, DRAM is just big more because upgrade the power that is consumed.
Yet, when DRAM is used for the electronic product (such as PDA) of Portable (portable), the power that it consumes of just having to be devoted to reduce.Because the spendable finite energy of portable electronic product, majority is provided by the battery of following, and therefore, in order to prolong the time of its use, the power that electronic component consumed wherein is low more good more.DRAM is no exception.So, how to reduce the power that DRAM consumes, particularly upgrade the power consumed, the important problem when just becoming research and development DRAM.
(3) summary of the invention
In view of this, fundamental purpose of the present invention is to produce an appropriate renewal interval, so that DRAM upgrades.Like this, can avoid unnecessary, the too short renewal redundant power loss that causes at interval.
According to above-mentioned purpose, the invention provides a kind of appropriate renewal method at interval of finding out, be applicable to a dynamic random access memory chip.This method includes: (a) detect the state whether this dram chip is in firm startup; (b) when just starting state, provide one to upgrade clock pulse, have one and upgrade at interval; (c) upgrade clock pulse according to this, make a plurality of storage unit in this dram chip carry out selftest; (d) change this renewal at interval, and repeat this step (c), up to finding the longest renewal interval that can make this dram chip selftest success; And (f) at interval, define this most appropriate renewal at interval according to this longest renewal, to provide this dram chip when general power supply is supplied, upgrade.
The most appropriate renewal can be this longest outer difference that adds a scheduled volume in interval of upgrading at interval, guaranteeing that the most appropriate renewal goes for upgrading the storage unit that every other in this dram chip do not test at interval, and do not have the situation that data run off.
The renewal that the invention has the advantages that dram chip is determined by built-in selftest when power supply just starts, but not a value that after dram chip dispatches from the factory, just is completely fixed.Therefore, can provide an appropriate renewal at interval along with the difference of each dram chip.
(4) description of drawings
Fig. 1 is the schematic flow sheet of method of the present invention.
Fig. 2 is according to a ring-type oscillator of the present invention.
Fig. 3 is the circuit diagram of the reverser among Fig. 2.
Fig. 4 is the control voltage generation circuit synoptic diagram among Fig. 3.
(5) embodiment
For above-mentioned purpose of the present invention, characteristics and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. is elaborated.
Main spirit of the present invention makes the storage unit selftest of DRAM utilizing when power supply just starts, finding the most appropriate instantly renewal at interval, and with as under follow-up normal operation, the renewal of DRAM storage unit interval.
Fig. 1 is the schematic flow sheet of method of the present invention.When detecting power initiation, the present invention at first provides a default renewal interval 12.Then, dram chip just begins to carry out selftest 10.
The usefulness of selftest 10 is intended to check whether present renewal is available at interval.That is to say that during the action upgraded at interval with present renewal, whether the data in the DRAM storage unit can run off.A kind of method of selftest 10 is shown among Fig. 1.Default original test patterns writes in several DRAM storage unit 14 earlier.Then, come the DRAM storage unit is carried out more new element of several with instantly renewal clock pulse (have instantly renewal at interval).Then, read the test patterns 18 of being preserved in the DRAM storage unit.At last, the test patterns that relatively deposits in and original test patterns whether consistent 20.If consistent, represent that present renewal can not cause the loss of data at interval, can make the dram chip normal running.If inconsistent, represent that present renewal is too of a specified duration at interval, can cause the loss of data.
If present renewal is spendable at interval, then increase and upgrade value at interval, carry out selftest again one time.If the renewal after the change can be used again at interval, then continue to increase and upgrade value at interval, point out that up to the result of selftest renewal instantly is disabled at interval.Like this, just, can find out the renewal interval of the longest (available).
Opposite, if renewal at the beginning is disabled at interval, then reduce to upgrade value at interval, carry out selftest again one time.If the renewal after the change can not be used again at interval, then continue to reduce to upgrade value at interval, point out that up to the result of selftest renewal instantly is available at interval.Like this, just, can find out the longest (available) upgrades at interval.
In other words, when not finding as yet the longest update time (in the symbol 22 not), then change the value of update time.In case after finding the longest update time, just can carry out next procedure.
Utilize similar above-mentioned approximatioss, the longest renewal just can be found at interval.Then just can define the most appropriate renewal interval 26.For example, the poorest in all DRAM storage unit if the data hold capacity of tested DRAM storage unit belongs to, then directly use the longest renewal at interval at interval as the most appropriate renewal.If tested DRAM storage unit only is take a sample in all DRAM storage unit several, its data hold capacity might not be the poorest in all DRAM storage unit, then the most appropriate the renewal should be to add a preset value outside the longest renewal of finding at interval at interval, and the DRAM storage unit of not testing with prevention lost efficacy when upgrading.
At last, dram chip is to have the most appropriate renewal update interval clock pulse, to come the DRAM array is upgraded when normal running.Like this, not only the data of being deposited in the DRAM array can not lost, and also do not have too much waste of energy on unnecessary more new element.
The length of original test patterns and content can design according to DRAM array structure difference.Can certainly choose at random.
Fig. 2 is according to a ring-type oscillator 32 of the present invention.Its several reversers 30 are serially connected, and the output of last reverser 30 is connected to the input of first reverser 30, just form a ring-type oscillator 32, and its concussion period T depends on the current driving ability and the load of each reverser.And the renewal among the present invention at interval therewith the concussion period T that produces of ring-type oscillator 32 present positive correlation.
Fig. 3 is the circuit diagram of the reverser 30 among Fig. 2.The current driving ability of reverser 30 can be controlled by a voltage Vo.In Fig. 2, Vo has controlled the discharge current size of reverser 30, therefore can change the concussion cycle of ring-type oscillator 32.When Vo raise, discharge current increased, and the concussion period T just diminishes.
Fig. 4 is the Vo control circuit embodiment among Fig. 3.Counter 34 is in order to producing a numerical value, and counter 34 is subjected to the number signal controlling of number/down, this numerical value can be increased and decreased.Digital analog converter (digital-to-analog converter, D/A) 36, receive this numerical value, produce corresponding Vo.Please contrast Fig. 1, last number/the number signal is determined in step 22 down.For example, oversize at interval when instantly renewal, and the data that can cause depositing in the DRAM storage unit are when losing, just should make number on the counter 34, and then Vo improves, and the concussion cycle of ring-type oscillator 32 just shortens, and the renewal when making selftest next time is littler at interval than renewal instantly at interval.Opposite, renewal when instantly is short to the data of depositing in the DRAM storage unit at interval and can lose, also uncertain renewal instantly is exactly the longest renewal at interval the time at interval, and counter 34 just should descend number, and the renewal when making selftest next time is longer at interval than renewal instantly at interval.After determining to have found the longest renewal at interval, just can find out appropriate renewal at interval according to the present numerical value of counter 34.
After dispatching from the factory in the known dram chip just fixing renewal at interval, the renewal that method of the present invention found at interval will be different and may produce different values along with dram chip.Therefore, reached the benefit of saving electric energy.
Though the present invention discloses as above with a preferred embodiment; yet it is not in order to limit the present invention; any person skilled in the art person without departing from the spirit and scope of the present invention; when can making all changes and replacement, so protection scope of the present invention is when looking being as the criterion that accompanying Claim defines.
Claims (3)
1. find out appropriate renewal method at interval for one kind, be applicable to a dynamic random access memory chip, include:
(a) detect the state whether this dynamic random access memory chip is in firm startup;
(b) when just starting state, provide one to upgrade clock pulse, have one and upgrade at interval;
(c) upgrade clock pulse according to this, make a plurality of storage unit in this dynamic random access memory chip carry out selftest;
(d) change this renewal at interval, and repeat this step (c), up to finding the longest renewal interval that can make this dynamic random access memory chip selftest success; And
(f) at interval, define this most appropriate renewal at interval,, upgrade to provide this dynamic random access memory chip when general power supply is supplied according to this longest renewal.
2. the method for claim 1 is characterized in that, the step of carrying out this selftest includes:
Deposit this storage unit one original test patterns in;
Upgrade clock pulse with this, this storage unit is carried out at least once more new element;
Whether detect a memory code that is deposited in consistent with this original test patterns;
If the memory code that this quilt deposits in is consistent with this original test patterns, then point out this selftest success; And
If the memory code that this quilt deposits in is inconsistent with this original test patterns, then point out this selftest failure.
3. the method for claim 1 is characterized in that, defines this most appropriate renewal step at interval and includes the following step:
This longest upgrades is added a default difference at interval, with at interval as this most appropriate renewal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03145213 CN1567214A (en) | 2003-06-23 | 2003-06-23 | Adaptation type method for controlling refresh interval of DRAM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03145213 CN1567214A (en) | 2003-06-23 | 2003-06-23 | Adaptation type method for controlling refresh interval of DRAM |
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| Publication Number | Publication Date |
|---|---|
| CN1567214A true CN1567214A (en) | 2005-01-19 |
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| CN 03145213 Pending CN1567214A (en) | 2003-06-23 | 2003-06-23 | Adaptation type method for controlling refresh interval of DRAM |
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- 2003-06-23 CN CN 03145213 patent/CN1567214A/en active Pending
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