CN1553296A

CN1553296A - Computer device for converting AGP interface to PCI interface and converting method

Info

Publication number: CN1553296A
Application number: CNA2003101239384A
Authority: CN
Inventors: 陈宇光; 曾瑛俊
Original assignee: ASRock Inc
Priority date: 2003-12-19
Filing date: 2003-12-19
Publication date: 2004-12-08
Anticipated expiration: 2023-12-19
Also published as: CN100418035C

Abstract

In the present invention, a host plate including a PCI controller and AGP plug slot is provided as AGP plug slot has a numbers of signal pin and partial signal pins of AGP plug slot are connected to PCI controller with the other signal pins opened.

Description

Be the computer apparatus of PCI interface and the method for conversion with the AGP Interface

Technical field

The present invention about a kind of be the computer apparatus of PCI interface and the method for conversion with the AGP Interface, especially a kind of pci controller is connected to the AGP slot, take with the AGP Interface as the computer apparatus of PCI interface and the method for conversion.

Background technology

Motherboard belongs to the element of the bottom in the whole computer system, is responsible for carrying central processing unit, System on chip group memory, and contacting and data transfer path of these elements and other peripheral devices is provided. The main element of motherboard includes System on chip group and connector. The System on chip group is the maincenter element of whole computer system running, and major function is to be responsible between all the other elements, the distribution of signal and data and transmission, and the different central processing units different System on chip group of use of need arranging in pairs or groups. The function of connector then is to connect computer system each several part element, such as display card, central processing unit, memory and hard disk etc.

The framework of System on chip group generally is to adopt the separately independently design of south bridge (South Bridge), north bridge (North Bridge) wafer. And element and function that north and south bridge wafer is controlled are also had nothing in common with each other. Please refer to Fig. 1, show a typical System on chip group framework. North bridge wafer 100 is near central processing unit 120, mainly is responsible for data, the signal transmission of central processing unit 120,

main storage

140 and 0 of AGP slot 16, and by specific transfer protocol and 200 communications of south bridge wafer. Reception and the transmission of every peripheral device 220,240,260,280 import and export signals (Input/Output Signal) on 200 responsible motherboards of south bridge wafer. The interrupt request that south bridge wafer 200 can send these peripheral devices (Interrupt Request) sees through north bridge wafer 100 and is passed to central processing unit 120. By this, central processing unit 120 is distributed working procedure and the action that institute's wish is carried out. In addition, in order to connect every peripheral device 220,240,260,280, include the controller of IDE controller, USB controller and soft dish, keyboard and the mouse of pci controller, hard disk and CD-ROM device in the south bridge wafer.

The AGP interface is derived by the basis take the PCI interface, and its operational paradigm can reach the several times of PCI interface. The main purpose of AGP interface is pinup picture (Texture Mapping) function that adopts in response to the 3D picture, to deal with required that mass data transmits between memory and AGP. Please refer to table one, tabular goes out the difference of AGP interface and PCI interface. As shown in Table, the AGP interface is not only that from the difference of PCI interface employed connector specification is different, and the two data transfer mode that adopts is also different.

Table one

Interface	AGP	PCI
Interface	AGP	PCI	Data processing speed	32Bits	32Bits
Frequency	66MHz	33/66MHz (being generally 33MHz)	Data processing speed	32Bits	32Bits
Frequency	66MHz	33/66MHz (being generally 33MHz)	Pin count	132 bilayers (4X), 124 bilayers (8X)	120 individual layers
Transmit the mode of data	Multi-pipeline (pipelined)	Non-channelization	Pin count	132 bilayers (4X), 124 bilayers (8X)	120 individual layers
Transmit the mode of data	Multi-pipeline (pipelined)	Non-channelization	Address and data transfer	Address/data is uncommon	Address/data is common
Transmission speed	1066M/S(4X) 2133MB/S(8X)	133MB/S(33MHz)	Address and data transfer	Address/data is uncommon	Address/data is common

The characteristic of AGP interface and advantage mainly contain following several:

One, multiplex's function of excluded address line: the AGP slot aims at Presentation Function and designs, and does not have the transmission of other data-signals, therefore, after multiplex's function of excluded address line, can promote the operating efficiency of AGP interface.

Two, incorporate the theory of using high memory area (Upper Memory Area, UMA) into: elasticity is adjusted the needed memory space of Presentation Function, to improve treatment efficiency.

Three, ingenious transmission shows information: keep previous demonstration information, only transmission has the partial data of change, to increase the efficient of transmission.

Four, redefine the mode that transmits data: the AGP interface is exclusively used in Presentation Function, therefore, has more simple transfer of data operating environment. Via redefining transmission means with special pipeline (pipeline) deal with data, can improve data-handling efficiency.

As above-mentioned, because the AGP interface provides better transmission speed, display card now adopts the design of AGP interface more. On the contrary, the display card of PCI interface is more and more rare, but wafer set manufacturer (for example Intel) still continues the north bridge wafer (for example 845GV) that the lower-order of AGP interface is not supported in release. Therefore, for old-fashioned motherboard, if the System on chip group can't be supported the AGP interface, or its north bridge wafer of new-type motherboard is not supported the AGP interface, the PCI interface display card that share will be more and more be difficult to find, the awkward situation that to use without display card will be caused. Secondly, if want the computer system of framework TVGA, the purpose that shows to reach double screen. Because the System on chip group on the general motherboard only has one group of AGP slot, so only can support single AGP display card, another display card have to adopt the display card of PCI interface, the puzzlement that the display card that also will face the PCI interface like this is difficult to obtain.

Please refer to Fig. 2, in known technology, adopting an adapter 20 is the PCI interface with the AGP Interface. As shown in FIG., one side of adapter 20 has PCI golden finger 22, opposite side is AGP slot 24, and wherein PCI golden finger 22 inserts the PCI slot 12 on the motherboards 10, and the AGP slot 24 of opposite side then connects an AGP display card 30 (display card of an AGP interface). It should be noted that, as shown in Figure 3A, when AGP display card 30 is inserted on the motherboard 10 via an AGP slot 14, the import and export end of this AGP display card 30 must correctly correspond to the opening of the backboard (back panel) of computer chassis 40, otherwise this AGP display card 30 can't be locked on the computer chassis 40, and the use of the import and export end of display card 30 also can be hindered.

Therefore, please refer to Fig. 3 B, if increase by an adapter 20 at PCI slot 12, the position of AGP display card 30 will be therefore and on move, and cause the lockhole 32 of display card 30 can't involutory lockhole 42 on computer chassis 40, will cause this AGP display card 30 use, assembling and the difficulty of fixing.

Summary of the invention

In view of this, to propose a kind of be the computer apparatus of PCI interface and the method for conversion with the AGP Interface in the present invention.

Main purpose of the present invention is to provide a kind of motherboard, can be the PCI interface with the AGP Interface, therefore, can solve the puzzlement that PCI interface display card is difficult to obtain.

Another object of the present invention is to provide a forwarding method, cause the AGP display card can't involutoryly be fixed in the puzzlement of computer chassis to solve use adapter in the traditional approach.

In the motherboard of the present invention, a pci controller can be independently IC or is positioned at north bridge or the south bridge wafer, and-the part signal pin (I/O pins) of AGP slot connects so far pci controller. In being connected to the signal pin of pci controller, include a plurality of address/data pins (A/D pin), as the usefulness of transmitting address and data. Secondly, the AGP slot is connected with a voltage source. The magnitude of voltage that this voltage source provides corresponds to the employed driving voltage value of PCI slot.

In addition, in all pins of this AGP slot, in order to showing the pin of AGP feature, such as: address control (Strobe) pin, status signal (Status Signal) pin, side signal (Sideband Signal) pin, read buffers alarm signal (Read Buffer Full signal) pin, write buffer alarm signal (Write Buffer Full Signal) the equal sky of pin and connect.

The invention provides a kind of is the method for PCI interface with the AGP Interface, comprises the following steps: at least to provide motherboard or the circuit board with pci controller; Form an AGP slot on this motherboard or circuit board, and this AGP slot have first group of signal pin and second group of signal pin; Then the first group of signal pin that connects this AGP slot be pci controller so far, and to keep second group of signal pin be that sky meets (opened).

Can be further understood by the following detailed description and accompanying drawings about the advantages and spirit of the present invention.

Description of drawings

Fig. 1 is the schematic diagram of a typical System on chip group framework.

Fig. 2 is that the employing adapter is the schematic diagram of the framework of AGP interface with the PCI Interface.

Fig. 3 A and Fig. 3 B see through adapter with the AGP display card to plug together in the schematic diagram of PCI slot.

Fig. 4 A is the schematic diagram of a preferred embodiment of the present invention.

Fig. 4 B is the schematic diagram of another preferred embodiment of the present invention.

Fig. 4 C is the schematic diagram of another preferred embodiment of the present invention.

Fig. 5 is the pin bitmap of a typical AGP slot.

Fig. 6 is the pin bitmap of a typical PCI slot.

Fig. 7 is the pin bitmap of AGP slot among the present invention.

Fig. 8 is that the present invention is the flow chart of method one preferred embodiment of PCI interface with the AGP Interface.

Fig. 9 is that employing mainboard architecture of the present invention is the schematic diagram of computer system one preferred embodiment of main body.

Table one has been listed the difference of AGP interface and PCI interface.

Each AGP feature pin of table two classification declaration.

The empty pin position of each AGP slot of table three classification declaration.

The specific embodiment

Please refer to Fig. 4 A, it shows that the present invention is mainboard architecture one preferred embodiment of PCI interface with the AGP Interface. As shown in FIG., this mainboard architecture comprise a north bridge wafer 100, a south bridge wafer 200 ,-AGP slot 230 and at least one PCI slot 220. North bridge wafer 100 is connected with central processing unit 120 and main storage 140, and is connected to south bridge wafer 200 through a pci bus (PCI bus). And having a pci controller 210 in the south bridge wafer 200, this pci controller 210 is connected to AGP slot 230 and PCI slot 220 simultaneously.

In Fig. 4 A, pci controller 210 is positioned within the south bridge wafer 200. Yet also be not limited to this, this pci controller 210 can also be made in the north bridge wafer 100 if needed, or is made in separately one independently on the wafer and be an IC independently. Be made in separately at pci controller 210 in the situation of an individual wafers, shown in Fig. 4 B, AGP slot 230 can see through this pci controller 210 and be connected to south bridge wafer 200, or shown in Fig. 4 C, AGP slot 230 sees through this pci controller 210 and is connected directly to north bridge wafer 100.

Please refer to Fig. 5 and Fig. 6, show respectively the pin bitmap of a typical AGP slot and a typical PCI slot. As shown in FIG., relatively the signal pin that the PCI slot is all can be found in the pin position of AGP slot and PCI slot, all can find corresponding pin in the pin bitmap of AGP slot. Otherwise, with regard to the AGP slot, except these correspond to the pin of PCI slot fully, also increased in addition 20 in order to present the AGP feature pin of AGP transmission characteristic. Following table two is that these 20 AGP feature pins are given classification declaration.

Table two

Title	Functional description
Title	Functional description	AGP side addressing signal
PIPE#	Pipeline reads (Pipelined Read) signal: the proprietary pipelined data transfer function of AGP is provided.	AGP side addressing signal
PIPE#		SBA[7:0]	Side addressing (Sideband Address) signal: provide extra bus for transfer address (Address) and instruction (Command).
AGP data flow con-trol signal		SBA[7:0]
AGP data flow con-trol signal		RBF#	Read buffers caution (Read Buffer Full) signal: in order to notifying the AGP controller, display card is saturated and can't receive number again

	According to.
	According to.	WBF#	Write buffer caution (Write Buffer Full) signal: be to notify display card AGP controller saturated, and can't data writing.
The AGP status signal		WBF#
The AGP status signal		ST[2:0]	State (Status) signal: be the executing state that shows the AGP display card.
The AGP clock signal		ST[2:0]
The AGP clock signal		ADSTB_A	Address/data bus control (AD Bus Strobe A) signal: provide address/data bus, the usefulness of sequential (Timing) control.
ADSTB_B	Another address/data bus control (AD Bus Strobe B) signal: provide address/data bus, the usefulness of sequential (Timing) control.	ADSTB_A
ADSTB_B		SBSTB	Side control (Sideband Strobe) signal: provide the side signal bus, the usefulness of sequential (Timing) control.

As shown in Table 2, these AGP feature pins can be divided into AGP side addressing signal, AGP data flow con-trol signal, AGP status signal and AGP clock signal four classes. AGP side addressing signal system is in order to realize the distinctive multi-pipeline of AGP interface (Multi-Pipelined) transfer function and side addressing (Sideband Addressing) function. AGP clock signal system is in order to the sequential of control signal transmission, to replace the timer of PCI interface. AGP data flow con-trol signal and AGP status signal are in order to point out the user AGP operating state of display card.

In addition, no matter be AGP slot or PCI slot, all must connect a driving voltage source (not shown), drive the required voltage of each pin import and export signal to provide. Generally speaking, typical AGP slot uses 1.5 volts or 3.3 volts import and export driving voltage value, and typical PCI slot uses 3.3 volts or 5 volts import and export driving voltage value.

As above-mentioned, please refer to simultaneously Fig. 7, in order to connect pci controller and AGP slot, make simultaneously the PCI controller keep normal operation. Such as step 300, at first, the part signal pin of AGP slot (first group of signal pin) is connected to pci controller, and all the other signal pins (second group of signal pin) keep sky to meet (opened), that is this AGP slot remaining part signal pin (second group of signal pin) except first group of signal pin is not used. These signal pins that connect (not being connected to pci controller) by sky comprise (1) address and control pin, (2) status signal pin, (3) side signal pin, (4) read buffers alarm signal pin and write buffer alarm signal pin with (5). Following table three is connect the signal pin classification declaration of (not being connected to pci controller) with these by sky.

Table three

Title	The pin position
Title	The pin position	OVRCNT#	B1
USB	A4，B4	OVRCNT#	B1
USB	A4，B4	RESERVED	A22，B22，A24，A44，B44，A42
PIPE#	A12，B14	RESERVED	A22，B22，A24，A44，B44，A42
PIPE#	A12，B14	SBA[7:0]	A15，B15，A17，B17，A20，B20，A21，B21
RBF#	B12	SBA[7:0]	A15，B15，A17，B17，A20，B20，A21，B21
RBF#	B12	WBF#	A14
ST[2:0]	A10，B10，B11	WBF#	A14
ST[2:0]	A10，B10，B11	ADSTB	A32，B32，A59，B59
SBSTB	A18，B18	ADSTB	A32，B32，A59，B59

The pin of listing in the table three can be divided into two classes, and generic tradition AGP slot is the empty pin that connects just originally, such as three kinds of OVRCNT#, USB and RESERVED. The another kind of listed AGP feature pin of table two (totally 20) that then belongs to namely comprises address control pin, status signal pin, side signal pin, read buffers alarm signal pin and writes buffer alarm signal pin. Therefore, with regard to the angle of pci controller, no matter be connected to PCI slot or AGP slot, all use identical bus configuration pattern. Therefore, with regard to the angle of pci controller, no matter be connected to PCI slot or AGP slot, all use identical bus configuration pattern.

Secondly, because the listed AGP feature pin of table two is the transmission characteristic that presents the AGP slot, therefore, such as step 320, each AGP feature pin of AGP slot all keeps sky to connect the state of (opened). In other words, make exactly these AGP feature pins remain open-circuit condition. It should be noted that the above-mentioned AGP feature of PCI slot pin belongs to useless for pci controller. Again, even if these AGP feature pins are connected to the north bridge wafer, because each signal/address (A/D) pin of this AGP slot all is connected to the PCI controller, the north bridge wafer is the running of uncontrollable AGP slot also.

Subsequently, as above-mentioned, because the driving voltage value that the AGP slot uses is different from the PCI slot, therefore, such as step 340, the AGP slot must be connected to a PCI driving voltage source. This PCI driving voltage source can provide the driving voltage value that meets the PCI specification, to correspond to the required of pci controller.

Please refer to Fig. 8, the figure illustrates and adopting mainboard architecture of the present invention is computer system one preferred embodiment of main body. As shown in FIG., north bridge wafer 100 is to be connected with central processing unit 120, main storage 140 and an AGP slot 232, and is connected to south bridge wafer 200 through a bus (bus). Have a pci controller 210 in the south bridge wafer 200, and this pci controller 210 connects the 2nd AGP slot 234 and three PCI slots 220 simultaneously.

As shown in the figure, provide two AGP slots 232 and 234 in this computer system, the user can insert two AGP display cards 250, the one, see through north bridge wafer 100, running speed according to the AGP interface is carried out, and another then sees through south bridge wafer 200, carries out according to the running speed of PCI interface. Therefore, this computer system can provide two AGP display cards 250 to carry out the demand that double screen shows.

Again, use adapter 20 with the mode of PCI Interface as the AGP interface in Fig. 3, conversion regime and mainboard architecture proposed by the invention have following advantages:

One, as shown in Figure 4, mainboard architecture of the present invention directly uses AGP slot 230 to replace PCI slot 220, has therefore omitted adapter, and can reduce the use of motherboard element, to reduce cost of manufacture.

Two, as aforementioned, the present invention has omitted adapter, thereby the computing signal that has shortened the AGP display card transfers to the line distance of pci controller. Therefore, can reduce the consume of signal transduction process, faster signal transmission speed is provided simultaneously.

Three, the present invention directly is made in the AGP slot on the motherboard, and therefore, any AGP display card inserts this AGP slot as inserting traditional AGP slot (being connected to the north bridge wafer). Thereby can avoid among the 3rd B figure, known technology is because using adapter 20, the puzzlement that causes display card 30 can't involutory lockhole 42 on computer chassis 40 to produce.

The above is to utilize preferred embodiment to describe the present invention in detail, but not limit the scope of the invention, and be familiar with the art person and should be able to understand, suitably do slightly change and adjustment, will not lose main idea of the present invention place, also not break away from the spirit and scope of the present invention.

Claims

1. motherboard comprises at least:

One pci controller; And

One AGP slot has a plurality of signal pins, and wherein this signal pin of part is connected to this PCI controller.

2. motherboard as claimed in claim 1 is characterized in that, above-mentioned AGP slot uses one 1.5 to 12 volts voltage source.

3. motherboard as claimed in claim 1 is characterized in that, also comprises a south bridge wafer, and wherein above-mentioned pci controller is arranged in this south bridge wafer.

4. motherboard as claimed in claim 1 is characterized in that, the signal pin of above-mentioned AGP slot comprises the address/data pin.

5. motherboard as claimed in claim 1 is characterized in that, the address/data pin of above-mentioned AGP slot is connected to above-mentioned pci controller.

6. motherboard as claimed in claim 1 is characterized in that, the address control pin sky of above-mentioned AGP slot connects.

7. motherboard as claimed in claim 1 is characterized in that, the status signal pin sky of above-mentioned AGP slot connects.

8. motherboard as claimed in claim 1 is characterized in that, the side signal pin sky of above-mentioned AGP slot connects.

9. motherboard as claimed in claim 1 is characterized in that, the read buffers alarm signal pin sky of above-mentioned AGP slot connects.

10. motherboard as claimed in claim 1 is characterized in that, the buffer alarm signal pin sky that writes of above-mentioned AGP slot connects.

11. motherboard as claimed in claim 1 also comprises at least one PCI slot and is connected to this pci controller.

12. a computer system comprises at least:

One pci controller;

One AGP slot has a plurality of signal pins, and wherein this signal pin of part is connected to this PCI controller; And

One AGP interfare device is connected to this pci controller via this AGP slot.

13. computer system as claimed in claim 12 is characterized in that, above-mentioned AGP interfare device is the display card of an AGP interface.

14. computer system as claimed in claim 12 is characterized in that, above-mentioned AGP slot uses one 1.5 to 12 volts voltage source.

15. computer system as claimed in claim 12 is characterized in that, also comprises a south bridge wafer, wherein above-mentioned pci controller is arranged in this south bridge wafer.

16. computer system as claimed in claim 12 is characterized in that, the signal pin of above-mentioned AGP slot comprises the address/data pin.

17. computer system as claimed in claim 12 is characterized in that, the address/data pin of above-mentioned AGP slot is connected to above-mentioned pci controller.

18. computer system as claimed in claim 12 is characterized in that, the address control pin sky of above-mentioned AGP slot connects.

19. computer system as claimed in claim 12 is characterized in that, the status signal pin sky of above-mentioned AGP slot connects.

20. computer system as claimed in claim 12 is characterized in that, the side signal pin sky of above-mentioned AGP slot connects.

21. computer system as claimed in claim 12 is characterized in that, the read buffers alarm signal pin sky of above-mentioned AGP slot connects.

22. computer system as claimed in claim 12 is characterized in that, the buffer alarm signal pin sky that writes of above-mentioned AGP slot connects.

23. one kind is the method for PCI interface with the AGP Interface, comprises the following steps: at least

One motherboard is provided, and this motherboard comprises a pci controller;

Form an AGP slot on this motherboard; And

Connect the part signal pin of this AGP slot to this pci controller.

24. method as claimed in claim 23 is characterized in that, comprises that also the voltage source that connects one 1.5 to 12 volts is to this AGP slot.

25. method as claimed in claim 23 is characterized in that, the control of the address of above-mentioned AGP slot pin, status signal pin, side signal pin, reads the alarm signal pin and writes the alarm signal pin and all remain sky and connect.

26. a motherboard comprises at least:

One pci controller; And

One AGP slot has first group of signal pin and second group of signal pin, and wherein this first group of signal pin is connected to this pci controller, and this second group of signal pin is that sky connects.

27. one kind is the method for PCI interface with the AGP Interface, comprises the following steps: at least

One motherboard is provided, and this motherboard comprises a pci controller;

Form an AGP slot on this motherboard, this AGP slot has first group of signal pin and second group of signal pin; And

Connect this first group of signal pin of this AGP slot to this pci controller, and to keep this second group of signal pin be that sky connects.