CN1549542B

CN1549542B - Digital communication system resetting apparatus and method

Info

Publication number: CN1549542B
Application number: CN 03113486
Authority: CN
Inventors: 郁志勇; 徐宏慧
Original assignee: ZTE Corp
Current assignee: ZTE Corp
Priority date: 2003-05-15
Filing date: 2003-05-15
Publication date: 2011-08-10
Anticipated expiration: 2023-05-15
Also published as: CN1549542A

Abstract

In the present invention, two different signals are sent out separately by watchdog circuit when CPU is on/manual reset and CPU operation is interrupted and reset signal and reset state signal representing reset source are sent out to CPU by logic operation unit according to these two signals, a warning signal representing its working state is sent to CPU by peripheral service chip and whether peripheral service chip is reset or not is judge by CPU based on the warning signal and reset state signal at the same time when CPU is reset.

Description

Digital communication system resetting means and method

Technical field

The present invention relates to a kind of digital communication system, the resetting system in particularly a kind of digital communication system.

Background technology

Fast development along with the communications industry, the application of digital communication system more and more widely, and the resetting system in the digital communication system is a very important part, simply, resetting system is significant undoubtedly to the operational efficiency that improves whole digital communication system efficiently.Fig. 1 is a digital communication system resetting means structure chart commonly used at present, it comprises watchdog circuit, CPU and out-out business chip, export reset signal/RESET respectively to CPU and out-out business core by watchdog circuit, in cpu reset, the out-out business that resets in the lump chip.The advantage that adopts this resetting system is that circuit is simple and clear, realize easily, required resetting time is short, but its weak point also clearly: in case the long-time load of CPU is overweight, can't respond for a long time the user order, can't be to webmaster report and alarm indication, also just can't feed dog (being commonly called as " race extremely ") to house dog, the out-out business chip that can reset simultaneously when resetting CPU, the peripheral chip business that may interrupt original normal operation.

Moreover at present in the digital communicating field, digital communication system is more complicated all generally, except that CPU, comprise a lot of out-out business chips toward contact.CPU except system manually/carry out hardware check during electrification reset, outside the configuration of initialization and business chip, the monitoring that when system normally moves, also will alarm, transceive data and some calculating etc., because the problem of board software design and extraneous strong jamming, CPU is may load too heavy, can't respond user's order for a long time and to the webmaster report and alarm, but the business of out-out business chip is often still normal, out-out business chip in this case should not reset, and existing resetting system can't be accomplished this point, therefore, press for a kind of new resetting system and realize this purpose, to guarantee the operational efficiency of digital communication system.

Summary of the invention

The objective of the invention is to overcome the defective that resetting system in the existing digital communication system may interrupt moving originally normal out-out business chip business, so that a kind of simple and reliable resetting means and repositioning method to be provided, when cpu load is overweight, reset CPU and do not interrupt moving originally the business of normal out-out business chip, thus the operational efficiency of the system of assurance.

For realizing described purpose, the present invention has constructed a kind of digital communication system resetting means, comprises watchdog circuit, CPU and out-out business chip, it is characterized in that, also comprises arithmetic logic unit;

Described watchdog circuit powering on/send two different signals when hand-reset and the long-time load of described CPU are overweight respectively, described arithmetic logic unit is according to these two signals, send the reset mode signal in reset signal and indication reset source to described CPU, described out-out business chip sends an alarm signal that shows its operating state to described CPU;

Described CPU reads the reset mode signal, is to power on/hand-reset if this reset mode signal indicating resets, and described out-out business chip resets when resetting described CPU; Overweight the resetting of causing of the long-time load of CPU as described in as this reset mode signal indicating being, then CPU reads the alarm signal of the operating state of described out-out business chip, described CPU handles the described arithmetic logic unit of back input to this alarm signal, if there is high severity alarm, the then described arithmetic logic unit described out-out business chip that resets when resetting described CPU, if there is no high severity alarm, the then described arithmetic logic unit described out-out business chip that need not to reset when resetting described CPU.

The invention allows for a kind of digital communication system repositioning method, it is characterized in that, may further comprise the steps:

(1) watchdog circuit produces reset signal input arithmetic logic unit, and described arithmetic logic unit is sent the reset mode signal of reset signal and expression reset source to CPU;

(2) the described CPU that resets;

(3) described CPU reads the reset mode signal, is to power on/hand-reset if this reset mode signal indicating resets, and skips to step (5), as this reset mode signal indicating reset be as described in overweight the resetting of causing of the long-time load of CPU, go to step (4);

(4) read the state of described out-out business chip, judge whether to exist high severity alarm,, then skip to step (5) if there is high severity alarm, otherwise, recover on-the-spot, skip to step (6);

(5) the out-out business chip that resets, hardware check, initialization, and reconfigure described out-out business chip;

(6) end that resets, whole system is normally moved.

Digital communication system resetting means of the present invention and method, distinguished different reset circuits by the reset source index signal that is sent to CPU, whether judge in the described CPU that resets the needs described out-out business chip that resets according to the state of different reset circuits and described out-out business chip then, thereby avoid under the situation of described out-out business chip operate as normal, it being resetted, further avoid interrupting the normal operation of described out-out business chip, improved the operational efficiency of digital communication system.

Description of drawings

Fig. 1 is a digital communication system resetting means structure chart commonly used at present;

Fig. 2 is a digital communication system resetting means structure chart of the present invention;

Fig. 3 is a digital communication system repositioning method flow chart of the present invention.

Embodiment

Describe the preferred embodiments of the present invention in detail below in conjunction with accompanying drawing.

Fig. 2 is a digital communication system resetting means structure chart of the present invention.The CPU that the digital communication system resetting means adopts in this accompanying drawing is the XPC860TCZP66D4 type of motorola inc, watchdog circuit adopts the MAX706 of MAXIM, MR is the hand-reset signal of input house dog, when WDI is the CPU operation house dog is fed hello the dog input signal of dog, / RESET and/WDO is two reset signals of watchdog circuit output, / RESET powers on/the hand-reset signal, / WDO is that cpu load is overweight, can't respond user's order for a long time, can't indicate the reset signal that resets that causes to the webmaster report and alarm, described reset signal is the reset signal/RST that is sent to CPU through the result of arithmetic logic unit computing, this signal is by the PORESET pin input CPU of CPU, and the logical operation between them concerns coincidence formula/RST=/RESET.AND./WDO (wherein .AND. represents and logic); Simultaneously, arithmetic logic unit will be indicated the input/output port GPIO input CPU of the reset mode signal STATUS of interrupt source by CPU, wherein, STATUS=/RESET, CPU receives the alarm signal ALM of out-out business chip by another input/output port GPIO, send signal/RST_ALM to arithmetic logic unit, arithmetic logic unit is carried out logical operation to received signal according to formula/RST_PHL=/RST_ALM.AND./RESET, and operation result input out-out business chip.If reset mode signal STATUS is a low level, show to be reset to power on/hand-reset that the out-out business chip then resets in the CPU that resets; Then show and reset if reset mode signal STATUS is a high level by overweight the causing of the long-time load of CPU, whether the business that will further consider the out-out business chip that signal/RST_ALM is indicated exists high severity alarm, if there is no high severity alarm, then this signal is a high level through arithmetic logic unit calculated result/RST_PHL, at this moment, the out-out business chip need not reset, if/RST_PHL is a low level, there is high severity alarm in the business that then shows the out-out business chip, at this moment, the out-out business chip that resets in the lump.Arithmetic logic unit adopts computer programmable logical device (CPLD, Computer Programable Logic Device) usually.

Fig. 3 is a digital communication system repositioning method flow chart of the present invention, may further comprise the steps:

(301) arithmetic logic unit receive that watchdog circuit produces manually/power-on reset signal/RESET and because of the reset signal/WDO of the overweight generation of the long-time load of CPU, calculate reset signal/RST that Controlled CPU resets according to formula/RST=/RESET.AND./WDO, input CPU;

(302) CPU that resets;

(303) described CPU reads reset mode signal STATUS, if STATUS=0, showing resets is to power on/hand-reset, skips to step (305), as STATUS=1, shows overweight the causing of the long-time load of described CPU that reset, and goes to step (304);

(304) read the state of described out-out business chip, see whether there is high severity alarm, if there is high severity alarm, be ALM=1, then skip to step (305), otherwise, before preservation resets, read significant variable the memory block of program state, return to the state before resetting, skip to step (306);

(305) the described out-out business chip that resets, hardware check, initialization, and reconfigure described out-out business chip;

(306) end that resets, whole system is normally moved.

Claims

1. a digital communication system resetting means comprises watchdog circuit, CPU and out-out business chip, it is characterized in that: also comprise arithmetic logic unit;

Described watchdog circuit powering on/hand-reset and the long-time load of described CPU is overweight causes when resetting, send two different signals respectively, described arithmetic logic unit is according to these two signals, send reset signal and the reset mode signal of representing reset source to described CPU, described out-out business chip sends an alarm signal that shows its operating state to described CPU;

2. digital communication system resetting means according to claim 1 is characterized in that:

Described arithmetic logic unit is the computer programmable logical device.

3. digital communication system repositioning method is characterized in that: may further comprise the steps:

(2) the described CPU that resets;

(3) described CPU reads the reset mode signal, is to power on/hand-reset if this signal indicating resets, and skips to step (5), as this signal indicating be as described in overweight the resetting of causing of the long-time load of CPU, go to step (4);

(4) described CPU reads the alarm signal of the operating state of described out-out business chip, sees whether to have high severity alarm, if there is high severity alarm, then skips to step (5), otherwise, recover on-the-spot, skip to step (6);

(6) end that resets, whole system is normally moved.