CN1546972A - Embedded data logger for accurate phase measurement - Google Patents
Embedded data logger for accurate phase measurement Download PDFInfo
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- 238000005259 measurement Methods 0.000 title claims description 8
- 238000006243 chemical reaction Methods 0.000 claims abstract description 14
- 238000007781 pre-processing Methods 0.000 claims abstract 13
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Abstract
本发明公开了一种精确测量相位的嵌入式数据采集器。它包括预处理电路、A/D转换电路、FIFO存储器、键相信号倍频电路和微处理器。振动信号预处理电路的滤波器采用相位特性好的一价滤波电路，而且振动信号和键相信号的预处理电路的参数尽量一致，振动信号的相位误差减小。可编程放大电路和峰值保持器、比较器构成一个简单的放大倍数自动调节电路(AGC)，AGC电路的引入提高了键相信号预处理电路的稳定性。在键相倍频电路中引入了预测环节和鉴相环节，并且用FPGA和软件结合的方式实现，改善了倍频电路的性能，振动信号的相位误差也相应减小。
The invention discloses an embedded data collector for accurately measuring phase. It includes preprocessing circuit, A/D conversion circuit, FIFO memory, key-phase signal frequency multiplication circuit and microprocessor. The filter of the vibration signal preprocessing circuit adopts a monovalent filter circuit with good phase characteristics, and the parameters of the preprocessing circuit of the vibration signal and the key phase signal are as consistent as possible, and the phase error of the vibration signal is reduced. The programmable amplifying circuit, the peak hold device and the comparator constitute a simple magnification automatic adjustment circuit (AGC). The introduction of the AGC circuit improves the stability of the key-phase signal preprocessing circuit. In the frequency multiplication circuit of the key phase, the prediction link and the phase identification link are introduced, and the combination of FPGA and software is used to realize the performance of the frequency multiplication circuit, and the phase error of the vibration signal is correspondingly reduced.
Description
Affiliated technical field
The present invention relates to be directly transferred to vibrating device in the detectors measure solid, particularly relate to a kind of embedded data acquisition device of accurate Measurement Phase by utilization.
Background technology
The present invention proposes on the basis of patent " large rotating machine set on line state monitoring and fault diagnosis system (patent of invention number: ZL97102397.2) " (calling patent one in the following text) and " integrated vibration signal equiphase complete cycle Channels Synchronous Data Acquisition System high speed acquisition system (application for a patent for invention number: 02145406.x " (calling patent two in the following text).
At present, generally adopt current vortex or piezoelectric sensor, measure the vibration signal of rotating machinery, can be divided into amplitude and phase place two parts.Wherein amplitude can more accurately be measured, can satisfy the requirement of fault diagnosis, but because vibration signal, the pre-process circuit of key signal and the phase place that key phase frequency multiplier circuit all can influence signal, in the data acquisition unit of reality, the precision of phase measurement is not high.Phase information mainly contains two kinds: 1, and the phase differential between vibration signal and the key signal; 2, the phase differential between the different harmonic waves of vibration signal.First kind of phase differential also can be used for the overall dynamic-balance technology of rotating machinery, therefore extremely payes attention to.
Summary of the invention
The purpose of this invention is to provide a kind of embedded data acquisition device (said phase place is meant the phase differential between vibration signal and the key signal) of accurately Measurement Phase here, it is made of pre-process circuit, A/D change-over circuit, FIFO storer, key signal frequency multiplier circuit and microprocessor.
In order to achieve the above object, the technical solution used in the present invention is as follows:
The embedded data acquisition device of accurate Measurement Phase of the present invention comprises pre-process circuit, A/D analog to digital conversion circuit, FIFO push-up storage, key signal frequency multiplier circuit, microprocessor.Wherein:
1), pre-process circuit is divided into vibration signal pre-service and key signal pre-service two parts, wherein an end of vibration signal pre-process circuit links to each other with current vortex sensor, signal is input to bleeder circuit, the output of bleeder circuit is divided into two-way, one the tunnel through the low-pass filtering output DC component, and another road is through block isolating circuit and low-pass filtering output AC component; One end of key signal pre-process circuit links to each other with current vortex sensor, signal is input to partiting dc circuit, through the pulse signal of programmable amplifier, low-pass filtering, Schmidt trigger output digital level, programmable amplifier, low-pass filter, peak-holding circuit and comparer also constitute the automative interest increasing controlling circuit of a closure;
2), key signal frequency multiplier circuit one end connects pre-process circuit, signal is input to up counter, through fallout predictor, totalizer, latch and down counter output double frequency pulse signal, output signal is input in the phase detector through second frequency divider, and key signal is also imported phase detector simultaneously, and the output terminal of phase detector is linked in the totalizer, the clock signal that clock provides is input to down counter, and is input to up counter through first frequency divider.
The beneficial effect that the present invention has is: the wave filter of vibration signal pre-process circuit adopts the good monovalence filtering circuit of phase propetry, and the parameter of the pre-process circuit of vibration signal and key signal is consistent as far as possible, and the phase error of vibration signal reduces.The introducing of agc circuit has improved the stability of key signal pre-process circuit.In key phase frequency multiplier circuit, introduced prediction link and phase demodulation link, and realized, improved the performance of frequency multiplier circuit, reduced the phase error of vibration signal simultaneously with the mode of FPGA and software combination.
Description of drawings
Fig. 1 is the data acquisition module circuit block diagram;
Fig. 2 is a vibration signal pre-process circuit block diagram;
Fig. 3 is a vibration signal pre-process circuit schematic diagram;
Fig. 4 is a waveform synoptic diagram before and after the key signal pre-service;
Fig. 5 is a key signal pre-process circuit block diagram;
Fig. 6 is the frequency multiplier circuit block diagram;
Fig. 7 is a key signal pre-process circuit schematic diagram;
Fig. 8 is the frequency multiplier circuit system diagram;
Fig. 9 improves back frequency multiplier circuit block diagram;
Figure 10 is the phase detector principle;
Figure 11 is that frequency multiplier circuit improves the back system diagram.
Embodiment
As shown in Figure 1, accurately the embedded data acquisition device of Measurement Phase comprises pre-process circuit 1, A/D analog to digital conversion circuit 2, FIFO push-up storage 3, key signal frequency multiplier circuit 4, microprocessor 5.Wherein:
1), pre-process circuit is divided into vibration signal pre-service and key signal pre-service two parts, wherein an end of vibration signal pre-process circuit links to each other with current vortex sensor, as shown in Figure 2, signal is input to bleeder circuit 6, the output of bleeder circuit 6 is divided into two-way, and one the tunnel through low-pass filtering 7 output DC components, and another road is through block isolating circuit 8 and low-pass filtering 9 output AC components; One end of key signal pre-process circuit links to each other with current vortex sensor, as shown in Figure 5, signal is input to partiting dc circuit 10, through the pulse signal of programmable amplifier 11, low-pass filtering 12, Schmidt trigger 13 output digital levels, programmable amplifier 11, low-pass filter 12, peak-holding circuit 14 and comparer 15 also constitute the automative interest increasing controlling circuit of a closure;
2), key signal frequency multiplier circuit 4 one ends connect pre-process circuit 1, as shown in Figure 9, signal is input to up counter 16, through fallout predictor 21, totalizer 22, latch 19 and down counter 20 output double frequency pulse signals, output signal is input in the phase detector 23 through second frequency divider 24, key signal is also imported phase detector 23 simultaneously, the output terminal of phase detector 23 is linked in the totalizer 22, the clock signal that clock 18 provides is input to down counter 20, and is input to up counter 16 through first frequency divider 17.
As shown in Figure 3, the voltage divider 6 of said vibration signal pre-process circuit comprises two resistance R P2A, RP2B and voltage stabilizing diode D2 constitute passive bleeder circuit, operational amplifier U18D connects into the voltage follower form, low-pass filtering 7 comprises resistance R 1, capacitor C 13 constitutes the single order passive low ventilating filter, operational amplifier U18C, resistance R P2C, potentiometer W2 constitutes in-phase amplifier, block isolating circuit 8 comprises capacitor C 17, resistance R 4 is the single order passive high three-way filter, operational amplifier U18B, resistance R P2D, potentiometer W1 constitutes in-phase amplifier, low-pass filtering 9 comprises resistance R P2E, capacitor C 19 constitutes the single order passive low ventilating filter, and operational amplifier U18A connects into voltage follower.
As shown in Figure 7, the partiting dc circuit 10 of said key signal pre-process circuit comprises capacitor C 12, resistance R 16, resistance R 11 constitutes passive low ventilating filter, operational amplifier U12A connects into voltage follower, programmable amplifier 11 comprises D/A converting circuit U11, operational amplifier U12B and resistance R 5 constitute an inverting amplifier, 8 pin of D/A converting circuit U11 are input, and from the output of 7 pin of D/A converting circuit U12B, D10～D17 of D/A converting circuit U11 is connected on the microprocessor, low-pass filtering 12 comprises resistance R 6, capacitor C 15 constitutes the single order passive low ventilating filter, D/A converting circuit U12D, resistance R 10, R12 constitutes in-phase amplifier, Schmidt trigger 13 comprises by resistance R 14, diode D2 and Schmidt circuit U2F constitute, peak-holding circuit 14 comprises the 5 pin input from operational amplifier U1B, through resistance R 1, diode D1 output, capacitor C 1 and resistance R 3 constitute a voltage retainer, comparer 15 comprises resistance R 4, R13, R15 carries out dividing potential drop to supply voltage, as operational amplifier U1A, the reference voltage of U1C, resistance R 17 and diode D5 constitute amplitude limiter circuit, and resistance R 18 and diode D6 constitute amplitude limiter circuit.
The data acquisition unit that the present invention proposes is the part of embedded failure diagnosis system.This fault diagnosis system is based on embedded microcontroller (MCU) and embedded OS (RTOS).Form by 3 parts by function: data acquisition, data analysis and Web server.
1, data acquisition unit structure
As shown in Figure 1, pre-process circuit is a mimic channel, and vibration signal and key signal all need through pre-service, but circuit and different.Vibration signal is 4 the tunnel, key signal 1 tunnel.The key signal frequency multiplier circuit carries out frequency multiplication and trigger mode/number (A/D) conversion to key signal, and another function is to measure rotating speed.
The chip signal of A/D change-over circuit is MAX125, is a kind of data acquisition chip of high-speed multiple channel, 14 word lengths, and be 3uS the switching time of each passage.Have 4 sample/hold circuits on the sheet, each sample/hold circuit reusable is in 2 tunnel inputs.But synchronized sampling 4 road signals like this carry out the A/D conversion then in order respectively, and a slice MAX125 is used for the AC and DC part of 4 road vibration signals, can realize the synchronized sampling of AC signal, have also made full use of input channel.The capacity of push-up storage (FIFO) is the 1K word, temporarily preserves the result of A/D conversion, is read in batch by MCU, and system effectiveness is improved greatly.
To the analysis of circuit as can be known, the phase error of vibration signal is mainly caused by two factors:
Produce phase shift when (1), vibration signal and key signal are through wave filter.
(2), the frequency multiplication error of key phase frequency multiplier circuit.
Below further analysis how to reduce the influence of these two factors.
2, vibration signal pre-process circuit
As shown in Figures 2 and 3, the maximum characteristics of vibration signal pre-process circuit are that AC and DC separates.The AC and DC signal has all comprised useful information, but DC quantity is-8V about, and the effective value of of ac is generally less than 0.3V, DC quantity need be made attenuation processing, and of ac need amplify, so of ac and DC quantity separate processes are more reasonably to select.
Low-pass filter 7 be 0.034Hz by frequency, low-pass filter 9 be that the effect of 1.59kHz. low-pass filtering 9 is anti-aliasing filters by frequency, this must carry out before the A/D conversion, and the appropriate section of patent two is second order filters, and the present invention adopts firstorder filter.This mainly is to consider that the phase propetry of firstorder filter is better than second order filter.
Partiting dc circuit 8 is actually a high-pass filtering, is that 0.034Hz. compares with patent two by frequency, the present invention's big modification of contrasting.The alternating current-direct current separation circuit no longer adopts subtraction circuit, and has used more reliable and more stable partiting dc circuit.
3, key signal pre-process circuit
As shown in Figure 4: actual key signal is a negative voltage, equally with vibration signal has one and is approximately-DC component of 8.0V, and some disturbing pulses are inevitably arranged.The effect of pre-process circuit will convert voltage of signals to the magnitude of voltage of digital circuit exactly, and filters interference.
As shown in Figure 5 and Figure 6, partiting dc circuit 10 also carries out dividing potential drop to input signal simultaneously.Programmable amplifier 11 is actually a DA change-over circuit, with signal as reference voltage (V
Ref) input, according to characteristics and the physical circuit of DAC0832, the conversion output voltage is
D wherein
InBe the digital quantity input.Schmidt trigger 13 models are 74HC14, according to the description of product of Texas Instrument company, and when supply voltage is 4.5V, trigger voltage rising edge trigger voltage 2.38V, the negative edge trigger voltage is 1.4V.Peak-holding circuit 14 and half-wave rectifying circuit are similar, and the voltage at capacitor C 1 two ends is substantially equal to the peak value of measuring point test1.Comparer 15 is actually by two voltage comparators to be formed, and the reference voltage of comparer is obtained by the power supply dividing potential drop, VCC=5V, and according to the resistance of resistance R 4, R13, R15, the reference voltage that can calculate these two comparers is respectively 3V and 4V.Like this, just can judge that crest voltage is greater than 4V, less than 3V, still between 3V and 4V.The intervention that programmable amplifier 11, low-pass filter 12, peak-holding circuit 14, comparer 15 are added MCU promptly constitutes an automatic gain controller (AGC), is easy to signal peak is adjusted between 3V and the 4V.Signal can correctly trigger Schmidt trigger 13 like this, and on the other hand, the less undesired signal of amplitude is then by filtering effectively.
The parameter of partiting dc circuit and low-pass filtering is selected consistent as far as possible with vibration signal pre-process circuit appropriate section.Vibration signal just has the same phase differential with key signal like this, can cancel out each other.
4, key phase frequency multiplier circuit
As shown in Figure 7, in patent two, propose a frequency multiplier circuit of realizing with digital circuit, up counter is counted the interval of two key phase pulses, obtains the cycle of key signal, and sends into latch.This count value also as the counting initial value of down counter, reduce to 0 at every turn and just send a pulse by down counter.Suppose that clock frequency is f
Clk, frequency divider carries out the K frequency division, and the count value of up counter is N, and then the cycle of enter key phase signals is NgK/f
Clk, the cycle of output pulse is N/f
ClkSo, realized the K frequency multiplication.
As shown in Figure 8, F
i(s) and F
o(s) be respectively the frequency of input and output signal.K is Clock Multiplier Factor, and τ promptly delays time.According to electric circuit characteristic, per 1 the cycle up counter of key signal send 1 secondary data to latch, has the time-delay in 1 cycle.Have time-delay from the latch to the down counter equally, the time-delay that produces also is very considerable if this circuit by chip microcontroller, executes instruction.Like this, frequency multiplier circuit is abstract is 2 links: time delay process and amplifying element.
Transport function:
This is an open cycle system, in order to reduce the frequency multiplication error, has added a prediction link before time delay process, and then has increased a frequency division and phase demodulation link.
As shown in Figure 9, totalizer 22, fallout predictor 21, phase detector 23 realize that by MCU and software miscellaneous part realizes that by FPGA hardware model is EPM7128.Predictor algorithm is as follows:
ω
x＝2ω
1-ω
c (2)
ω wherein
xBe the rotating speed of next commentaries on classics, ω
1Be rotating speed when last commentaries on classics, ω
cIt is the rotating speed of last commentaries on classics.ω
1-ω
cBe actually a kind of calculus of differences, the rotation speed change of expression key signal in one-period.This prediction algorithm can be regarded a kind of ratio approx as, differentiate.When incoming frequency is a linear function, i.e. can eliminate the influence of time-delay when even acceleration of rotor or even the deceleration.
As shown in figure 10, key signal promptly produces interruption as the interruption input of a MCU at each rising edge, writes down the value N of up counter, and to the up counter zero clearing.The output pulse is also interrupted input as one of MCU behind the second frequency divider frequency division, interrupt in the rising edge generation of waveform equally, writes down the value N1 of up counter.Like this, the phase differential of two waveforms is: 2 π gN1/N.π as target phase difference, if phase place has skew, just will be offset a suitable coefficient on duty, be added in the latch.
As shown in figure 11, this figure is abstract to Figure 10,, differential similar, proportional with PID control, three links of integration.Corresponding three coefficient ratio COEFFICIENT K p, differential coefficient Kd, integral coefficient Ki are adjusted, will further improve the performance of frequency multiplier circuit.
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101799321A (en) * | 2010-04-08 | 2010-08-11 | 四川拓普测控科技有限公司 | Intelligent vibration monitor system |
| CN101917162A (en) * | 2010-07-28 | 2010-12-15 | 浙江大学 | A key-phase frequency multiplication method and device based on FPGA |
| CN102032000A (en) * | 2010-11-09 | 2011-04-27 | 浙江大学 | Turbine status data acquisition device based on personal computer 104 (PC104) bus |
| CN102055441A (en) * | 2010-10-12 | 2011-05-11 | 中电普瑞科技有限公司 | Input signal filtering and shaping circuit of power-angle measuring device |
| CN102116670B (en) * | 2010-01-05 | 2012-08-08 | 华北电力科学研究院有限责任公司 | Vibration acquisition and analysis method |
| CN102789205A (en) * | 2011-05-17 | 2012-11-21 | 大连光洋科技工程有限公司 | Position information processing device with multiple interfaces and capable of supporting semi-closed loop control and entire closed-loop control |
| CN102841227A (en) * | 2012-08-15 | 2012-12-26 | 广东电网公司电力科学研究院 | High precision large alternating current output device |
| CN104360158A (en) * | 2014-11-18 | 2015-02-18 | 国电南瑞科技股份有限公司 | Self-adaptive key phase collection circuit |
| CN106052844A (en) * | 2016-05-19 | 2016-10-26 | 杭州电子科技大学 | Vibration signal conditioning circuit based on external interruption |
| CN106656188A (en) * | 2016-12-30 | 2017-05-10 | 中国电子科技集团公司第四十三研究所 | High-precision zero offset adjustment R/D converter and implementation method thereof |
| CN108169747A (en) * | 2017-12-28 | 2018-06-15 | 南京慧尔视智能科技有限公司 | A kind of intersection induction control system and its method based on microwave |
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| CN101408568B (en) * | 2007-10-12 | 2010-12-01 | 深圳科士达科技股份有限公司 | Method and device for measuring electrical signal phase of alternating current |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102116670B (en) * | 2010-01-05 | 2012-08-08 | 华北电力科学研究院有限责任公司 | Vibration acquisition and analysis method |
| CN101799321A (en) * | 2010-04-08 | 2010-08-11 | 四川拓普测控科技有限公司 | Intelligent vibration monitor system |
| CN101917162A (en) * | 2010-07-28 | 2010-12-15 | 浙江大学 | A key-phase frequency multiplication method and device based on FPGA |
| CN101917162B (en) * | 2010-07-28 | 2012-08-15 | 浙江大学 | FPGA (Field Programmable Gate Array)-based bonded phase frequency doubling method and device |
| CN102055441B (en) * | 2010-10-12 | 2014-02-12 | 中电普瑞科技有限公司 | A power angle measurement device input signal filter shaping circuit |
| CN102055441A (en) * | 2010-10-12 | 2011-05-11 | 中电普瑞科技有限公司 | Input signal filtering and shaping circuit of power-angle measuring device |
| CN102032000B (en) * | 2010-11-09 | 2013-08-28 | 浙江大学 | Turbine status data acquisition device based on personal computer 104 (PC104) bus |
| CN102032000A (en) * | 2010-11-09 | 2011-04-27 | 浙江大学 | Turbine status data acquisition device based on personal computer 104 (PC104) bus |
| CN102789205A (en) * | 2011-05-17 | 2012-11-21 | 大连光洋科技工程有限公司 | Position information processing device with multiple interfaces and capable of supporting semi-closed loop control and entire closed-loop control |
| CN102841227A (en) * | 2012-08-15 | 2012-12-26 | 广东电网公司电力科学研究院 | High precision large alternating current output device |
| CN102841227B (en) * | 2012-08-15 | 2015-02-11 | 广东电网公司电力科学研究院 | High precision large alternating current output device |
| CN104360158A (en) * | 2014-11-18 | 2015-02-18 | 国电南瑞科技股份有限公司 | Self-adaptive key phase collection circuit |
| CN106052844A (en) * | 2016-05-19 | 2016-10-26 | 杭州电子科技大学 | Vibration signal conditioning circuit based on external interruption |
| CN106656188A (en) * | 2016-12-30 | 2017-05-10 | 中国电子科技集团公司第四十三研究所 | High-precision zero offset adjustment R/D converter and implementation method thereof |
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| CN117537702A (en) * | 2023-11-08 | 2024-02-09 | 兴化市聚鑫不锈钢有限公司 | Steel surface flatness detecting system |
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