CN1541006A - Device of implementing accuracy timing between base band and radio frequency in wireless communication system - Google Patents
Device of implementing accuracy timing between base band and radio frequency in wireless communication system Download PDFInfo
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- 230000037431 insertion Effects 0.000 claims abstract description 10
- 230000006978 adaptation Effects 0.000 claims description 19
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- 238000009432 framing Methods 0.000 description 4
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Abstract
The device includes circuits located at transmitting side of interface between base band and remote radio frequency: frame head insertion circuit, data insertion circuit, hidden timing mark insertion circuit as well as circuits located at receiving side: frame head matching circuit, frame head locking circuit, and data recovery circuit. Hidden timing mark insertion circuit inserts timing marks into frame data generated after processed by the frame head insertion circuit and data insertion circuit so as to obtain frame structure with hidden timing marks. At receiving side, frame structure with hidden timing marks is sent to frame head matching circuit and data recovery circuit. The frame head matching circuit finds out possible frame head sign, and frame head locking circuit locks real frame head, and data recovery circuit recovers data. Receiving output from frame head matching circuit, timing mark locking circuit locks output timing mark.
Description
Technical field
The present invention relates to a kind of wireless telecommunication system, relate in particular to the device that to realize accurate timing between a kind of wireless telecommunication system base band and the radio frequency.
Background technology
Some wireless telecommunications standard requires high-precision timing, and accurate timing source cost is higher, and is for reducing cost, to a base station system, general only at precision timing system of base band configuration.For radio frequency part, clock need be sent to radio frequency from base band.
For the base station that base band and radio frequency part are installed with the location, can be by special-purpose clock line transmission clock.And, the difficulty height of special clock line being set for the base station system that base band is separated with radio frequency, cost is big, poor reliability.Transmit so generally it is multiplexed in signaling/business.
To radio frequency part, not only need to have the accurate high frequency clock of short-term stability, also need to have timing signal long-term stability, second level, be called markers.Radio system needs markers, mainly is in order to satisfy range finding, the demand of base station on-line testing.In the base station that has, also with timing signal regenerate the clock source of high accuracy, stability.
In the existing scheme, adopt directly multiplexing transmission means between the base band radio frequency.As shown in Figure 1, it mainly comprises K bit multiplexer 11, transmitter 12, receiver 13 and K bit demodulation multiplexer 14 for existing base band radio frequency interface timing mechanism schematic diagram.Business datum, and other expense, timing signal for example, check bit, the range finding bit, communication bit or the like, make K coequally in K bit multiplexer 11: 1 is multiplexing, sends by a transmitter 12 then.At receiver side, in receiver 13,, recover the data that transmitted with a clock data recovery circuit.By K bit demodulation multiplexer 14 demultiplexings, obtain original signal again.
The problem of existing scheme is, because the expense actual bandwidth except that business datum is minimum, carries out multiplex/demultiplex coequally but be taken as data, thereby causes the efficient transmitted extremely low.
Timing signal is exactly a kind of typical, the expense of low bandwidth.Because it is a signal of second level, be a direct current signal basically with respect to preceding reverse traffic data at a high speed.As be bit of its specific assigned in multiplexer/demultiplexer, obviously waste is very big, and a rough estimation is the bandwidth (K is multiplexing figure place) of waste 1/K, if promptly total bandwidth is 1G, has just wasted the 100M capacity.Existing scheme can not address this problem well.
Be the little problem of inefficiency, capacity that solves direct multiplex mode, can introduce the frame structure transfer mechanism that is similar to the grouping bag.Be about to data/signaling, and other expense, distance measuring signal for example, communication signal, checking signal etc. are assembled into the frame structure of a set form, in base band---and in the far end radio frequency interface, though signal serial transfer, but,, recover the primitive frame that transmitting terminal is sent out by carrying out framing behind the demultiplexing at receiver side.Promptly to base band and radio frequency part, interface is unit with the frame.
In with the frame structure transmission course, at first to solve the demarcation problem of frame.If with K: 1 ratio is carried out multiplexing, at receiver side, is easy to obtain by clock/data recovery circuit the border of K bit, but but can't directly obtain the border of every frame.Therefore can't realize that direct frame recovers
Target transmitted when another problem that needs solution was.After finding frame boundaries, then can finish framing, but still can't directly obtain long-term markers.Therefore need a kind of transfer mechanism of time scale information, demarcate section when for example in frame structure, increasing, but brought bigger bandwidth waste like this.
Summary of the invention
Technical problem to be solved by this invention is to provide the device of realizing accurate timing between a kind of wireless telecommunication system base band and the radio frequency, transmit baseband rf signal in the framing mode, and introduce the implicit insertion of markers and extract circuit, under the situation that does not increase overhead, can satisfy in the mobile communcations system strict demand regularly and target demand during to system, between base band and radio frequency, realize accurate timing.
To achieve these goals, the invention provides the device of realizing accurate timing between a kind of wireless telecommunication system base band and the radio frequency, its characteristics are, comprise that the frame head that is positioned at base band-radio frequency interface transmitter side inserts circuit, data are inserted circuit, implicit markers is inserted circuit and is positioned at the frame head match circuit of receiver side, the frame head lock-in circuit, data recovery circuit, described implicit markers is inserted circuit the frame data that described frame head inserts circuit and the common generation of data insertion circuit is inserted markers, target frame structure when obtaining implying, the target frame structure exports described data recovery circuit and frame head match circuit respectively to during receiver side implicit, described frame head match circuit is found to lock out real frame head achieve frame regularly by described frame head lock-in circuit behind the possible frame head sign, and send into restore data in the described data recovery circuit, described markers lock-in circuit receives the output from described frame head match circuit, and locking output markers.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are, described base band-far end radio frequency interface transmitter side also comprises and receives described target frame structure and with the multiplexing transtation mission circuit of its multiplexing transmission when implicit, and receiver side receives the signal that this multiplexing transtation mission circuit sends, and it is received the reception demultiplexing circuit of demultiplexing.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are, described frame head match circuit comprises K bits match device, the template register, match counter, the coupling decision device, described template register takes out the K Bit data of K bit behind demultiplexing at every turn and delivers to described K bits match device and carry out matching judgment, the result of coupling delivers to described match counter, described template register and described coupling decision device are delivered in the output of described match counter, and export original header signal by described coupling decision device when mating fully.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are, described frame head lock-in circuit comprises normal frame length register, local frame head generator, local frame head reset controller, the consistency decision device, recent normal frame counter and locking decision circuit, described local frame head generator regularly produces local frame head according to local clock and described normal frame length register, import described consistency decision device with described original header signal and do the consistency judgement, its output signal enters described recent normal frame counter, the count value that obtains is delivered to described locking decision circuit and is done final lock-out state judgement, the described local frame head reset controller local frame head that can reset makes it be synchronized with next original header signal.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are, described markers lock-in circuit comprises local time-mark generator, local markers reset controller, the consistency decision device, markers losing lock processor, markers frame head adaptation, common frame head adaptation, the signal combiner, invalid frame head filter and frame head lock-in circuit, merge in described signal combiner from the common frame head of described common frame head adaptation and markers frame head from described markers frame head adaptation, obtain original header signal, described original header signal is imported described frame head lock-in circuit and is lock out real header signal, markers frame head with described markers frame head adaptation output passes through described invalid frame head filter, filter out effective markers header signal, described effective markers header signal inputs to described consistency decision device with the local markers that described local time-mark generator produces, and output locks markers or triggers described markers losing lock processor and carry out markers losing lock abnormality processing; The described local markers reset controller local markers that can reset makes it be synchronized with next original markers header signal.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are that described recent normal frame counter is by reading the responsive frame number value N of a responsive frame number register
SfSampling interval when adjudicating as lock-out state, described recent normal frame counter is added up this interval interior normal frame number.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are that described locking decision circuit also reads the losing lock threshold value N from the losing lock threshold register
NlWith lock threshold N from the lock threshold register
Lk, with current locking frame number and the early stage state determine current lock-out state.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are, described consistency decision circuit, the local markers that produces with local frame head generator of normal frame counter, locking decision circuit is as the time mark cycle of its work in the recent period.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are that described markers frame head is at each time mark cycle T of system
SystemThe middle appearance once, and be positioned at the initial point position of each system's time mark cycle.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are, the described time mark cycle T of system
SystemFrame period T for described frame structure
FrameIntegral multiple.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are, described responsive frame number value N
SfCan be arbitrary value, and described losing lock threshold value N
NlAt 1～N
SfBetween select described lock threshold N arbitrarily
LkAt 1～N
SfSelect arbitrarily between-1.
Realize the device of accurate timing between above-mentioned wireless telecommunication system base band and the radio frequency, its characteristics are, described template register is the n*K template register with the minimum byte number n that can cover frame head length, the output of described match counter is controlled the output pointer of described template register under the situation of mating all the time, and it is traveled through between 0～n-1.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Description of drawings
Fig. 1 is existing base band radio frequency interface timing mechanism schematic diagram;
Fig. 2 is the structure chart of the device preferred embodiment of realization accurate timing of the present invention;
Fig. 3 is frame head match circuit structure chart among the present invention;
Fig. 4 is frame head lock-in circuit structure chart among the present invention;
Fig. 5 is a frame head lock-out state schematic diagram of the present invention;
Fig. 6 is a markers frame head schematic diagram of the present invention;
Fig. 7 is a markers lock-in circuit structure chart of the present invention.
Embodiment
The main descriptor frame of the present invention produces and frame extracts circuit is how to transmit and obtain frame boundaries, and markers to insert, extract circuit be how to transmit and target when obtaining.
Because in the mobile communcations system, base band to the preceding reverse signal of radio frequency all is through the constant speed rate data after the baseband modulation.Therefore, the regulation frame length is a fixed value.To each frame, a frame head sign is set, as a special overhead field in the frame structure.
As shown in Figure 2, it is the structural representation of the preferred embodiment of the device of realization accurate timing between wireless telecommunication system base band of the present invention and the radio frequency, and the frame head that is positioned at base band-far end radio frequency interface transmitter side inserts circuit 21, data are inserted circuit 22, implied reception demultiplexing circuit 25, frame head match circuit 27, frame head lock-in circuit 28, data recovery circuit 26, markers lock-in circuit 29 that markers is inserted circuit 24, multiplexing transtation mission circuit 23 and is positioned at receiver side.
At transmitter side, described frame head inserts circuit 21, inserts circuit 22 with described data, generates the frame data that have frame head.Frame data insert circuit 24 through implicit markers and handle, target frame structure 241 when obtaining implying.Target frame structure 241 becomes serial signal when implicit after multiplexing transtation mission circuit 23 is multiplexing, sends to receiving terminal, is received by receiver, and demultiplexing, regenerates target frame structure 241 when implicit, but the frame of this moment undefined boundary still.If do not need serial to send, the reception demultiplexing circuit 25 of then multiplexing transtation mission circuit 23 and receiver side can omit.
Target frame structure 241 was sent to a frame head match circuit 27 when reception demultiplexing circuit 25 demultiplexings of receiver side went out to imply.Frame head match circuit 27 mates the data in the frame according to specific frame head template, finds possible frame head sign.Lock out real frame head by a frame head lock-in circuit 28 afterwards.This frame head is sent to data recovery circuit 26, to recover data from frame structure.
A markers lock-in circuit 29 is also delivered in the output of frame head match circuit 27.Described markers lock-in circuit 29 is found out implicit time scale information from the frame head of coupling, and locks, and obtains markers output.
Please in conjunction with Fig. 2, with reference to figure 3, it is frame head match circuit structure chart among the present invention, comprises K bits match device 271, template register 272, match counter 273, coupling decision device 274.If multiplexing ratio is K: 1, claim that then the K bit is a byte (Word).Be n if can cover minimum byte (Word) number of frame head length, then need the template register 272 of a n*K bit.The header content of coupling such as deposit in this register 272.
From template register 272, take out K bit at every turn, the K Bit data behind receiver 25 demultiplexings is delivered to a K bits match device 271, and these adaptation 271 each timeticks work are once carried out matching judgment to two-way input.
The result of coupling delivers to a counter.This counter is called match counter 273.When initial state, this match counter 273 puts 0.When coupling occurring, match counter 273 adds 1.And in case this match counter 273 clear 0 occurs not matching.
If n byte (Word) be coupling all, then match counter 273 can be added to n-1, otherwise just all the time less than n-1.Therefore whether match counter 273 equals n-1, as the judgment condition of whether mating.Occur after the coupling, match counter 273 is clear 0, the coupling of beginning next round, and by the original header signal of coupling decision device 274 outputs.
Every appearance is once mated fully, then the once original header signal of output owing in the normal data of frame, also may exist and the identical bit stream of frame head, therefore this original header signal is not also represented real frame head, need deliver to and do further judgement in the frame head lock-in circuit 28.
Please in conjunction with reference to figure 4, frame head lock-in circuit 28 is to be input with original header signal, lock out real header signal according to certain rule.This at first needs a local frame head generator 281.Local frame head generator 281 is according to the value L of local clock and normal frame length register 289
NfProduce local frame head termly.
When just starting, or system is when being in the losing lock attitude for a long time, by a local frame head reset controller 282 local frame head that resets, makes it be synchronized with next original frame head.
Local frame head and original frame head are delivered to a consistency decision device 283, this consistency decision device 283 is made a consistency in each time mark cycle to two inputs and is judged, time mark cycle herein, the local markers that produces with local frame head generator 281 is as the criterion, and this is in order to prevent that chain rupture or long-term link from causing the idle problem of subsequent conditioning circuit unusually.
The signal of consistency decision circuit output enters in the recent normal frame counter 284.The meter of this recent normal frame counter 284 reads the value N of responsive frame number register 286
Sf, responsive frame number is meant when doing the lock-out state judgement, the sampling interval of institute's foundation.Normal frame counter 284 is added up the normal frame number within this interval in the recent period.When resetting, the value clear 0 of recent normal frame counter 284.When the consistency decision device was exported consistent signal, normal frame counter 284 added 1 in the recent period, but the count value maximum is no more than N
SfWhen recent normal frame counter 284 is counted N
SfAnd when the consistency decision device was still exported consistent signal, the value of normal frame counter 284 kept in the recent period.And when the consistency decision device was exported inconsistent signal, normal frame counter 284 subtracted 1 in the recent period, but its minimum value is 0.When recent normal frame counter 284 arrives 0 and consistency decision device when still exporting inconsistent signal, normal frame counter 284 keeps in the recent period.
Recent consistent frame count value is sent to a locking decision circuit 285, makes final lock-out state and judges.Judging needs two threshold values: from the losing lock threshold value N of losing lock threshold register
NlWith lock threshold N from the lock threshold register
LkWhy being two threshold values rather than one, is the demand for the hesitation that satisfies locking.
Fig. 5 shows the relation between several threshold values and the lock-out state.Responsive frame number N
SfCan select arbitrarily.Its value is big more, and operating state is stable more, is not subjected to the influence of unusual fluctuations, but the also corresponding prolongation of capture time.Its value is more little, catches soon more, but link working state is also unstable more, and some little fluctuations cause losing lock easily.
Lock threshold N
Lk, can be 1 to N
SfBetween select arbitrarily.Big more, then locking condition is harsh more, as equals N
Sf, then in the recent period none frame is unusually just thought locking,
Losing lock threshold value N
NlCan be 1 to N
SfSelect between-1.The losing lock threshold value is high more, the then easy more out-of-lock condition that enters.
Only, can't determine current lock-out state according to current locking frame number and two threshold values, also will according to its early stage state.For example, if be in the losing lock attitude early stage, then it locks frame number in the recent period and must meet or exceed lock threshold, just thinks to enter lock-out state once more.And if be in lock-in state early stage, when then the phase, the locking frame number must be less than the losing lock threshold value in the recent period, just think losing lock.Utilize this characteristics, be easy to realize to lock and the hesitation of losing lock, as N
Nl=N
Lk, then do not have hesitation, as N
Nl＜N
Lk, the forward hesitation is then arranged, otherwise, reverse hesitation is arranged.
More than tell about the insertion and the leaching process of frame head.And target is inserted and the problem of extracting when unresolved.In the present invention, do not distribute special field, but adopt the implicit mode of inserting frame head, can farthest save transmission bandwidth like this for markers.
Specific implementation is Fig. 6, shown in Figure 7 for example.Markers lock-in circuit schematic diagram as shown in Figure 7 comprises local time-mark generator 297, local markers reset controller 298, consistency decision device 296, markers losing lock processor 299, markers frame head adaptation 291, common frame head adaptation 292, signal combiner 293, invalid frame head filter 295 and frame head lock-in circuit 294.Merge in described signal combiner 293 from the common frame head of described common frame head adaptation 292 and markers frame head from described markers frame head adaptation 291, obtain original header signal, described original header signal is imported described frame head lock-in circuit 294 and is lock out real header signal, markers frame head with described markers frame head adaptation 291 outputs passes through described invalid frame head filter 295, filter out effective markers header signal, described effective markers header signal inputs to described consistency decision device 296 with described local time-mark generator 297 according to the local markers that a normal markers interval register 2971 produces, and output locking markers or trigger described markers losing lock processor 299 and carry out markers losing lock abnormality processing.When long-time losing lock of markers or initialization, described local markers reset controller 298 is according to the markers lock-out state from described consistency decision device 296, and the local markers that resets makes it be synchronized with next original markers header signal.
As shown in Figure 6, in the present invention, establishing a frame length is T
Frame68, contain frame head and frame, and system's markers is spaced apart T
System66, selecting T
Frame, should make T at 68 o'clock
System66 is T just
Frame68 integral multiple.If can not realize, then need to change T
System66, for example with T
System66 increase integral multiple, finally satisfy T
System66 and T
FrameIntegral multiple relation between 68.
The present invention has also stipulated two kinds of frame heads: common frame head 63 and markers frame head 61.At first, all frames all align with the system markers.And frame header is designated as markers frame head 61 in the moment of alignment, and all the other frames are common frame head 63.Like this, markers frame head 61 is at each time mark cycle T of system
System66 can occur once, and are positioned at each time mark cycle T of system
System66 initial point position.
The mechanism that markers needs a cover to be independent of the frame head locking is carried out locking decision.Therefore, discern common frame head 63 and markers frame head 61 simultaneously, then need two cover adaptations, the principle of two cover adaptations is the same, just its matching template difference.
Markers frame head by 291 outputs of markers frame head adaptation, also need by an invalid frame head filter 295, according to the header signal after the locking of frame head lock-in circuit 294 generations, filter out invalid frame head, invalid frame head is the coupling that is produced by bit stream lucky in the normal frame data and that the markers frame head is complementary.Effective markers header signal after removing after filtration with local markers, is sent into consistency decision device 296.
Local markers safeguards that by local clock when the long-time losing lock of markers, or when initialization, local time-mark generator 298 resets, and is synchronized with detected timing signal on the next link.
Under the link markers situation consistent with local markers, consistency decision circuit 296 directly provides the markers output after the locking.And under link markers and the inconsistent situation of local markers, provide the indication of markers losing lock, and trigger described markers losing lock processor 299 and make corresponding abnormality processing.
Frame head inserts and extracts circuit, makes that transmitting baseband rf signal in the framing mode becomes possibility, thereby has improved efficiency of transmission greatly.Insert and extract and markers is implicit, under the situation that does not increase overhead, satisfied in the mobile communcations system strict and target demand during to system regularly.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (12)
1, realize the device of accurate timing between a kind of wireless telecommunication system base band and the radio frequency, it is characterized in that, comprise: the frame head of transmitter side inserts circuit between base band-radio frequency interface, data are inserted circuit, implicit markers is inserted circuit and is positioned at the frame head match circuit of receiver side, the frame head lock-in circuit, data recovery circuit, described implicit markers is inserted circuit the frame data that described frame head inserts circuit and the common generation of data insertion circuit is inserted markers, target frame structure when obtaining implying, the target frame structure exports described data recovery circuit and frame head match circuit respectively to during receiver side implicit, described frame head match circuit is found to lock out real frame head achieve frame regularly by described frame head lock-in circuit behind the possible frame head sign, and send into restore data in the described data recovery circuit, described markers lock-in circuit receives the output from described frame head match circuit, and locking output markers.
2, realize the device of accurate timing between wireless telecommunication system base band according to claim 1 and the radio frequency, it is characterized in that, described base band-far end radio frequency interface transmitter side also comprises and receives described target frame structure and with the multiplexing transtation mission circuit of its multiplexing transmission when implicit, and receiver side receives the signal that this multiplexing transtation mission circuit sends, and it is received the reception demultiplexing circuit of demultiplexing.
3, realize the device of accurate timing between wireless telecommunication system base band according to claim 1 and 2 and the radio frequency, it is characterized in that, described frame head match circuit comprises K bits match device, the template register, match counter, the coupling decision device, described template register takes out the K Bit data of K bit behind demultiplexing at every turn and delivers to described K bits match device and carry out matching judgment, the result of coupling delivers to described match counter, described template register and described coupling decision device are delivered in the output of described match counter, and export original header signal by described coupling decision device when mating fully.
4, realize the device of accurate timing between wireless telecommunication system base band according to claim 3 and the radio frequency, it is characterized in that, described frame head lock-in circuit comprises normal frame length register, local frame head generator, local frame head reset controller, the consistency decision device, recent normal frame counter and locking decision circuit, described local frame head generator regularly produces local frame head according to local clock and described normal frame length register, import described consistency decision device with described original header signal and do the consistency judgement, its output signal enters described recent normal frame counter, the count value that obtains is delivered to described locking decision circuit and is done final lock-out state judgement, the described local frame head reset controller local frame head that can reset makes it be synchronized with next original header signal.
5, realize the device of accurate timing between wireless telecommunication system base band according to claim 3 and the radio frequency, it is characterized in that, described markers lock-in circuit comprises local time-mark generator, local markers reset controller, the consistency decision device, markers losing lock processor, markers frame head adaptation, common frame head adaptation, the signal combiner, invalid frame head filter and frame head lock-in circuit, merge in described signal combiner from the common frame head of described common frame head adaptation and markers frame head from described markers frame head adaptation, obtain original header signal, described original header signal is imported described frame head lock-in circuit and is lock out real header signal, markers frame head with described markers frame head adaptation output passes through described invalid frame head filter, filter out effective markers header signal, described effective markers header signal inputs to described consistency decision device with the local markers that described local time-mark generator produces, and output locks markers or triggers described markers losing lock processor and carry out markers losing lock abnormality processing; The described local markers reset controller local markers that can reset makes it be synchronized with next original markers header signal.
6, realize the device of accurate timing between wireless telecommunication system base band according to claim 4 and the radio frequency, it is characterized in that described recent normal frame counter is by reading the responsive frame number value N of a responsive frame number register
SfSampling interval when adjudicating as lock-out state, described recent normal frame counter is added up this interval interior normal frame number.
7, realize the device of accurate timing between wireless telecommunication system base band according to claim 6 and the radio frequency, it is characterized in that described locking decision circuit also reads the losing lock threshold value N from the losing lock threshold register
NlWith lock threshold N from the lock threshold register
Lk, with current locking frame number and the early stage state determine current lock-out state.
8, realize the device of accurate timing between wireless telecommunication system base band according to claim 4 and the radio frequency, it is characterized in that described consistency decision circuit, in the recent period the local markers that produces with local frame head generator of normal frame counter, locking decision circuit is as the time mark cycle of its work.
9, realize the device of accurate timing between wireless telecommunication system base band according to claim 5 and the radio frequency, it is characterized in that described markers frame head is at each time mark cycle T of system
SystemThe middle appearance once, and be positioned at the initial point position of each system's time mark cycle.
10, realize the device of accurate timing between wireless telecommunication system base band according to claim 9 and the radio frequency, it is characterized in that the described time mark cycle T of system
SystemFrame period T for described frame structure
FrameIntegral multiple.
11, realize the device of accurate timing between wireless telecommunication system base band according to claim 7 and the radio frequency, it is characterized in that described responsive frame number value N
SfCan be arbitrary value, and described losing lock threshold value N
NlAt 1～N
SfBetween select described lock threshold N arbitrarily
LkAt 1～N
SfSelect arbitrarily between-1.
12, realize the device of accurate timing between wireless telecommunication system base band according to claim 3 and the radio frequency, it is characterized in that, described template register is the n*K template register with the minimum byte number n that can cover frame head length, the output of described match counter is controlled the output pointer of described template register under the situation of mating all the time, and it is traveled through between 0～n-1.
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| CN108418671A (en) * | 2018-01-19 | 2018-08-17 | 北京理工大学 | Modulus mixing high speed signal time measurement system based on clock and data recovery |
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| US6400966B1 (en) * | 1997-10-07 | 2002-06-04 | Telefonaktie Bolaget Lm Ericsson (Publ) | Base station architecture for a mobile communications system |
| US6539004B1 (en) * | 1998-09-17 | 2003-03-25 | Lucent Technologies Inc. | Time synchronization of packetized radio signals to base stations |
| JP3839277B2 (en) * | 2001-05-25 | 2006-11-01 | 三菱電機株式会社 | Wireless communication system and base station frame synchronization method |
| CN1281022C (en) * | 2001-12-04 | 2006-10-18 | 中兴通讯股份有限公司 | Method and apparatus for transmitting network synchronous clock in point to multi-point wireless system |
-
2003
- 2003-10-28 CN CNB2003101119931A patent/CN1299522C/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102422599A (en) * | 2009-03-11 | 2012-04-18 | 伊顿公司 | Control architecture and interfacing methodology for cockpit control panel systems |
| CN102422599B (en) * | 2009-03-11 | 2015-11-25 | 萨基姆阿维奥尼克斯有限责任公司 | For control architecture and the interface method of cockpit control panel system |
| CN108418671A (en) * | 2018-01-19 | 2018-08-17 | 北京理工大学 | Modulus mixing high speed signal time measurement system based on clock and data recovery |
| CN108418671B (en) * | 2018-01-19 | 2020-05-29 | 北京理工大学 | Analog-digital mixed high-speed signal time measuring system based on clock data recovery |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1299522C (en) | 2007-02-07 |
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