CN1530718A - Manufacturing method for reflective liquid-crystal displaying device and peripheral circuit - Google Patents
Manufacturing method for reflective liquid-crystal displaying device and peripheral circuit Download PDFInfo
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- CN1530718A CN1530718A CNA031194397A CN03119439A CN1530718A CN 1530718 A CN1530718 A CN 1530718A CN A031194397 A CNA031194397 A CN A031194397A CN 03119439 A CN03119439 A CN 03119439A CN 1530718 A CN1530718 A CN 1530718A
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Abstract
The method includes defining source/draw electrode, forming and defining activated layer and gate electrode oxide layer, forming and patternizing photosensitive resin layer before electric crystal gate electrode metal being deposited so as to form convex block embryo, depositing and patternizing gate electrode metal layer and reflecting metal layer on the convex block simultaneously via backflow smoothing, carrying on LDD planting, defining P type TFT photoresist pattern as cover curtain, forming P type TFT source/draw electrode by planting source/draw electrode ion and forming protective layer and contact hole after photoresist removed.
Description
Technical field
The present invention is relevant with a kind of LCD process technique, particularly relevant for a kind of reflective low temperature polycrystalline silicon LCD process technique, goes to finish the technology that comprises driving circuit and the making of liquid crystal display picture element with the light shield of simplifying most.
Background of invention
LCD (LCD) is a kind of display of plane, has the low power consumption characteristic, simultaneously owing to compare with cathode ray tube (CRT) with window dimension, though with regard to take up room or quality with regard to all much smaller, and do not have the curved surface of general CRT.Therefore extensively model is applied to various product, comprise consumption electronic products such as palmtop computer, computerized dictionary, wrist-watch, mobile phone, larger-size portable type computer, communication terminal machine, display board, individual desktop computer, even high-res TV (HDTV) etc. all is not difficult to find out its trace and welcome degree thereof.Active-matrix type membrane transistor LCD (TFT-LCD) particularly because its angle of visibility, contrast expression are all far better than the STN-LCD of passive-matrix type, and has the better reaction time.
The LCD of TFT type, main member comprises: fluorescent tube, light guide plate, Polarizer, filter, glass substrate, alignment film, liquid crystal material and thin-film electro crystal or the like.At first LCD must be utilized backlight earlier, and just fluorescent lamp projects light source, and these light sources can be earlier through a Polarizer and then through liquid crystal, and the arrangement mode of liquid crystal molecule and then change at this moment penetrates the light angle of liquid crystal.These light next also must be through color filter film and another piece Polarizer in the place ahead then.Therefore we just can control the light intensity and the color of last appearance as long as change the magnitude of voltage of stimulation liquid crystal, and and then can change the color combination of the different depths has been arranged on liquid crystal panel.
The LCD of above-mentioned TFT type, owing to need to use fluorescent tube as backlight and diffusion barrier, or need sidelight source and light guide plate at least.Therefore if further reduce power consumption again, and make LCD display thickness thinner, reflective LCD is a kind of good selection.The light source of reflective LCD, the light of the irradiation that mainly comes from the outside only needs little secondary light source to get final product, therefore more power saving, and make the thickness of display thinner.Therefore, for the electronic product that uses battery, and the place of using is not painstakingly in the dark the time, and the reflective LCD display is not less than being an optimal selection.
Above-described TFT-LCD, many with the main material of traditional amorphous silicon as the TFT of TFT-LCD, however existing use today polysilicon replaces the trend of amorphous silicon, and might become main flow.This mainly is conceived to no matter be the rate travel (mobility) in electronics or electric hole, and polysilicon all has better rate travel than amorphous silicon.In addition, to also have an advantage be that the driving circuit (comprising nMOS electric crystal or PMOS electric crystal CMOS electric crystal even) that forms the LCD panel can carry out simultaneously with the manufacturing of picture element panel to multi-crystal TFT-LCD.Because above-mentioned factor, polysilicon type TFT-LCD can provide the switching rate better than amorphous silicon type TFT-LCD, more quickens its attractive force.But, the still TFT-LCD that are only limited to the penetration type of above-mentioned polysilicon type TFT-LCD as No. the 5940151st, United States Patent (USP) that Hu obtained more.
In view of this, the present invention propose a kind of can be in conjunction with the manufacturing technology of polysilicon type TFT-LCD and reflection-type TFT-LCD.
Summary of the invention
Fundamental purpose of the present invention the light shield step (about six road light shields) that provides a kind of need less is provided and can carries out reflective TFT-LCD simultaneously to comprise the method that driving circuit is made.
A kind of method of making reflective liquid-crystal display comprises following steps at least:
Form a metal level on a substrate;
Form one first conductivity type silicon layer on this metal level;
This metal level of patterning and this first conductivity type silicon layer, with the source/drain fate that in drive circuit area, forms one first conductivity type TFT, the source electrode fate of one second conductivity type TFT and the source/drain fate that in picture element region, forms a picture element TFT, and the storage capacitors fate;
Form on the surface of an active layer after patterned;
Form a gate pole oxidation layer on this active layer;
This gate pole oxidation layer of patterning and this active layer, to form one first reserved area, one second reserved area, and one the 3rd reserved area, wherein this first reserved area is the source/drain that also partly covers this first conductivity type TFT between the source/drain of this first conductivity type TFT, this second reserved area is between the source electrode of the drain of this first conductivity type TFT and this second conductivity type TFT and part covers the drain of this first conductivity type TFT and the source electrode of this second conductivity type TFT, and the 3rd reserved area is between the source/drain of this picture element TFT and partly covers the source/drain of this picture element TFT;
Form the surface of an insulation course behind above-mentioned patterning;
This insulation course of patterning is to form plurality of bump on this picture element region; Form a gate metal level on the surface behind the above-mentioned patterning;
This gate metal level of patterning, to form reference potential connection electrode, the gate of this first conductivity type TFT, the gate of this second conductivity type TFT, the top electrodes of this storage capacitors, and on the projection of this picture element region, forming a reflective metal layer, this reflective metal layer also connects the top electrodes of this picture element TFT drain and this storage capacitors;
Imposing and gently ooze assorted drain (LDD) cloth and plant, implant this first conductive-type impurity, serves as the cover curtain with this gate metal level after patterned, forms the LDD district in order to the gate both sides at this first conductivity type TFT, also forms the LDD district in the gate both sides of this picture element TFT;
Form a photoresist design layer on the All Ranges except that this second reserved area;
Implanting one second conductive-type impurity, serves as the cover curtain with the gate of this photoresist design layer and this second conductivity type TFT, to form the source/drain of this second conductivity type TFT;
Remove this photoresist design layer;
Form a protective seam on this exposed surface; And
This protective seam of patterning is in order to remove protective seam on this picture element region reflective metal layer to expose this reflective metal layer and in the terminal contact hole that forms of this drive circuit area and picture element region.
Described method, wherein this first conductivity type is the n type, this second conductivity type is the p type, and this picture element TFT is n type TFT.
Described method, wherein the formation step of this active layer also comprises and forms earlier an amorphous silicon layer, again through the laser crystallization to be converted into polysilicon layer.
Described method, wherein this insulation course is to be photosensitive resin layer.
Described method also is included in after this insulation course step of patterning and forms before this gate metal level step, imposes the hot reflux step earlier, so that this projection smoothing.
Described method also is included in and forms one second reflection projection district on the source area of picture element TFT, and with the enlarged openings rate, wherein this second reflection projection district is exposed the 3rd reserved area, forms the zone to keep LDD.
Described method, wherein this picture element TFT gate metal and its source/drain distance is not equidistant, the gate metal of this first conductivity type TFT and its source/drain distance are also not equidistant, and this equidistantly is not to make the distance of the distance of drain and gate greater than source electrode and gate, to reduce leakage current.
Described method, wherein this protective seam is to be selected from photosensitive resin, silicon nitride layer, silicon oxide layer one of them or wherein combination arbitrarily.
Described method, wherein the step of the formation of this protective seam and this protective seam of patterning also comprises deposition one photosensitive resin layer earlier, again with light shield to this photosensitive resin irradiation to form contact hole pattern.
Described method also is included in and anneals earlier before this photosensitive resin layer forms, to activate this second conductive-type impurity.
Described method, wherein the step of the formation of this protective seam and this protective seam of patterning also comprises:
Deposit a silicon nitride layer;
Impose annealing, to activate this second conductive-type impurity;
Deposit this photosensitive resin layer;
This photosensitive resin layer of patterning is with exposed this reflective metal layer and form contact hole pattern; Reaching with this photosensitive resin layer is the cover curtain, and this silicon nitride layer of patterning is to finish the structure in this contact hole.
Only need can make reflective liquid-crystal display TFT and driving circuit thereof with six road light shield numbers approximately in the processing procedure.
Description of drawings
Figure 1A is depicted as the schematic top plan view of TFT-LCD one basic picture element of the present invention;
Figure 1B to Fig. 1 H is depicted as the cross sectional representation according to fabrication steps of the present invention, and wherein picture element partly is a-a ' the line section along Figure 1A.
Figure number is to as directed:
100 transparency carriers
101 drive circuit area
102 picture element regions
105 metal levels
110 n+ impurity doped polysilicon layers
The presumptive area (abbreviating presumptive area as) of the LDD of 120 n type TFT and passage
The drain of 120d n type TFT
The source electrode of 120s n type TFT
The presumptive area (abbreviating presumptive area as) of the source/drain of 122 p type TFT and passage
The source electrode of 122s p type TFT
The source electrode fate of 122s ' p type TFT
The drain of 122d p type one TFT
The LCD of 124 picture element TFT and the presumptive area of passage (abbreviating presumptive area as)
124s signal wire (source electrode of being used as picture element TFT)
The drain of 124d picture element TFT
The source electrode of 124s picture element TFT
125 storage capacitors
The 129A first reflection projection district
The 129B second reflection projection district
130 non-impurity-doped amorphous silicon layers
135 gate pole oxidation layers (also being called capacitance dielectric layer)
140 scanning linears
The 140A first reflection projection district metal level
The 140B second reflection projection district metal level
140C storage capacitors top electrodes
The 140d drain area
The gate of 140i picture element TFT
140L, 144L LDD fate
The gate of 140n n type one TFT
The gate of 140p p type one TFT
145 photoresist design layers
160 protective seams
Vss first reference electrode
Embodiment
Please refer to Figure 1A, is the vertical view that shows according to the present invention's one picture element, and scanning linear 140 and signal wire 124s intersect vertically among Figure 1A, and scanning linear 140 comprises the gate 140i of picture element TFT, and signal wire 124s is the source electrode line for picture element TFT.The first reflection projection district metal level 140A accounts for the major part of picture element region, connects drain 124d and the storage capacitors top electrodes 140C of picture element TFT.The second reflection projection district metal level 140B then across signal wire 124s to the gate 140i of next picture element and connect.
Figure 1B is the cross sectional representation that shows corresponding to the a-a ' among Figure 1A.According to method of the present invention, the first reflection projection district metal level 140A is connected to the electric pole plate of storage capacitors top electrodes 140C among the picture element A by the drain of A picture element.And the second reflection projection district metal level 140B is in order further to increase aperture opening ratio, and the plurality of bump of utilizing the insulativity material is formed on the source electrode of picture element TFT, when being formed on the plurality of bump of insulativity material, the second reflection projection district metal level 140B is connected preventing with the gate 124i of TFT, reducing resistance on the scanning linear (because area becomes big), but the first reflection projection district metal level 140A disconnects on the second reflection projection district metal level 140B and the picture element.
Relevant fabrication steps of the present invention please refer to Fig. 1 C to Fig. 1 H, and wherein the part of relevant picture element is the cross sectional representation along the a-a ' of Figure 1A.
Please earlier referring to the cross sectional representation shown in Fig. 1 C.It is as follows that it forms step:
At first from bottom to top form in regular turn a metal level 105 and with n+ conductive impurities doped polycrystalline silicon layer 110 on a transparency carrier 100.Follow with little shadow and the aforementioned polysilicon layer 110 of etch process patterning, reach metal level 105, with the source electrode fate 122s ' of source electrode 120s/ drain area 120d, the p-type TFT of formation n type TFT and source electrode 124s/ drain area 124d and storage capacitors 125 fates that in picture element region 102, form picture element TFT in drive circuit area 101.
Then, shown in Fig. 1 D, deposit non-impurity-doped amorphous silicon layer 130 and gate pole oxidation layer 135 in regular turn on all surface.Subsequently, then implement a laser crystallization technique, with so that amorphous silicon layer 130 crystallizations change into polysilicon layer.And then optionally remove part gate pole oxidation layer 135 and non-impurity-doped amorphous silicon layer 130 with little shadow and etching technique again, in order to the presumptive area 122 of the source/drain of the presumptive area 124 of the LDD of the presumptive area 120 of the LDD that defines n type TFT and passage, picture element TFT and passage, p-type TFT and passage and form the capacitance dielectric layer 135 of storage capacitors 125.At this, non-impurity-doped amorphous silicon layer 130 also can be considered as the part of capacitance dielectric layer 135.
Still shown in Fig. 1 D, presumptive area 120 covers on source electrode 120s and the drain 120d except between source electrode 120s and drain 120d and partly, similarly, presumptive area 122 has also covered drain 120d in the part p type TFT fate and the drain fate 122S ' of p-type TFT.The presumptive area 124 of picture element region 102 also together; Comprise the zone between drain 124d and the source electrode 124s and comprise covering part thereon.
Please refer to Fig. 1 E subsequently, form a photosensitive resin layer on All Ranges, and patterning, in picture element region 102, only to stay projection (bump) embryo.Subsequently, impose the program that photosensitive resin is refluxed again, to form the first reflection projection district 129A and the second reflection projection district 129B, wherein the first reflection projection district 129A includes plurality of bump, and the bottom of projection is connected with each other.Wherein for the enlarged openings rate, the second reflection projection district 129B also can optionally form plurality of bump, and makes plurality of bump across crossing signal wire 124s.In the present embodiment, the plurality of bump of the first reflection projection district 129A is main echo area, covers most of zone of picture element region 102.And being formed at metal level on the first reflection projection district 129A can be simultaneously be connected the drain area 124d of picture element TFT with the top electrodes of storage capacitors 125.The LDD fate that please notes picture element TFT exposes at this moment, plants so that can carry out LDD cloth, please notes that at this first reflection projection district 129A and the second reflection projection district 129B disconnect each other.
Please continue 1F, and then, form a gate metal level on the surface behind the above-mentioned patterning comprehensively with reference to figure.Utilize the aforementioned gate metal level of little shadow and etch process patterning again, reflect bump metal layer 140A, reach the second reflection bump metal layer 140B in presumptive area 124, first in the gate 140i of presumptive area 122, picture element TFT in the gate 140p of presumptive area 120, p-type TFT with the gate 140n that forms the first reference electrode VSS, n-type TFT.Wherein, the first reflection bump metal layer 140A connects the top electrodes of storage capacitors 125 and the drain area 124d of picture element TFT; The second reflection bump metal floor 140B is formed on the second reflection projection district 129B.Please note that the second reflection bump metal layer 140B can connect the signal wire 124s of TFT, so the increasing of signal wire area, resistance is descended.
In addition, the gate 140n of n-type TFT, dual-side respectively reserve the LDD fate 140L of a suitable length.The gate 140n of n-type TFT and its source electrode 120s/ drain area 120d can be not equidistant, and be longer with drain 120d distance apart from lacking apart from source electrode 120s, to suppress leakage current.Its dual-side of gate 140p that is positioned at the p-type TFT of presumptive area 122 then is source/drain fate 122s and the 122d that reserves a suitable length; Similarly, be positioned at the gate 140i of the picture element TFT of presumptive area 124, and reserve the LCD fate 144L of a suitable length at the gate 140i of picture element TFT drain side.The gate 144i of picture element TFT and its source area 124s/ drain area 124d be not for equidistant, and the distance of distance sources polar region 124s is short and longer with drain area 124d distance, to suppress leakage current.
Subsequently, reference electrode VSS, gate 140n, 140p, 140i, the first reflection bump metal layer 140A and the second reflection bump metal layer 140B with patterning are the cover curtain, implant n type conductive-type impurity in all exposed surfaces, form light dope source electrode/drain (LDD) that the LDD district 140L of n type TFT, compound crystal silicon layer under the 144L of LDD fate form picture element TFT in order to the compound crystal silicon layer under the predetermined 140L of LDD and distinguish 144L.
Please refer to Fig. 1 G, form a photoresist design layer 145 earlier to cover the zone except p type TFT fate 122.Carrying out doping impurity with p type conductive impurities more subsequently, serves as the cover curtain with the gate 140p of p type TFT and photoresist design layer 145, in order to form source/drain 122s and 122d.Dosage when the dosage of p type impurity will be higher than described LDDn type implanting ions.So that source electrode 122s/ drain 122d district still has the p type impurity of enough concentration after electrical compensation.
Please refer to Fig. 1 H, after removing photoresist design layer 145, then form a protective seam 160 again on all surface, and planarization it.The generation type of protective seam 160 wherein can have following several selection: (1) comprehensive ground deposited silicon nitride layer for example, to cover all elements in above-mentioned driving circuit and the picture element region, continue deposition again with planarization.(2) deposit a silicon nitride layer earlier, then deposit another silicon oxide layer again and also can.(3) silicon nitride layer of elder generation's deposition segment thickness then, deposits another photosensitive resin layer (photosensitive resin layer) again.Or (4) all pure be the material of protective seam with the photosensitive resin.Comprise the situation of photosensitive resin at the latter two, photosensitive resin itself can utilize the step of irradiation, and the pattern in formation contact hole is shown in Fig. 1 E.Do not need extra photoresistance.But, photosensitive resin usually need be after formation according to deep UV (ultraviolet light) (UV) to remove intrinsic color so that its transparence.And in (1) and (2) kind situation, then need with the additional light resistance layer.Utilize little shadow and etching technique to shift the photoresistance pattern again to silicon nitride layer, if but (3) and (4) plant when comprising photoresist, then photoresist itself promptly can the micro-photographing process patterning, forms the photoresist layer step and save.
In addition, note that, before or after protective seam 160 forms, need carry out a cycle of annealing to activating the conductive impurities ion and making n+ doped source/drain form Ohmic contact.With this case preferred embodiment, if protective seam 160 materials are monox or silicon nitride.Can be chosen under the hydrogeneous atmosphere during annealing and carry out, to reduce the issuable problem of compound crystal silicon surface scission of link.But, then need before photoresist forms, to anneal earlier if protective seam 160 materials comprise photoresist.
At last, again protective seam 160 is carried out patterning,, form contact hole pattern simultaneously to reserve the lead attachment plug to expose the first reflection bump metal layer 140A and the second reflection bump metal layer 140B.
The present invention with preferred embodiment explanation as above and is familiar with this field skill person, in not breaking away from spiritual scope of the present invention, retouch when doing a little change, its scope of patent protection more ought on claims scope and etc. same domain decide.
Claims (11)
1, a kind of method of making reflective liquid-crystal display is characterized in that comprising at least following steps:
Form a metal level on a substrate;
Form one first conductivity type silicon layer on this metal level;
This metal level of patterning and this first conductivity type silicon layer, with the source/drain fate that in drive circuit area, forms one first conductivity type TFT, the source electrode fate of one second conductivity type TFT and the source/drain fate that in picture element region, forms a picture element TFT, and the storage capacitors fate;
Form on the surface of an active layer after patterned;
Form a gate pole oxidation layer on this active layer;
This gate pole oxidation layer of patterning and this active layer, to form one first reserved area, one second reserved area, and one the 3rd reserved area, wherein this first reserved area is the source/drain that also partly covers this first conductivity type TFT between the source/drain of this first conductivity type TFT, this second reserved area is between the source electrode of the drain of this first conductivity type TFT and this second conductivity type TFT and part covers the drain of this first conductivity type TFT and the source electrode of this second conductivity type TFT, and the 3rd reserved area is between the source/drain of this picture element TFT and partly covers the source/drain of this picture element TFT;
Form the surface of an insulation course behind above-mentioned patterning;
This insulation course of patterning is to form plurality of bump on this picture element region; Form a gate metal level on the surface behind the above-mentioned patterning;
This gate metal level of patterning, to form reference potential connection electrode, the gate of this first conductivity type TFT, the gate of this second conductivity type TFT, the top electrodes of this storage capacitors, and on the projection of this picture element region, forming a reflective metal layer, this reflective metal layer also connects the top electrodes of this picture element TFT drain and this storage capacitors;
Imposing and gently ooze assorted drain (LDD) cloth and plant, implant this first conductive-type impurity, serves as the cover curtain with this gate metal level after patterned, forms the LDD district in order to the gate both sides at this first conductivity type TFT, also forms the LDD district in the gate both sides of this picture element TFT;
Form a photoresist design layer on the All Ranges except that this second reserved area;
Implanting one second conductive-type impurity, serves as the cover curtain with the gate of this photoresist design layer and this second conductivity type TFT, to form the source/drain of this second conductivity type TFT;
Remove this photoresist design layer;
Form a protective seam on this exposed surface; And
This protective seam of patterning is in order to remove protective seam on this picture element region reflective metal layer to expose this reflective metal layer and in the terminal contact hole that forms of this drive circuit area and picture element region.
2, the method for claim 1 is characterized in that: this first conductivity type is the n type, and this second conductivity type is the p type, and this picture element TFT is n type TFT.
3, the method for claim 1 is characterized in that: the formation step of this active layer also comprises and forms earlier an amorphous silicon layer, again through the laser crystallization to be converted into polysilicon layer.
4, the method for claim 1 is characterized in that: this insulation course is to be photosensitive resin layer.
5, the method for claim 1 is characterized in that: reach before this gate metal level step of formation after also being included in this insulation course step of patterning, impose the hot reflux step earlier, so that this projection smoothing.
6, the method for claim 1 is characterized in that: also be included in and form one second reflection projection district on the source area of picture element TFT, with the enlarged openings rate, wherein this second reflection projection district is exposed the 3rd reserved area, forms the zone to keep LDD.
7, the method for claim 1, it is characterized in that: this picture element TFT gate metal and its source/drain distance are not equidistant, the gate metal of this first conductivity type TFT and its source/drain distance are also not equidistant, this equidistantly is not to make the distance of the distance of drain and gate greater than source electrode and gate, to reduce leakage current.
8, method as claimed in claim 1 is characterized in that: this protective seam is to be selected from photosensitive resin, silicon nitride layer, silicon oxide layer one of them or wherein combination arbitrarily.
9, the method for claim 1 is characterized in that: the step of the formation of this protective seam and this protective seam of patterning also comprises deposition one photosensitive resin layer earlier, again with light shield to this photosensitive resin irradiation to form contact hole pattern.
10, method as claimed in claim 9 is characterized in that: also be included in and anneal earlier before this photosensitive resin layer forms, to activate this second conductive-type impurity.
11, the method for claim 1 is characterized in that: the step of the formation of this protective seam and this protective seam of patterning also comprises:
Deposit a silicon nitride layer;
Impose annealing, to activate this second conductive-type impurity;
Deposit this photosensitive resin layer;
This photosensitive resin layer of patterning is with exposed this reflective metal layer and form contact hole pattern; Reaching with this photosensitive resin layer is the cover curtain, and this silicon nitride layer of patterning is to finish the structure in this contact hole.
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| CN 03119439 CN1287210C (en) | 2003-03-12 | 2003-03-12 | Manufacturing method for reflective liquid-crystal displaying device and peripheral circuit |
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| CN 03119439 CN1287210C (en) | 2003-03-12 | 2003-03-12 | Manufacturing method for reflective liquid-crystal displaying device and peripheral circuit |
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| CN1530718A true CN1530718A (en) | 2004-09-22 |
| CN1287210C CN1287210C (en) | 2006-11-29 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101072471B (en) * | 2006-05-11 | 2011-01-12 | 启萌科技有限公司 | Glass circuit board and its manufacturing method |
| CN104269421A (en) * | 2014-10-14 | 2015-01-07 | 北京思比科微电子技术股份有限公司 | Image sensor pixel structure with adaptive sensitivity |
| CN106324931A (en) * | 2016-09-06 | 2017-01-11 | 武汉华星光电技术有限公司 | Method for preparing high resolution low temperature polycrystalline silicon pixel |
| TWI570698B (en) * | 2014-05-13 | 2017-02-11 | 群創光電股份有限公司 | Transflective panel device |
| CN107731853A (en) * | 2017-09-27 | 2018-02-23 | 武汉华星光电技术有限公司 | A kind of array base palte, mask plate and array substrate manufacturing method |
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2003
- 2003-03-12 CN CN 03119439 patent/CN1287210C/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101072471B (en) * | 2006-05-11 | 2011-01-12 | 启萌科技有限公司 | Glass circuit board and its manufacturing method |
| TWI570698B (en) * | 2014-05-13 | 2017-02-11 | 群創光電股份有限公司 | Transflective panel device |
| CN104269421A (en) * | 2014-10-14 | 2015-01-07 | 北京思比科微电子技术股份有限公司 | Image sensor pixel structure with adaptive sensitivity |
| CN104269421B (en) * | 2014-10-14 | 2017-03-22 | 北京思比科微电子技术股份有限公司 | Image sensor pixel structure with adaptive sensitivity |
| CN106324931A (en) * | 2016-09-06 | 2017-01-11 | 武汉华星光电技术有限公司 | Method for preparing high resolution low temperature polycrystalline silicon pixel |
| CN106324931B (en) * | 2016-09-06 | 2019-07-26 | 武汉华星光电技术有限公司 | A kind of production method of high-resolution low temperature polycrystalline silicon pixel |
| CN107731853A (en) * | 2017-09-27 | 2018-02-23 | 武汉华星光电技术有限公司 | A kind of array base palte, mask plate and array substrate manufacturing method |
| WO2019061779A1 (en) * | 2017-09-27 | 2019-04-04 | 武汉华星光电技术有限公司 | Array substrate, mask plate and method for manufacturing array substrate |
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| CN1287210C (en) | 2006-11-29 |
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