CN1521711A - Dynamic matrix type display device - Google Patents

Dynamic matrix type display device Download PDF

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Publication number
CN1521711A
CN1521711A CNA031023665A CN03102366A CN1521711A CN 1521711 A CN1521711 A CN 1521711A CN A031023665 A CNA031023665 A CN A031023665A CN 03102366 A CN03102366 A CN 03102366A CN 1521711 A CN1521711 A CN 1521711A
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auxiliary capacitance
voltage
line
auxiliary
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CN1300753C (en
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宫岛康志
横山良一
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Abstract

The invention provides a dynamic matrix type display device, comprising auxiliary capacitor electrodes arranged in each pixel region forming the image electrodes, and an auxiliary capacitor arranged corresponding to a plurality of pixel electrodes, thus the reverse drive resulted from the auxiliary capacitor wires can be realized, furthermore, low power consumption and high display quality can also be realized by the invention.

Description

Dynamic matrix display device
Technical field
The present invention relates to a kind of dynamic matrix display device.
Technical background
At the switching device that passes through as thin film transistor (TFT) (TFT:Thin Film Transistor), and respectively in the dynamic matrix display device to pixel electrode transport picture signal independently, by applying the AC driving method of ac potential for counter electrode and auxiliary capacitor, when preventing the liquid crystal deterioration, can also reduce to be input to the potential difference (PD) between the vision signal positive-negative polarity of drain driver (drain driver), and, and realize low power consumption by the electric current and the voltage of reduction drain driver.
But, the horizontal inversion of vision signal reversal of poles that per 1 horizontal period will be delivered to each drain line to utmost point AC driving method in, because make the polarity of voltage counter-rotating of counter electrode and all auxiliary capacitance line, so the capacity load and the caused thus power consumption of counter electrode and all auxiliary capacitance line remain very big in per 1 horizontal period.
Therefore, in order to realize lower power consumption, in Japanese kokai publication hei 12-81606 communique, disclosed a kind of driving method (hereinafter referred to as " SC driving "), the mode that it is reversed by the polarity of voltage with auxiliary capacitor, counter electrode voltage is made as certain value voltage, when can further reducing power consumption, can also reduce the potential difference (PD) between the vision signal positive-negative polarity, and reduce the electric current and the voltage of drain driver.Below at using SC Driven Dynamic matrix liquid crystal display device to be illustrated.
Figure 11 represents to use the equivalent circuit diagram of the display panel of SC Driven Dynamic matrix liquid crystal display device.This circuit is furnished with some drain lines 105 in vertical direction, is furnished with some gate lines 107 in the horizontal direction, is provided with switching device TFT109 at its cross part.The grid of this TFT109 is connected with gate line 107, and its drain electrode is connected with drain line 105.The source electrode of TFT109 and the liquid crystal capacitance 112 wherein electrode of a side are connected.The opposite side electrode of liquid crystal capacitance 112 is counter electrodes 111, and it makes the substrate of a substrate that is provided with TFT109 and a relative side that clips liquid crystal form one.
In addition, the source electrode of TFT109 is connecting the capacitance electrode of auxiliary capacitor 110 a certain sides.The opposite side electrode of this auxiliary capacitor 110 is connected with auxiliary capacitance line 108.Auxiliary capacitance line 108 is parallel with gate line 107, and communicates with several auxiliary capacitors 110 of line direction.
What Figure 12 represented is the signal waveforms that is conceived to the driving display panel of single pixel, has represented grid voltage V in the drawings G, pixel voltage V P, source voltage V S, video voltage V D, auxiliary capacitor voltage V SCAnd counter electrode voltage V COMGrid voltage V GAt each frame (frame) in the cycle during the once conducting (ON).
When gate turn-on, the grid voltage V that gate line 107 is applied GBecome height (hereinafter referred to as " High ") level.During this period, TFT109 is a conducting state, is conducting state between drain electrode and the source electrode, source voltage V SCan be along with the video voltage V that puts on drain line 105 DAnd become and video voltage V DIdentical level.Thereby, this source voltage V SThen be applied on the capacitance electrode of a side of liquid crystal capacitance 112 and auxiliary capacitor 110.When grid cuts off (OFF), grid voltage V then GWill become low (hereinafter referred to as " Low ") level, TFT109 is a dissengaged positions, thereby has determined source voltage V S, meanwhile, be accompanied by grid voltage V GDecline, level only reduces Δ V SAnd become V PL
Counter electrode voltage V COMBe certain value voltage, be in only in advance with source voltage V SReduce Δ V SAbout, than video voltage V DCentered level V COn the also low level.
As the grid voltage V that is applied on the corresponding gate line 107 GAfter the decline, each auxiliary capacitance line 108 is applied auxiliary capacitor voltage V SCLevel is reversed.Auxiliary capacitor voltage V SCWill be with V SCHAnd V SCLThese two high-low levels reverse.For example, as source voltage V SBe in and be higher than counter electrode voltage V COMPositive polarity during, as grid voltage V GAfter the decline, source voltage V SCan be by low level V SCLRise to high level V SCHTherefore, as grid voltage V GDecline can determining source pole tension V SThereby the pixel voltage V that obtains P, will be subjected to auxiliary capacitor voltage V by auxiliary capacitor 110 SCThe influence of rising, and the Δ V that only rises PThe pixel voltage V of this moment PDuring not conducting of grid (OFF), promptly be maintained in 1 frame.
Like this, by auxiliary capacitor voltage V SCRising, the electric charge reallocation takes place between liquid crystal capacitance 112 and auxiliary capacitor 110, pixel voltage V PΔ V has only risen P=V PH-V PLOn the contrary, at source voltage V SBe lower than counter electrode voltage V COMNegative polarity during because auxiliary capacitor voltage V SCCan be from the occasion of dropping to negative value, so pixel voltage V PΔ V has only descended PIts result can cause pixel voltage V PAmplitude become big, and can increase the voltage that is applied to liquid crystal capacitance 112.
That is, by making auxiliary capacitor voltage V SCBetween two level, reverse, even counter electrode voltage V COMBe DC voltage, also can reduce video voltage V DAmplitude, and can apply sufficient voltage to liquid crystal capacitance 112.
Generally speaking, because therefore auxiliary capacitor 110 can pass through the change V (V of the auxiliary capacitor voltage of 1 row much larger than liquid crystal capacitance 112 SCH-V SCL) control the intensity of variation Δ V of pixel voltage PTherefore, by changing the auxiliary capacitor voltage of auxiliary capacitance line 108, just can apply bigger voltage to liquid crystal capacitance 112.That is,, just can reduce video voltage V by changing auxiliary capacitor voltage DAmplitude.
Yet at present, the general following driving methods that use promptly along with the increase of pixel, simultaneously with 105 conductings of some drain lines, and apply video voltage V to several liquid crystal capacitances 112 and auxiliary capacitor 110 simultaneously DDriving method.Method can guarantee fully that 105 pairs of liquid crystal capacitances 112 of drain line and auxiliary capacitor 110 apply video voltage V whereby DTime.
Especially when putting successively method and drive large-scale or high meticulous display panel, can be simultaneously with 105 conductings of tens of drain lines, and dozens of liquid crystal capacitance 112 and auxiliary capacitor 110 applied video voltage V simultaneously DLike this, when tens of drain lines 105 become conducting simultaneously, in the overlaid of drain line 105 that is conducting state and auxiliary capacitance line 108 part a large amount of electric capacity combinations will take place.That is, the voltage of auxiliary capacitance line 108 or gate line 107 finally can be subjected to the voltage influence of drain line 105 and change.By this change in voltage, it is inhomogeneous to make that portrait takes place in unit the drain line 105 that is conducting state simultaneously.
Summary of the invention
In the present invention, can apply the different voltage of polarity, promptly can carry out so-called some counter-rotating in the adjacent single or plurality of pixels electrode each.
The present invention has some articles the 1st and the 2nd auxiliary capacitance line corresponding and that extend along line direction with each row of pixel electrode, and corresponding with the 1st and the 2nd auxiliary capacitance line, each row of pixel electrodes are alternately disposing auxiliary capacitor.Carry signal can for like this each auxiliary capacitance line with opposed polarity.Therefore, utilize the 1st and the 2nd auxiliary capacitance line, can apply the different voltage of polarity, promptly realize so-called some inversion driving each adjacent pixel.
And, be preferably to the 1st and the 2nd auxiliary capacitance line and carry the 1st and the 2nd auxiliary capacitor voltage that during switching device is dissengaged positions, changes each other anti-phasely.Like this, when realizing the some inversion driving that causes by above-mentioned auxiliary capacitance line, can also reduce the amplitude of video voltage, and pixel electrode is applied sufficient voltage.
Description of drawings
Fig. 1 is the planimetric map of the display panel of dynamic matrix display device.
Fig. 2 is the planimetric map of the display panel of the present invention's the 1st embodiment.
Fig. 3 is the equivalent circuit figure of the display panel of the present invention's the 1st embodiment.
The sequential chart of Fig. 4 for concerning between each signal in the display panel of expression the present invention the 1st embodiment.
Fig. 5 (a) and Fig. 5 (b) are the signal waveforms of the driving method of the display device of expression the present invention the 1st embodiment.
Fig. 6 is the planimetric map of the display panel of the present invention's the 2nd embodiment.
Fig. 7 is the equivalent circuit diagram of the display panel of the present invention's the 2nd embodiment.
Fig. 8 is the planimetric map of the display panel of the present invention's the 3rd embodiment.
Fig. 9 is the equivalent circuit diagram of the display panel of the present invention's the 3rd embodiment.
Figure 10 (a) and Figure 10 (b) are the synoptic diagram of vertical inversion driving of expression and some inversion driving.
Figure 11 is the equivalent circuit diagram of existing display panel.
Figure 12 is the signal waveforms of the driving method of existing display device.
Embodiment
Below the 1st embodiment is described.Fig. 1 is the planimetric map of dynamic matrix display device display panel, and Fig. 2 is the planimetric map of the display panel of the 1st embodiment, and Fig. 3 is the equivalent circuit diagram of this display panel.
At first, in Fig. 1, on display panel 1, disposing drain driver (drain driver) 2 as line driver (row driver) along line direction, then disposing gate drivers (gate driver) 3 as row driver (row driver) along column direction.Disposing the viewing area 4 that is used for display image in drain driver 2 and 3 region surrounded of gate drivers.
In viewing area 4, as shown in Figures 2 and 3, be provided with some drain lines 5 as data line along column direction, and several very long rectangular pixels electrodes 6, then be provided with gate line 7 as selection wire and the 1st auxiliary capacitance line 8a and the 2nd auxiliary capacitance line 8b along line direction.In the zone that is disposing each pixel electrode 6 (hereinafter referred to as " pixel region "), disposing TFT9 and the 1st auxiliary capacitance line 10a or the 2nd auxiliary capacitance line 10b one of them.
TFT9 comprises: the grid 9g that is extended to form by gate line 7, raceway groove (channel) zone of the semiconductor layer of its below, the semiconductor layer drain region 9d that is electrically connected by drain line 5 and contact, the semiconductor layer source region 9s that is electrically connected by pixel electrode 6 and contact.In the present embodiment, TFT9 is the bigrid formula that is provided with two grid 9g.
The 1st auxiliary capacitor 10a is the auxiliary capacitance electrode 10x that is made of the semiconductor layer that links to each other with TFT9, and the auxiliary capacitance electrode 10y that is extended to form by the 1st auxiliary capacitance line 8a constitutes.The 2nd auxiliary capacitor 10b is by above-mentioned auxiliary capacitance electrode 10x, and the auxiliary capacitance electrode 10z that is extended to form by the 2nd auxiliary capacitance line 8b constitutes.
In addition, on the substrate that is provided with on the substrate of TFT9 with a relative side that clips liquid crystal, be provided with counter electrode 11, constitute capacitance electrode with the pixel electrode 6 corresponding relative sides of liquid crystal capacitance 12.
In the present embodiment, because TFT9 is made of the N channel TFT, therefore data line is called drain line, and this driver is called drain driver.But, TFT9 can also be made of the P channel TFT.
As shown in Figure 1,2 inputs have the 1st video voltage Vda and the 2nd video voltage VDb of reversed polarity each other to drain driver, and optional one is applied to each drain line 5 of selecting successively from the 1st video voltage VDa or the 2nd video voltage VDb.
Select 7 pairs of gate drivers 3 of gate line to apply signal GV successively.Viewing area 4 is with matrix type configuration plurality of pixels electrode 6, applies voltage between these pixel electrodes 6 and counter electrode 11, carries out the zone that image shows.
Drain line 5 is meant behind any voltage that has applied the 1st video voltage VDa with reversed polarity each other or the 2nd video voltage VDb, through contact this video voltage VDa or VDb is delivered to the wiring of the drain electrode of TFT9 again.
Pixel electrode 6 is the pixel regions that constituted as the unit of display, and drives the electrode of liquid crystal by the video voltage VD that transmits by TFT9 from drain line 5 with counter electrode 11.
Gate line 7 is selected by gate drivers 3, applies signal GV again, makes the TFT9 conducting (ON) that is connected whereby.
The 1st auxiliary capacitance line 8a and gate line 7 are formed at same one deck, and parallel with gate line 7.On the 1st auxiliary capacitance line 8a, arranging the auxiliary capacitance electrode 10y of several and its formation one along line direction.Therefore, the auxiliary capacitance electrode 10y of the 1st auxiliary capacitor 10a of each row is connected with each other.
The 2nd auxiliary capacitance line 8b and gate line 7 are formed at same one deck, and it is also parallel with gate line 7.On the 2nd auxiliary capacitance line 8b, arranging the auxiliary capacitance electrode 10z of several and its formation one along line direction.Therefore, the auxiliary capacitance electrode 10z of the 2nd auxiliary capacitor 10b of each row is connected with each other.
In addition, the 1st auxiliary capacitance line 8a is carried the 1st auxiliary capacitor voltage, and the 2nd auxiliary capacitance line 8b is carried the 2nd auxiliary capacitor voltage opposite with the 1st auxiliary capacitor polarity of voltage.
TFT9 is a kind of switching device (switching element), only when grid 9g was applied voltage, electric current just can be along flowing to the either direction of the direction of source region 9s to the direction of drain region 9d or from drain region 9d from source region 9s in the semiconductor layer channel region under the grid 9g.The electric charge that the 1st auxiliary capacitor 10a and the 2nd auxiliary capacitor 10b will be produced by the video voltage VD that drain line 5 is exported by TFT9 keeps 1 frame period, to remedy the loss of charge of liquid crystal capacitance 12.
Owing on counter electrode 11, applied certain voltage, therefore and the corresponding driving voltage of video voltage VD that is applied to pixel electrode 6 can be applied on the liquid crystal between pixel electrode 6 and the counter electrode 11, thereby drive the liquid crystal capacitance 12 of this pixel.
The electric charge that the video voltage VD that is the drain line 5 that kept by liquid crystal by TFT9 output that is kept in the liquid crystal capacitance 12 is produced.But, compare with the electric charge that the 1st auxiliary capacitor 10a or the 2nd auxiliary capacitor 10b are kept, the electric charge that liquid crystal capacitance 12 is kept is considerably less, therefore, these electric charges can since TFT9 when cutting off (OFF) leakage current or be easy to outflow from the leakage current of impurity in the liquid crystal.Therefore, need use the electric charge that is kept by the 1st auxiliary capacitor 10a and the 2nd auxiliary capacitor 10b to replenish the maintenance electric charge of liquid crystal capacitance 12.
Secondly, be illustrated with regard to driving method.Fig. 4 is illustrated in the sequential chart of each signal relation in the display panel.It represents vertical start signal STV and signal GV1, GV2, GV3, horizontal start signal STH and horizontal pulse signal CH, and the sequential of the change in voltage among the current potential SCb of the current potential SCa of the 1st auxiliary capacitance line 8a and the 2nd auxiliary capacitance line 8b.
At first, corresponding to the decline of vertical start signal STV pulse, the pulse of signal GV1 will be risen, and signal GV1 is transported to the gate line 7 of the 1st row, and makes the TFT9 that is connected with this gate line 7 be conducting state.Then, the pulse of horizontal start signal STH is risen, and when this pulse descends, the pulse rising of the initial level pulse signal CH of the gate line 7 that makes the 1st row simultaneously in during selected.
During the 1st gate line of going 7 conveying signal GV1, the pulse meeting of horizontal pulse signal CKH is risen successively, when these pulses are risen, select drain line 5 successively, video voltage VD is applied on pixel electrode 6 and the 1st auxiliary capacitor 10a and the 2nd auxiliary capacitor 10b successively by TFT9.And the 1st video voltage VDa is applied to pixel electrode 6 and the 1st auxiliary capacitor 10a, and the 2nd video voltage VDb then is applied to pixel electrode 6 and the 2nd auxiliary capacitor 10b.
If all drain lines 5 are applied video voltage VD, just signal GV1 can not be transported to the gate line 7 of the 1st row, make the TFT9 that is connected with this gate line 7 be dissengaged positions.Therefore, the pulse meeting of signal GV2, signal GV3 is risen successively, and respectively the 2nd gate line 7 of going is applied signal GV2, the mode that the 3rd gate line 7 of going is applied signal GV3 is carried out above-mentioned action repeatedly.
When the TFT9 that is connected with gate line 7 is dissengaged positions, that is, when not when gate line 7 is carried signal GV, the polarity of the current potential SCa of the 1st auxiliary capacitance line 8a of this row and the current potential SCb of the 2nd auxiliary capacitance line 8b can be reversed.At this, the polarity of auxiliary capacitor voltage VCa, the VCb of the 1st auxiliary capacitance line 8a, the 2nd auxiliary capacitance line 8b is opposite polarity when just beginning, counter-rotating by level, setting is applied to this pixel when becoming therewith video voltage becomes the state of identical polar, promptly keeps this state then.Because the counter-rotating of level is to carry out after breaking moment at TFT9 at once, former either party to auxiliary capacitor 10a or 10b applies after the 1st or the 2nd video voltage, because TFT9 is dissengaged positions, although make the potential difference (PD) of counter electrode 11 of they and source voltage Vs once to diminish, but, after this via applying the 1st or the 2nd auxiliary capacitor voltage, then will increase the potential difference (PD) between they and the counter electrode 11.
Like this, if signal GV is flowed to all gate lines 7, the pulse of vertical start signal STV will be risen once more, and the 1st gate line 7 of going is applied signal GV, the complex phase of laying equal stress on action together with this impulsive synchronization ground.
Fig. 5 represents the signal waveforms of driving method of the display device of the present invention's the 1st embodiment, and it is illustrated in the signal waveform between 1 frame in the gate line direction adjacent pixel region.The signal waveform of Fig. 5 (a) expression the 1st auxiliary capacitor 10a, the signal waveform of Fig. 5 (b) expression the 2nd auxiliary capacitor 10b.Signal waveform and Figure 12 shown in Fig. 5 (a) is roughly the same, and but, the signal waveform shown in Fig. 5 (b) the then polarity with shown in Figure 12 is just in time opposite.
As shown in Figure 1, the 1st auxiliary capacitor 10a and the 2nd auxiliary capacitor 10b are configured on the horizontal direction adjacent pixels.Therefore, in pixel adjacent, apply opposite polarity video voltage VDa, VDb, on the 1st auxiliary capacitor 10a of the pixel that applies video voltage VDa, apply auxiliary capacitor voltage VCa with video voltage VDa identical polar.And on the 2nd auxiliary capacitor 10b of the pixel that applies video voltage VDb, then apply the auxiliary capacitor voltage VCb with video voltage VDb identical polar, and, TFT9 cut off during carry out the reversal of poles of this auxiliary capacitor voltage VCa, VCb.Therefore, by the cut-out of TFT9, the source voltage Vs of TFT9 will only reduce Δ Vs.But, because the change in voltage Δ V of the pixel electrode that counter-rotating produced of auxiliary capacitor voltage VC PCan develop towards the direction that the inter-electrode voltage that impels liquid crystal capacitance 12 increases, therefore can be with the driven liquid crystal of abundance.
Like this, in the dynamic matrix display device of present embodiment, dispose: be configured in auxiliary capacitor 10a in each pixel region that forms pixel electrode 6 or any auxiliary capacitor of auxiliary capacitor 10b.Then, be connected with the source electrode of the TFT9 of this pixel respectively along the side of line direction several auxiliary capacitors 10a, 10b arranged side by side.On the other hand, then be connected along the every electrode of the opposite side of the auxiliary capacitor 10a of configuration alternately of line direction with the 1st auxiliary capacitance line 8a.And the every electrode and the 2nd auxiliary capacitance line 8b of the opposite side of the auxiliary capacitor 10b of configuration alternately are connected along line direction.
And, in each frame period, carry the video voltage of reversal of poles to drain line 5 respectively.This video voltage has the 1st video voltage and the 2nd video voltage of opposite polarity each other, and adjacent drain line 5 is applied the 1st video voltage and the 2nd video voltage respectively.
Then, utilize the 1st video voltage conducting TFT9, when the 1st auxiliary capacitor 10a is charged, the polarity of the 1st auxiliary capacitor voltage VCa that puts on the 1st auxiliary capacitance line 8a of this pixel can be reversed, and make it identical with the 1st video voltage polarity.And, utilize the 2nd video voltage conducting TFT9, when the 2nd auxiliary capacitor 10b is charged, the polarity of the 2nd auxiliary capacitor voltage VCb that puts on the 2nd auxiliary capacitance line 8b of this pixel can be reversed, and make it identical with the 2nd video voltage polarity.
Like this, use auxiliary capacitance line 8a, 8b, just can realize so-called some inversion driving.
Then, in this dynamic matrix display device, when TFT9 is conducting, when carrying the 1st video voltage for the 1st auxiliary capacitor 10a that is connecting the 1st auxiliary capacitance line 8a, also the 2nd auxiliary capacitor with the 2nd auxiliary capacitance line is carried the 2nd video voltage.Then, when TFT9 is dissengaged positions, meanwhile, the source voltage Vs of TFT9 will descend, and the voltage of coupled auxiliary capacitor 10a, 10b will reduce.
Yet, if according to present embodiment, when TFT9 is dissengaged positions, just can carry the 1st auxiliary capacitor voltage VCa to the 1st auxiliary capacitance line 8a, the polarity of voltage that makes level be changed to the 1st auxiliary capacitor to be kept (this moment this pixel source voltage Vs or pixel electrode voltage V PPolarity), have opposite polarity the 2nd auxiliary capacitor voltage VCb and the 2nd auxiliary capacitance line 8b carried with the 1st auxiliary capacitor voltage VCa, the polarity of voltage that makes level be changed to the 1st auxiliary capacitor to be kept (this moment this pixel source voltage Vs or pixel electrode voltage V PPolarity).Therefore, can move the sustaining voltage of the 1st and the 2nd auxiliary capacitor of filling up change by the cut-out of TFT9, and, the voltage that the 1st and 2 auxiliary capacitors are kept can be increased.
In the present embodiment,, can eliminate the influence that causes owing to adjacent video voltage, and can prevent because electric capacity is inhomogeneous in conjunction with caused portrait by carrying out an inversion driving.And, during switching device (TFT9) is dissengaged positions, when the 1st and the 2nd auxiliary capacitance line is reversed, will apply the opposite polarity the 1st or the 2nd auxiliary capacitor voltage respectively.Like this, even cause the amplitude of video voltage to narrow down, also can apply sufficient voltage, and can reduce power consumption liquid crystal.
In the present embodiment, in order to reduce to draw a portrait inhomogeneous or scintillation as far as possible, it is unit that the 1st and the 2nd auxiliary capacitance line 8a, 8b are set at a pixel, submits for ground at line direction to have the structure of auxiliary capacitance electrode.But, the present invention is not limited thereto, also can set the structure of alternate configurations the 1st and 2 auxiliary capacitor 10a, 10b in some the classify units of line direction with continuous pixel.
For example, also be preferably: three pixels that show with the RGB primary colors are a unit, this each unit are configured to the auxiliary capacitor 10a, the 10b that are connected with the arbitrary line of the 1st or the 2nd auxiliary capacitance line 8a, 8b.
Below, the 2nd embodiment is illustrated.
In the 1st embodiment, as shown in Figure 2, the 1st auxiliary capacitance line 8a and the 2nd auxiliary capacitance line 8b are a kind of and the overlapping structure of all auxiliary capacitance electrode 10x.Like this, only at the pixel region that exists the auxiliary capacitance electrode 10z that has formed the 2nd auxiliary capacitance line 8b and the 2nd auxiliary capacitor 10b, just exist the lap 13 on the semiconductor layer that links to each other that overlaps with the 1st auxiliary capacitance line 8a and auxiliary capacitance electrode 10z.Therefore, at this lap 13 with the generation capacitor C of deriving PAR
The problem that the 2nd embodiment will solve is by the capacitor C of deriving PARCan only be formed at the 2nd auxiliary capacitor 10b and go up caused problem.Fig. 6 is the planimetric map of the display panel of the present invention's the 2nd embodiment, and Fig. 7 is its equivalent circuit figure.For with the identical numbering of then mark of the 1st embodiment same structure and omit explanation.
Present embodiment is different with the 1st embodiment be in: have in the pixel region of auxiliary capacitance electrode 10y, be provided with by what auxiliary capacitance electrode 10y extended to form and overlap virtual (dummy) distribution 14 on the 2nd auxiliary capacitance electrode 8b.This virtual distribution 14 is by formation and the equitant part 13 ' of the 2nd auxiliary capacitance line 8b that does not form auxiliary capacitor, and the capacitor C of deriving of formation and auxiliary capacitance electrode 10z and the equitant part 13 of the 1st auxiliary capacitance line 8a PARThe capacitor C of deriving that equates PAR '
In the 1st embodiment, owing to only produce the capacitor C of deriving at auxiliary capacitance electrode 10z and the equitant part 13 of the 1st auxiliary capacitance line 8a PAR, the current potential that therefore only has the 2nd auxiliary capacitor 10b of auxiliary capacitance electrode 10z just can reduce.Therefore, at pixel region with have between the pixel region of auxiliary capacitance electrode 10z with auxiliary capacitance electrode 10y, with pixel electrode 6 in each pixel region the size of the counter electrode voltage of coupling can produce difference, therefore be easy to contrast (contrast) and be offset or scintillation.
But, in the present embodiment, by form the mode of virtual distribution 14 at the 1st auxiliary capacitance electrode 10x place, form the 1st auxiliary capacitor voltage 10x and the 2nd auxiliary capacitance line 8b and the virtual distribution 14 equitant laps 13 ' that do not form auxiliary capacitor, produce the capacitor C of deriving thus PAR '
Its result is exactly, by obtaining the balanced polarities between the 1st auxiliary capacitor 10a and the 2nd auxiliary capacitor 10b, can eliminate with each pixel region in pixel electrode 6 difference of the size of the counter electrode voltage of coupling, and then can eliminate by this difference caused to ratio deviation or scintillation.
Then, be illustrated with regard to the 3rd embodiment.Fig. 8 is the planimetric map of the display panel of the present invention's the 3rd embodiment, and Fig. 9 is its equivalent circuit diagram.For with the identical numbering of mark of the 1st embodiment same structure and omit explanation.In the present embodiment, the configuration of drain line 5 and pixel electrode 6 is identical with the 1st or the 2nd embodiment.
Present embodiment is different with the 1st and the 2nd embodiment be in: gate line 7 is configured in the middle body of pixel electrode, and is sandwiched between the 1st auxiliary capacitance line 8a and the 2nd auxiliary capacitance line 8b.And in each pixel region, the grid that forms one with gate line 7 and constitute TFT9 is the boundary line with gate line 7, has formed the zone of being furnished with auxiliary capacitance electrode 10x.
Owing in the 2nd embodiment, except that the auxiliary capacitance electrode that just needs originally, also disposed virtual distribution, therefore, it is complicated that kenel (pattern) becomes, and aperture opening ratio reduces.
But, in the present embodiment, by gate line 7 being configured between the 1st auxiliary capacitance line 8a and the 2nd auxiliary capacitor 8b, since all auxiliary capacitance electrode 10x only with the 1st auxiliary capacitance line 8a that constitutes auxiliary capacitor or arbitrary the line overlaid of the 2nd auxiliary capacitance line 8b, so do not need lap 13 and lap 13 ', and then can eliminate the capacitor C of deriving that results from lap PAR
And, in the present embodiment, can also shorten the distance between the 2nd auxiliary capacitance line 8b and the TFT9, and then reduce wiring resistance.Like this, owing to can reduce the area of necessary semiconductor layer when the virtual distribution 14 of auxiliary capacitance electrode 10z that forms the 1st embodiment or the 2nd embodiment, therefore can improve aperture opening ratio.
In addition, in each embodiment, though be to be example with bigrid formula TFT, the present invention is not limited thereto, both can be that 1 grid also can be made of 3 above grids.And, though the auxiliary capacitance line of each embodiment and gate line are formed at same one deck, but also can with the gate line different layers on form auxiliary capacitance line.
And, in each embodiment, and though be to be example with the active matrix liquid display device, the present invention is not limited thereto, and it is also applicable to dynamic matrix electroluminescence type (Electroluminescence; EL) display device.
As mentioned above, in the present embodiment, have corresponding with each row of pixel electrode, and some articles the 1st and the 2nd auxiliary capacitance line extending along line direction, and and the corresponding auxiliary capacitor of the 1st and the 2nd auxiliary capacitance line in each row alternate configurations of pixel electrodes.Carry signal like this, just can for each auxiliary capacitance line with opposed polarity.Therefore,, each pixel adjacent is applied the voltage of opposed polarity, just can realize so-called some inversion driving by the 1st and the 2nd auxiliary capacitance line.
And, be preferably by pixel electrode being applied the 1st video voltage that its polarity of each frame period will reverse or show, and the 1st and the 2nd auxiliary capacitance line carried at switching device cut off the 1st and the 2nd auxiliary capacitor voltage that changes each other during (OFF) anti-phasely with the mode of any voltage of opposite polarity the 2nd video voltage of the 1st video voltage.Especially, the polarity of the 1st video voltage and the 1st auxiliary capacitor voltage is made as identical, is made as the polarity of the 2nd video voltage and the 2nd auxiliary capacitor voltage identical.Like this, just can realize, and can reduce the amplitude of video voltage by caused some inversion driving of above-mentioned auxiliary capacitance line.
In addition, the 1st and the 2nd auxiliary capacitance line is preferably the some units of classifying as with continuous pixel electrode, and alternately has auxiliary capacitance electrode.For example, be 1 group (group) with the pixel electrode of the three primary colors RGB in the Show Color, can apply voltage to each adjacent group with opposite polarity.Like this, inversion driving that can realization group unit.
And the 1st is preferably corresponding with each row that forms pixel electrode and all auxiliary capacitance electrode overlaids of configuration with the 2nd auxiliary capacitance line.Like this, owing to can reach the effect of the polarity between electric capacity of deriving that is produced in auxiliary capacitance line that balance do not form auxiliary capacitor and the auxiliary capacitance electrode overlapping region, so can prevent to draw a portrait inhomogeneous.
In addition, auxiliary capacitance electrode is preferably and has the virtual distribution that overlaps on the auxiliary capacitance line that does not form auxiliary capacitor one side in the 1st or the 2nd auxiliary capacitance line.Like this, because the 1st and the 2nd auxiliary capacitance line similarly forms and the equitant mode of all auxiliary capacitance electrodes, therefore can reach the effect that balance does not form the polarity between electric capacity of deriving that is produced in the auxiliary capacitance line of auxiliary capacitor and the auxiliary capacitance electrode overlapping region, and then can prevent to draw a portrait inhomogeneous.
In addition, in the pixel region that forms pixel electrode, gate line is preferably and is configured between the 1st and the 2nd auxiliary capacitance line.Like this, can eliminate the auxiliary capacitance line and the equitant zone of auxiliary capacitance electrode that do not form auxiliary capacitor, and the electric capacity of deriving that produces in this zone, and can prevent to draw a portrait inhomogeneous.
In addition, in pixel region, for gate line, being preferably with the gate line is the boundary line, in the zone of being furnished with that part of auxiliary capacitance electrode, is formed with the grid that switching device constitutes.Like this, can eliminate the auxiliary capacitance line and the equitant zone of auxiliary capacitance electrode that do not form auxiliary capacitor, and the electric capacity of deriving that produces in this zone, and can prevent to draw a portrait inhomogeneous.
In addition, in this dynamic matrix display device, on the 2nd substrate, disposing common electrode (counter electrode 11), and this common electrode is being applied certain voltage.Like this, owing to can avoid the voltage of the bigger common electrode of area to produce change, and can drive dynamic matrix display device by lower voltage and power consumption.
And, at switching device (TFT9) disengagement phase, after cutting off at switching device, the mode that the level of the 1st and the 2nd auxiliary capacitor voltage reverses at once, make under caused influence is moved in the cut-out that is not vulnerable to switching device, the variation in voltage that is kept at the 1st and the 2nd auxiliary capacitor replenishes the electric charge of the auxiliary capacitor of change more after a little while, therefore can use more electric charge so that improve the voltage that keeps the 1st and the 2nd auxiliary capacitor.
Therefore, according to present embodiment, can provide display quality high dynamic matrix display device.
At this, also can be to apply the voltage of identical polar in drain line direction adjacent pixel electrodes.At this moment, will form vertical inversion driving shown in Figure 10 (a).
But, if the characteristic of considering just is preferably and adopts shown in Figure 10 (b), all adjacent up and down pixels are applied the some inversion driving of opposite polarity.As shown in the figure, in any driving method, all can apply voltage with the former frame opposite polarity to each frame.
By carrying out an inversion driving, not only can prevent the liquid crystal deterioration, and can effectively prevent the electric capacity combination.

Claims (14)

1. dynamic matrix display device, it is characterized in that: it disposes plurality of pixels with matrix form, and controls the demonstration of each pixel; This device has,
Some along the line direction extension, in order to transmit the gate line of grid voltage;
Some along the column direction extension, in order to transmit the data line of video voltage;
Corresponding with the intersection point of above-mentioned gate line and above-mentioned data line and the configuration switching device;
The pixel electrode that links to each other with above-mentioned data line by above-mentioned switching device; And,
Corresponding with each row of pixel electrodes, some the 1st and the 2nd auxiliary capacitance lines that extend along line direction;
On each pixel, also disposing the auxiliary capacitance electrode on the arbitrary line that overlaps the above-mentioned the 1st or the 2nd auxiliary capacitance line.
2. dynamic matrix display device as claimed in claim 1 is characterized in that: the above-mentioned the 1st and the 2nd auxiliary capacitance line is carried the 1st and the 2nd auxiliary capacitor voltage that changes each other at above-mentioned switching device disengagement phase respectively anti-phasely.
3. dynamic matrix display device as claimed in claim 1 is characterized in that: apply certain voltage for the counter electrode that is formed on the subtend substrate, this subtend substrate is relative with the direction of the substrate that has formed pixel electrodes,
To be delivered to the above-mentioned the 1st and the 2nd auxiliary capacitance line at the 1st and the 2nd auxiliary capacitor voltage that above-mentioned switching device disengagement phase changes each other anti-phasely respectively.
4. dynamic matrix display device as claimed in claim 1 is characterized in that: the auxiliary capacitance electrode of each pixel is per 1 unit of classifying as with pixel, and alternately with the above-mentioned the 1st or the 2nd auxiliary capacitance line in arbitrary line overlap.
5. dynamic matrix display device as claimed in claim 1 is characterized in that: the auxiliary capacitance electrode of each pixel is the some units of classifying as with continuous above-mentioned pixel, and alternately with arbitrary line overlap of the above-mentioned the 1st or the 2nd auxiliary capacitance line.
6. dynamic matrix display device as claimed in claim 1 is characterized in that: the above-mentioned the 1st and all above-mentioned auxiliary capacitance electrode overlaids of configuration corresponding with each row of the pixel that forms these auxiliary capacitance lines with the 2nd auxiliary capacitance line.
7. dynamic matrix display device as claimed in claim 6, it is characterized in that: above-mentioned auxiliary capacitance electrode has, in the above-mentioned the 1st or the 2nd auxiliary capacitance line, a part forms auxiliary capacitor, simultaneously another part overlap do not form auxiliary capacitor auxiliary capacitance line on virtual distribution.
8. dynamic matrix display device as claimed in claim 1 is characterized in that: in the pixel region that forms pixel electrodes, above-mentioned gate line is configured between the above-mentioned the 1st and the 2nd auxiliary capacitance line.
9. dynamic matrix display device as claimed in claim 8, it is characterized in that: in above-mentioned pixel region, on above-mentioned gate line, be the boundary line with above-mentioned gate line, in being furnished with the zone of above-mentioned auxiliary capacitance electrode, form grid with above-mentioned switching device structure.
10. dynamic matrix display device, it is characterized in that: it disposes plurality of pixels with matrix form, and controls the demonstration of each pixel; It has,
Be configured in plurality of pixels electrode on the 1st substrate with the ranks shape;
The switching device that is connected with pixel electrodes respectively;
The auxiliary capacitance electrode that disposes respectively at each pixel region that has disposed pixel electrodes;
The the 1st and the 2nd auxiliary capacitance line that disposes accordingly of pixel electrodes with each row; And,
With arbitrary line of the above-mentioned the 1st or the 2nd auxiliary capacitance line and above-mentioned auxiliary capacitance electrode relative direction on the 1st and the 2nd auxiliary capacitor that forms; Wherein,
By pixel electrodes and above-mentioned auxiliary capacitance electrode are applied following any voltage, i.e. the 1st video voltage, it all can reverse in each frame period polarity; Or the 2nd video voltage, it is opposite with above-mentioned the 1st video voltage polarity, mode when showing,
Respectively to the above-mentioned the 1st and the 2nd auxiliary capacitance line carry above-mentioned switching device be dissengaged positions during the 1st and the 2nd auxiliary capacitor voltage that changes of level.
11. dynamic matrix display device as claimed in claim 10, it is characterized in that: above-mentioned switching device be conducting state during, above-mentioned the 1st auxiliary capacitance electrode is carried above-mentioned the 1st video voltage, above-mentioned the 2nd auxiliary capacitance electrode is carried above-mentioned the 2nd video voltage
Above-mentioned switching device be dissengaged positions during, the level that is transported to the 1st auxiliary capacitor voltage of above-mentioned the 1st auxiliary capacitance line can be varied to the level with above-mentioned the 1st video voltage identical polar,
The level that is transported to the 2nd auxiliary capacitor voltage of above-mentioned the 2nd auxiliary capacitance line can be varied to the level with above-mentioned the 2nd video voltage identical polar.
12. dynamic matrix display device as claimed in claim 10, it is characterized in that: above-mentioned switching device be conducting state during, above-mentioned the 1st auxiliary capacitance electrode is carried above-mentioned the 1st video voltage, above-mentioned the 1st auxiliary capacitance line is carried and opposite polarity the 1st auxiliary capacitor voltage of above-mentioned the 1st video voltage, above-mentioned the 2nd auxiliary capacitance electrode is carried above-mentioned the 2nd video voltage, above-mentioned the 2nd auxiliary capacitance line is carried and opposite polarity the 2nd auxiliary capacitor voltage of above-mentioned the 2nd video voltage;
Above-mentioned switching device be dissengaged positions during, the level of above-mentioned the 1st auxiliary capacitor voltage can be varied to and the identical level of above-mentioned the 1st video voltage polarity, and the level of above-mentioned the 2nd auxiliary capacitor voltage can be varied to and the identical level of above-mentioned the 2nd video voltage polarity.
13. dynamic matrix display device as claimed in claim 10 is characterized in that: on the 2nd substrate, disposing common electrode, above-mentioned common electrode is applied certain voltage.
14. dynamic matrix display device as claimed in claim 10 is characterized in that: above-mentioned switching device be dissengaged positions during, after above-mentioned switching device cut off, the level of the 1st and the 2nd auxiliary capacitor voltage changed immediately.
CNB031023665A 2003-02-10 2003-02-10 Dynamic matrix type display device Expired - Lifetime CN1300753C (en)

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Cited By (4)

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CN1782834B (en) * 2004-11-30 2010-08-11 三洋电机株式会社 Display device
CN102576162A (en) * 2009-10-20 2012-07-11 夏普株式会社 Display apparatus
CN101645250B (en) * 2008-08-04 2012-10-10 索尼株式会社 Liquid crystal display
CN113241032A (en) * 2021-05-10 2021-08-10 深圳市华星光电半导体显示技术有限公司 Display panel driving method, display panel and liquid crystal display device

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JP3256730B2 (en) * 1996-04-22 2002-02-12 シャープ株式会社 Liquid crystal display device and driving method thereof
JP3423165B2 (en) * 1996-11-07 2003-07-07 シャープ株式会社 Liquid crystal display
JP3335895B2 (en) * 1997-12-26 2002-10-21 シャープ株式会社 Liquid crystal display
JP2000081606A (en) * 1998-06-29 2000-03-21 Sanyo Electric Co Ltd Method for driving liquid crystal display element
JP2001255851A (en) * 2000-03-09 2001-09-21 Matsushita Electric Ind Co Ltd Liquid crystal display device
JP2002098997A (en) * 2000-09-25 2002-04-05 Toshiba Corp Liquid crystal display device
JP4609970B2 (en) * 2001-01-17 2011-01-12 カシオ計算機株式会社 Liquid crystal display device

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Publication number Priority date Publication date Assignee Title
CN1782834B (en) * 2004-11-30 2010-08-11 三洋电机株式会社 Display device
CN101645250B (en) * 2008-08-04 2012-10-10 索尼株式会社 Liquid crystal display
CN102576162A (en) * 2009-10-20 2012-07-11 夏普株式会社 Display apparatus
CN113241032A (en) * 2021-05-10 2021-08-10 深圳市华星光电半导体显示技术有限公司 Display panel driving method, display panel and liquid crystal display device
WO2022236854A1 (en) * 2021-05-10 2022-11-17 深圳市华星光电半导体显示技术有限公司 Display panel driving method, display panel, and liquid crystal display device

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