CN1508851A - Method for avoiding silicon layer etching nonuniform - Google Patents
Method for avoiding silicon layer etching nonuniform Download PDFInfo
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- CN1508851A CN1508851A CNA021578125A CN02157812A CN1508851A CN 1508851 A CN1508851 A CN 1508851A CN A021578125 A CNA021578125 A CN A021578125A CN 02157812 A CN02157812 A CN 02157812A CN 1508851 A CN1508851 A CN 1508851A
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Abstract
Based on etching buffer layer with good anti etching capability, an even etching resistance is provided on surface of silicon layer and sidewall to make even consistent etching speed uniform so as to obtain silicon layer with even thickness. First, a silicon layer is provided. Next, a mask layer with prearranged pattern is formed on part of surface of the said silicon layer. Then, with the said mask layer as a mask, the first etching procedure is carried out on the silicon layer in order to form a patterned silicon layer. With the said mask layer being removed, a silicon oxide layer is formed on surface of the said patterned substrate and sidewall in conformality. Finally, second etching procedure is carried out in its entirety to remove the said silicon oxide layer as well as to etch the said patterned silicon layer in order to make the patterned silicon layer possess a certain thickness.
Description
Technical field
The present invention relates to a kind of method of etch silicon layer, and be particularly related to a kind of uneven method of silicon layer etching of avoiding.
Background technology
Silicon materials are the semi-conducting materials that very generally use at present.After first semiconducter IC (integrated circuit) in 1956 appearance, silicon is omnipresent in our life for many years.In the middle of the controller and power supply unit of the memory in all types of computers, microprocessor, screen, none does not use IC, and mobile phone, computer, electronic game machine, microwave oven ... wait various electronic products too.Moreover, flourish day by day Thin Film Transistor-LCD (thin film transistor liquid crystaldisplay; TFT LCD) also must be by means of silicon, its effect of competence exertion.
A series of cleaning, deposition, photoetching, etching are normally passed through in the making of present various electronic components ... etc. operation and making.Yet, take place when silicon often has problem in uneven thickness during in etching.Since silicon etchant at present commonly used mainly consist of HCX, X refers to halogens, for example: fluorine (F), chlorine (Cl), bromine (Br) ... etc., and silicon is carried out first time etching work procedure 140 when carrying out patterning with these etchants that contain halogens, shown in Figure 1A, often have Si
xO
yCl
zResidue 106 be formed at patterning silicon layer 102a sidewall, and Si
xO
yCl
zThe chemical stability that residue 106 tools are fabulous.Therefore, refer again to Figure 1B, after removing photoresist 104, desire with patterning silicon layer 102a further utilize one for the second time etching work procedure 150 when reducing thickness, Si
xO
yCl
zResidue 106 is just as the hard mask (hard mask), can prevent that patterning silicon layer 102a sidewall is etched, thus, just can't reduce the thickness of patterning silicon layer 102a equably, and form the inhomogeneous profile that patterning silicon layer 102a sidewall is thicker and the top is thin.
Therefore, in order to address the above problem, main purpose of the present invention is to provide a kind of uneven method of silicon layer etching of avoiding, and it is applicable to the etching of various silicon layers.
Summary of the invention
The object of the present invention is to provide a kind of uneven method of silicon layer etching of avoiding, it can make silicon layer be etched to a set thickness equably.
The present invention is characterized in to be conformally formed the good etch buffer layers of an anti-etching ability (for example silica) on silicon surface and sidewall, in order to an etching resistance to be provided equably, make the etch-rate uniformity of entire substrate, can reduce the thickness of silicon layer equably.And this etch buffer layers can be utilized and entire substrate is implemented an oxygen-containing gas treatment process and make.
For realizing above-mentioned purpose, the present invention proposes a kind of uneven method of silicon layer etching of avoiding, and the step of the method mainly comprises:
At first, provide a silicon layer.Then, form one and have the part surface of the mask layer of predetermined pattern in above-mentioned silicon layer.Then, for covering, enforcement etching work procedure one first time on above-mentioned silicon layer is to form a patterning silicon layer with above-mentioned mask layer.Then, remove the aforementioned mask layer.Then be conformally formed an etch buffer layers on above-mentioned patterned silicon laminar surface and sidewall.At last, comprehensive execution one is etching work procedure for the second time, not only removes above-mentioned etch buffer layers, and the above-mentioned patterning silicon layer of etching, makes above-mentioned patterning silicon layer be reduced to a set thickness.
According to the present invention, above-mentioned first time, the main purpose of etching work procedure was to define the pattern of above-mentioned silicon layer.Above-mentioned first time, the etchant of etching work procedure comprised HCX, and X refers to halogens, for example fluorine (F), chlorine (Cl), bromine (Br) ... etc.
According to the present invention, above-mentioned second time, the main purpose of etching work procedure was to make above-mentioned patterning silicon layer to have a uniform specific thicknesses.The employed etchant of the above-mentioned etching work procedure second time comprises Cl
2, SF
6Or HBr.
As previously mentioned, the aforementioned mask layer can be photoresist layer (photoresist layer).And the material of above-mentioned etch buffer layers comprises silica, and it utilizes enforcement one oxygen-containing gas treatment process to form to carry out oxidizing process.The thickness of above-mentioned etch buffer layers is roughly 5～20nm.And the thickness of above-mentioned silicon layer is roughly 120～250nm.Above-mentioned oxygen-containing gas is roughly 90%～99% oxygen and 10～1% etchant of etching work procedure for the second time, and it is implemented temperature and is about 30～50 ℃.
Description of drawings
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below, among the figure:
Figure 1A and Figure 1B show the schematic diagram of the thickness etching problem of non-uniform that is suffered from when having the silicon etching now; And
Fig. 2 A to Fig. 2 F shows the process section according to a preferred embodiment of silicon etch process of the present invention.
Description of reference numerals in the accompanying drawing is as follows:
100,200 substrate 102a silicon layers
104 photoresists, 106,206 Si
xO
yCl
zResidue
140 etching work procedure 150 etching work procedures for the second time for the first time
202 silicon layers, 204 patterning photoresist layers
500 etching work procedure 202a patterning silicon layers for the first time
600 oxygen-containing gas treatment process, 208 silica etch buffer layers
700 etching work procedures for the second time
Embodiment
Below please cooperate F, the preferred embodiment according to silicon layer engraving method of the present invention is described with reference to Fig. 2 A to Fig. 2.
At first, please refer to Fig. 2 A, a silicon layer 202 is provided earlier, its thickness is about 120～250nm.This silicon layer 202 may be applied to semi-conductive substrate or thin-film transistor (thin film transistor; TFT) active layer (active layer), even the field of any possibility applying silicon material do not limited at this, and silicon layer 202 can be arranged at any possible substrate 200 surfaces as required.
Then, please refer to Fig. 2 B, form a mask layer in the part surface of silicon layer 202 on silicon layer 202 surfaces earlier, for example utilize spin-coating method (spin coating) to form a photoresist layer (photoresistlayer) as mask layer.The patterned mask layer for example utilizes suitable photo-mask process again, with the photoresist layer patternization, to form the photoresist layer 204 of a patterning.
Then, please refer to Fig. 2 C, for covering, silicon layer 202 is implemented an etching work procedure 500 for the first time, to form the silicon layer 202a of a patterning with the photoresist layer 204 of patterning.The main purpose of etching work procedure 500 is to define the pattern of silicon layer 202 for the first time, its etchant comprises HCX, X refers to halogens, for example fluorine (F), chlorine (Cl), bromine (Br) ... etc., and silicon is carried out etching with these etchants that contain halogens, often having the silicon oxidation residue that contains halogen family element and generate, is example with the etchant that contains the chlorine element wherein, and Si is then easily arranged
xO
yCl
zResidue 206 be formed at patterning silicon layer 202a sidewall, and Si
xO
yCl
z Residue 206 is very stable, when follow-up desire with patterning silicon layer 202a further utilize again one for the second time etching work procedure when reducing thickness, Si
xO
yCl
zResidue 206 just as the hard mask (hard mask), can prevent that patterning silicon layer 202a sidewall is etched, thus, just can't reduce the thickness of patterning silicon layer 202a equably.
Then, can utilize suitable solution removal patterning photoresist layer 204, shown in Fig. 2 D.
Then, this step is a principal character of the present invention, before carrying out a silicon thickness etching for the second time, can be earlier by in etching reaction chamber internal implementation one oxygen-containing gas treatment process 600, shown in Fig. 2 D.Please refer to Fig. 2 E again, being conformally formed one deck silicon oxide layer 208 on patterning silicon layer 202a surface and sidewall, with as etch buffer layers.The anti-etching ability of the etchant of 208 pairs of the silica etch buffer layers follow-up second time of etching work procedure is good, its awkward etching material, and its thickness is about 5～20nm.Oxygen-containing gas can comprise 90%～99% oxygen and 10～1% the second time etching work procedure etchant, it is implemented temperature and for example is 30～50 ℃.
At last, comprehensive execution one is etching work procedure 700 for the second time, not only removes silica etch buffer layers 208, and etched pattern silicon layer 202a, makes patterning silicon layer 202a be reduced to a set thickness, please refer to Fig. 2 F.Because the anti-etching ability of the etchant of 208 pairs of the silica etch buffer layers described second time of etching work procedure 700 is good, and an etching resistance can be provided equably, makes the etch-rate uniformity of entire substrate, the thickness of the silicon layer of minimizing case equably 202a.According to the present invention, the main purpose of etching work procedure 700 is to make patterning silicon layer 202a to have a uniform set thickness for the second time.Etching work procedure 700 employed etchants essential energy etching silicon and silica comprise Cl for the second time
2, SF
6Or HBr.
Though the present invention with preferred embodiment openly as above; but it is not in order to limit scope of the present invention; under the situation that does not break away from the spirit and scope of the present invention; those skilled in the art can do various changes and retouching to it, so protection scope of the present invention should be as the criterion so that claims are determined.
Claims (20)
1. avoid the uneven method of silicon layer etching for one kind, comprising:
One patterning silicon layer is provided;
Be conformally formed an etch buffer layers on above-mentioned patterned silicon laminar surface and sidewall; And
Implement an etching work procedure comprehensively, not only remove above-mentioned etch buffer layers, and the above-mentioned patterning silicon layer of etching, make above-mentioned patterning silicon layer be reduced to a set thickness.
2. the uneven method of silicon layer etching of avoiding as claimed in claim 1, wherein above-mentioned etch buffer layers comprises silica (SiO
2).
3. the uneven method of silicon layer etching of avoiding as claimed in claim 2, wherein above-mentioned etch buffer layers utilize oxidizing process to form.
4. the uneven method of silicon layer etching of avoiding as claimed in claim 1, the employed etchant of wherein above-mentioned etching work procedure comprises Cl
2, SF
6Or HBr.
5. the uneven method of silicon layer etching of avoiding as claimed in claim 1, wherein the thickness of above-mentioned etch buffer layers is roughly 5～20nm.
6. the uneven method of silicon layer etching of avoiding as claimed in claim 1, wherein the thickness of above-mentioned silicon layer is roughly 120～250nm.
7. avoid the uneven method of silicon layer etching for one kind, comprising:
One silicon layer is provided;
Form one and have the part surface of the mask layer of predetermined pattern in above-mentioned silicon layer;
For covering, above-mentioned silicon layer is implemented an etching work procedure for the first time, with above-mentioned mask layer to form a patterning silicon layer;
Remove the aforementioned mask layer;
Be conformally formed an etch buffer layers on above-mentioned patterned silicon laminar surface and sidewall; And
Implement an etching work procedure for the second time comprehensively, not only remove the above-mentioned patterning silicon layer of above-mentioned etch buffer layers and etching, make above-mentioned patterning silicon layer be reduced to a set thickness.
8. the uneven method of silicon layer etching of avoiding as claimed in claim 7, wherein the aforementioned mask layer is the photoresist layer.
9. the uneven method of silicon layer etching of avoiding as claimed in claim 7, wherein above-mentioned etch buffer layers comprises silica.
10. the uneven method of silicon layer etching of avoiding as claimed in claim 9, wherein above-mentioned etch buffer layers utilize oxidizing process to form.
11. the uneven method of silicon layer etching of avoiding as claimed in claim 7, the employed etchant of the wherein above-mentioned etching work procedure second time comprises Cl
2, SF
6Or HBr.
12. the uneven method of silicon layer etching of avoiding as claimed in claim 7, wherein the thickness of above-mentioned etch buffer layers is roughly 5～20nm.
13. the uneven method of silicon layer etching of avoiding as claimed in claim 7, wherein the thickness of above-mentioned silicon layer is roughly 120～250nm.
14. avoid the uneven method of silicon layer etching, comprising for one kind:
One silicon layer is provided;
Form one and have the part surface of the mask layer of predetermined pattern in above-mentioned silicon layer;
For covering, above-mentioned silicon layer is implemented an etching work procedure for the first time, with above-mentioned mask layer to form a patterning silicon layer;
Remove the aforementioned mask layer;
Above-mentioned patterned silicon laminar surface is implemented an oxygen-containing gas treatment process, to be conformally formed one deck silicon oxide layer on above-mentioned patterned silicon laminar surface and sidewall; And
Implement an etching work procedure for the second time comprehensively, not only remove said silicon oxide, and the above-mentioned patterning silicon layer of etching, make above-mentioned patterning silicon layer have a set thickness.
15. the uneven method of silicon layer etching of avoiding as claimed in claim 14, wherein the aforementioned mask layer is the photoresist layer.
16. the uneven method of silicon layer etching of avoiding as claimed in claim 14, the employed etchant of the wherein above-mentioned etching work procedure second time comprises Cl
2, SF
6Or HBr.
17. the uneven method of silicon layer etching of avoiding as claimed in claim 14, wherein the thickness of said silicon oxide is roughly 5～20nm.
18. the uneven method of silicon layer etching of avoiding as claimed in claim 14, wherein the thickness of above-mentioned silicon layer is roughly 120～250nm.
19. the uneven method of silicon layer etching of avoiding as claimed in claim 14, the employed gas of wherein above-mentioned oxygen-containing gas treatment process are roughly 90%～99% oxygen and 10～1% etchant of etching work procedure for the second time.
20. the uneven method of silicon layer etching of avoiding as claimed in claim 13, the temperature of wherein above-mentioned oxygen-containing gas treatment process is roughly 30～50 ℃.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02157812 CN1249787C (en) | 2002-12-19 | 2002-12-19 | Method for avoiding silicon layer etching nonuniform |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02157812 CN1249787C (en) | 2002-12-19 | 2002-12-19 | Method for avoiding silicon layer etching nonuniform |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1508851A true CN1508851A (en) | 2004-06-30 |
| CN1249787C CN1249787C (en) | 2006-04-05 |
Family
ID=34236716
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02157812 Expired - Fee Related CN1249787C (en) | 2002-12-19 | 2002-12-19 | Method for avoiding silicon layer etching nonuniform |
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|---|---|
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100373658C (en) * | 2004-07-09 | 2008-03-05 | 友达光电股份有限公司 | Method for manufacturing electroluminescent display |
| CN101069264B (en) * | 2004-12-01 | 2017-05-10 | 应用材料公司 | Selective epitaxy technique with alternating gas supply |
| CN109273358A (en) * | 2018-08-31 | 2019-01-25 | 上海华力集成电路制造有限公司 | The side wall lithographic method of wafer |
-
2002
- 2002-12-19 CN CN 02157812 patent/CN1249787C/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100373658C (en) * | 2004-07-09 | 2008-03-05 | 友达光电股份有限公司 | Method for manufacturing electroluminescent display |
| CN101069264B (en) * | 2004-12-01 | 2017-05-10 | 应用材料公司 | Selective epitaxy technique with alternating gas supply |
| CN109273358A (en) * | 2018-08-31 | 2019-01-25 | 上海华力集成电路制造有限公司 | The side wall lithographic method of wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1249787C (en) | 2006-04-05 |
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