CN1508851A - Method for avoiding non-uniform etching of silicon layer - Google Patents

Abstract

The invention discloses a method for avoiding uneven etching of a silicon layer. By using an etching buffer layer with good etching resistance, an etching resistance is uniformly provided on the surface and the side wall of the silicon layer, so that the etching rate of the whole substrate is uniform, and the silicon layer with uniform thickness can be obtained. First, a silicon layer is provided. Then, a mask layer with a predetermined pattern is formed on a portion of the surface of the silicon layer. Then, using the mask layer as a mask, a first etching process is performed on the silicon layer to form a patterned silicon layer. Then, the mask layer is removed. Then, a silicon oxide layer is conformally formed on the surface and the side wall of the patterned substrate. Finally, a second etching process is performed globally to not only remove the silicon oxide layer but also etch the patterned silicon layer to make the patterned silicon layer have a predetermined thickness.

Description

Method for Avoiding Uneven Etching of Silicon Layer

technical field

The invention relates to a method for etching a silicon layer, and in particular to a method for avoiding uneven etching of the silicon layer.

Background technique

Silicon material is currently the most commonly used semiconductor material. Since the first semiconductor IC (Integrated Circuit) came out in 1956, silicon has been ubiquitous in our lives for many years. ICs are used in memory, microprocessors, screen controllers, and power supplies in various types of computers, as do various electronic products such as mobile phones, computers, video game consoles, and microwave ovens. . Not only that, the increasingly vigorous thin film transistor liquid crystal display (thin film transistor liquid crystal display; TFT LCD) must also rely on silicon to play its role.

At present, various electronic components are usually produced through a series of cleaning, deposition, photolithography, etching, etc. processes. However, when silicon is etched, there is often a problem of non-uniform thickness. Since the main composition of commonly used silicon etchant is HCX, X refers to halogen elements, such as: fluorine (F), chlorine (Cl), bromine (Br)...etc. When silicon is subjected to the first _etching process _{140 for} patterning, as shown in _{FIG .} Cl _z residue 106 has excellent chemical stability. Therefore, please refer to _FIG . 1B again. When the photoresist 104 is removed and the patterned silicon layer 102a is further used for a second etching process 150 to reduce the thickness, _{the SixOyClz residue} 106 is as Like a hard mask, it will prevent the sidewall of the patterned silicon layer 102a from being etched, so that the thickness of the patterned silicon layer 102a cannot be uniformly reduced, and the sidewall of the patterned silicon layer 102a is thicker and Thin uneven profile on top.

Therefore, in order to solve the above problems, the main purpose of the present invention is to provide a method for avoiding uneven etching of silicon layers, which is applicable to the etching of various silicon layers.

Contents of the invention

The object of the present invention is to provide a method for avoiding uneven etching of the silicon layer, which can uniformly etch the silicon layer to a predetermined thickness.

The main feature of the present invention is to conformally form an etching buffer layer (such as silicon oxide) with good etching resistance on the surface and sidewall of the silicon layer to uniformly provide an etching resistance and make the etching rate of the entire substrate uniform Consistent, can uniformly reduce the thickness of the silicon layer. Also, the etching buffer layer can be obtained by subjecting the entire substrate to an oxygen-containing gas treatment process.

In order to achieve the above-mentioned purpose, the present invention proposes a method for avoiding silicon layer etching unevenness, the steps of this method mainly include:

First, a silicon layer is provided. Next, a mask layer with a predetermined pattern is formed on part of the surface of the silicon layer. Then, using the mask layer as a mask, a first etching process is performed on the silicon layer to form a patterned silicon layer. Then, the above-mentioned mask layer is removed. Then conformally form an etching buffer layer on the surface and sidewall of the patterned silicon layer. Finally, a second etching process is performed comprehensively, not only removing the above etching buffer layer, but also etching the above patterned silicon layer to reduce the above patterned silicon layer to a predetermined thickness.

According to the present invention, the main purpose of the first etching step is to define the pattern of the silicon layer. The etchant used in the first etching step includes HCX, where X refers to halogen elements such as fluorine (F), chlorine (Cl), bromine (Br) . . . and the like.

According to the present invention, the main purpose of the second etching process is to make the patterned silicon layer have a uniform specific thickness. The etchant used in the second etching step includes Cl ₂ , SF ₆ or HBr.

As mentioned above, the mask layer can be a photoresist layer. Moreover, the material of the etching buffer layer includes silicon oxide, which is formed by performing an oxygen-containing gas treatment process to perform an oxidation method. The thickness of the above-mentioned etching buffer layer is generally 5-20 nm. In addition, the thickness of the silicon layer is generally 120-250 nm. The above-mentioned oxygen-containing gas is generally 90%-99% oxygen and 10-1% etchant for the second etching process, and its implementation temperature is about 30-50°C.

Description of drawings

In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the preferred embodiments are specifically cited below, and in conjunction with the accompanying drawings, the detailed description is as follows, in the figure:

FIG. 1A and FIG. 1B are schematic diagrams showing the problem of uneven etching thickness encountered in conventional silicon etching; and

2A to 2F show process cross-sectional views of a preferred embodiment of the silicon etching method according to the present invention.

The reference signs in the accompanying drawings are explained as follows:

100, 200 Substrate 102a Silicon layer

104 Photoresist 106, 206 _Six O _y Cl _z residue

140 The first etching process 150 The second etching process

202 Silicon layer 204 Patterned photoresist layer

500 First etching process 202a Patterned silicon layer

600 Oxygen-containing gas treatment process 208 Silicon oxide etching buffer layer

700 Second etching process

Detailed ways

A preferred embodiment of the silicon layer etching method according to the present invention will be described below with reference to FIGS. 2A to 2F .

First, referring to FIG. 2A , a silicon layer 202 is firstly provided with a thickness of about 120-250 nm. The silicon layer 202 may be applied to a substrate of a semiconductor or an active layer of a thin film transistor (thin film transistor; TFT), or even any field in which silicon materials may be applied, which is not limited here, and the silicon layer 202 It can be arranged on any possible surface of the substrate 200 as required.

Next, referring to FIG. 2B , a mask layer is first formed on the surface of the silicon layer 202 on a part of the surface of the silicon layer 202, for example, a photoresist layer (photoresist layer) is formed by spin coating as a mask. layer. The mask layer is then patterned, for example, by using a suitable photolithography process to pattern the photoresist layer to form a patterned photoresist layer 204 .

Next, referring to FIG. 2C , using the patterned photoresist layer 204 as a mask, a first etching process 500 is performed on the silicon layer 202 to form a patterned silicon layer 202 a. The main purpose of the first etching process 500 is to define the pattern of the silicon layer 202, and its etchant includes HCX, where X refers to halogen elements, such as fluorine (F), chlorine (Cl), bromine (Br)...etc. , while etching silicon with these etchant containing halogen elements, there will often be silicon oxidation residues containing halogen elements. Among them, taking the etchant containing chlorine element as an example, it is easy to have Six _{O y} Cl _z The residue 206 is formed on the sidewall of the patterned silicon layer 202a, and _{the SixOyClz} residue 206 is very stable. When the patterned silicon layer 202a _is to be further used in a second etching process to reduce the thickness, Si _{The x} O _y Cl _z residue 206 acts as a hard mask to prevent the sidewalls of the patterned silicon layer 202 a from being etched, so that the thickness of the patterned silicon layer 202 a cannot be uniformly reduced.

Next, the patterned photoresist layer 204 may be removed using a suitable solution, as shown in FIG. 2D .

Next, this step is the main feature of the present invention. Before performing a second silicon thickness etching, an oxygen-containing gas treatment process 600 can be performed inside the etching chamber, as shown in FIG. 2D . Referring again to FIG. 2E , a silicon oxide layer 208 is conformally formed on the surface and sidewalls of the patterned silicon layer 202 a to serve as an etching buffer layer. The silicon oxide etching buffer layer 208 has good etching resistance to the etchant used in the subsequent second etching process, and is a difficult-to-etch material with a thickness of about 5-20 nm. The oxygen-containing gas may include 90%-99% oxygen and 10-1% etchant for the second etching process, and the temperature thereof is, for example, 30-50°C.

Finally, a second etching process 700 is performed comprehensively, not only removing the silicon oxide etching buffer layer 208, but also etching the patterned silicon layer 202a to reduce the patterned silicon layer 202a to a predetermined thickness, please refer to FIG. 2F. Because the silicon oxide etching buffer layer 208 has good etching resistance to the etchant of the second etching process 700, it can evenly provide an etching resistance, so that the etching rate of the entire substrate is uniform, and the silicon oxide can be uniformly reduced. The thickness of layer 202a. According to the present invention, the main purpose of the second etching process 700 is to make the patterned silicon layer 202a have a uniform predetermined thickness. The etchant used in the second etching process 700 must be able to etch silicon and silicon oxide, including Cl ₂ , SF ₆ or HBr.

Although the present invention is disclosed above with preferred embodiments, it is not intended to limit the scope of the present invention. Those skilled in the art can make various changes and modifications to it without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection of the invention should be determined by the appended claims.

Claims (20)

1. A method for avoiding silicon layer etching unevenness, comprising: providing a patterned silicon layer; Conformally forming an etch buffer layer on the surface and sidewalls of the patterned silicon layer; and An etching process is performed comprehensively to not only remove the etching buffer layer but also etch the patterned silicon layer to reduce the patterned silicon layer to a predetermined thickness. 2. The method for avoiding uneven etching of a silicon layer as claimed in claim 1, wherein the etching buffer layer comprises silicon oxide (SiO ₂ ). 3. The method for avoiding uneven etching of a silicon layer as claimed in claim 2, wherein the etching buffer layer is formed by an oxidation method. 4. The method for avoiding uneven etching of a silicon layer as claimed in claim 1, wherein the etchant used in the etching step comprises Cl ₂ , SF ₆ or HBr. 5. The method for avoiding uneven etching of a silicon layer as claimed in claim 1, wherein the thickness of the above-mentioned etching buffer layer is approximately 5-20 nm. 6. The method for avoiding uneven etching of a silicon layer as claimed in claim 1, wherein the thickness of the silicon layer is approximately 120-250 nm. 7. A method for avoiding uneven silicon layer etching, comprising: providing a silicon layer; forming a mask layer with a predetermined pattern on part of the surface of the silicon layer; Using the mask layer as a shield, perform a first etching process on the silicon layer to form a patterned silicon layer; removing the mask layer; Conformally forming an etch buffer layer on the surface and sidewalls of the patterned silicon layer; and A second etching process is performed comprehensively, not only removing the above etching buffer layer but also etching the above patterned silicon layer, so that the above patterned silicon layer is reduced to a predetermined thickness. 8. The method for avoiding uneven etching of a silicon layer as claimed in claim 7, wherein the mask layer is a photoresist layer. 9. The method for avoiding uneven etching of a silicon layer as claimed in claim 7, wherein the etching buffer layer comprises silicon oxide. 10. The method for avoiding uneven etching of a silicon layer as claimed in claim 9, wherein the etching buffer layer is formed by an oxidation method. 11. The method for avoiding uneven etching of a silicon layer as claimed in claim 7, wherein the etchant used in the second etching step comprises Cl ₂ , SF ₆ or HBr. 12. The method for avoiding uneven etching of a silicon layer as claimed in claim 7, wherein the thickness of the etching buffer layer is approximately 5-20 nm. 13. The method for avoiding uneven etching of a silicon layer as claimed in claim 7, wherein the thickness of the silicon layer is approximately 120-250 nm. 14. A method for avoiding uneven etching of a silicon layer, comprising: providing a silicon layer; forming a mask layer with a predetermined pattern on part of the surface of the silicon layer; Using the mask layer as a shield, perform a first etching process on the silicon layer to form a patterned silicon layer; removing the mask layer; performing an oxygen-containing gas treatment process on the surface of the patterned silicon layer to conformally form a silicon oxide layer on the surface and sidewalls of the patterned silicon layer; and A second etching process is performed comprehensively to not only remove the silicon oxide layer but also etch the patterned silicon layer so that the patterned silicon layer has a predetermined thickness. 15. The method for avoiding uneven etching of a silicon layer as claimed in claim 14, wherein the mask layer is a photoresist layer. 16. The method for avoiding uneven etching of a silicon layer as claimed in claim 14, wherein the etchant used in the second etching step comprises Cl ₂ , SF ₆ or HBr. 17. The method for avoiding uneven etching of a silicon layer as claimed in claim 14, wherein the thickness of the silicon oxide layer is approximately 5-20 nm. 18. The method for avoiding uneven etching of a silicon layer as claimed in claim 14, wherein the thickness of the silicon layer is approximately 120-250 nm. 19. The method for avoiding uneven etching of a silicon layer as claimed in claim 14, wherein the gas used in the above-mentioned oxygen-containing gas treatment step is substantially 90%-99% oxygen and 10-1% etchant for the second etching step . 20. The method for avoiding uneven etching of a silicon layer as claimed in claim 13, wherein the temperature of the oxygen-containing gas treatment step is approximately 30-50°C.

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