CN1505282A - Forward error correction encoder - Google Patents

Forward error correction encoder Download PDF

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Publication number
CN1505282A
CN1505282A CNA021508623A CN02150862A CN1505282A CN 1505282 A CN1505282 A CN 1505282A CN A021508623 A CNA021508623 A CN A021508623A CN 02150862 A CN02150862 A CN 02150862A CN 1505282 A CN1505282 A CN 1505282A
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CN
China
Prior art keywords
coding module
error correction
coding
data
forward error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA021508623A
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Chinese (zh)
Inventor
玲 梅
梅玲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHANGHAI YEXIN TRADING CO Ltd
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SHANGHAI YEXIN TRADING CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHANGHAI YEXIN TRADING CO Ltd filed Critical SHANGHAI YEXIN TRADING CO Ltd
Priority to CNA021508623A priority Critical patent/CN1505282A/en
Publication of CN1505282A publication Critical patent/CN1505282A/en
Pending legal-status Critical Current

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  • Optical Communication System (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

The invention is a forward error correction encoder, composed of a scrambling encoding module and a RS encoding module. Its character: the two modules are interlinked, data are sent out after two-stage coding and code-model adjusting. It can make system add network substation on the power limitation and can increase signal transmission distance on the noise limitation.

Description

Forward error correction coder
Technical field:
The present invention relates to a kind of encoder, particularly a kind of forward error correction coder.
Background technology:
In the prior art, the coding that the ether optical access network is adopted can't be guaranteed the luminous power of each descending branch well.If just rely on the power that increases optical sender to solve the problems referred to above, not only can increase the cost of system, more can increase chromatic dispersion and nonlinear effect in the optical transmission.
Summary of the invention:
Technical problem to be solved by this invention is: in the prior art, the coding that the ether optical access network is adopted can't be guaranteed the luminous power of each descending branch well.If just rely on the power that increases optical sender to solve the problems referred to above, not only can increase the cost of system, more can increase chromatic dispersion and nonlinear effect in the optical transmission.The present invention provides a kind of forward error correction coder for the technical scheme that above-mentioned technical problem adopted that solves in the prior art, described this forward error correction coder is made of scrambler coding module and RS coding module, it is characterized in that described RS coding module outside is connected with a data buffer, described RS coding module links to each other with described scrambler coding module, described data buffer receives the outside data that send, and send data to described RS coding module, described RS coding module carries out the RS coding to the data that receive, and further data are sent to described scrambler coding module, described scrambler coding module carries out 8B10B sign indicating number coding to the data that receive, send to the outside after the adjustment of signal process sign indicating number type, concrete, described scrambler coding module outside is connected with synchronization module, described RS coding module adopts RS (255,239) coding, described scrambler coding module adopts seven grades of scramblers.
The present invention and prior art contrast, and effect is positive and tangible.Forward error correction coder of the present invention can make system increase light along separate routes under the limited situation of luminous power, and can increase signal transmission distance under the limited situation of Mode Partition Noise.
Description of drawings:
Fig. 1 is the high-level schematic functional block diagram of a preferred embodiment of forward error correction coder of the present invention.
Embodiment:
As shown in Figure 1, a kind of forward error correction coder of the present invention is made of scrambler coding module 1 and RS coding module 2, it is characterized in that described RS coding module 2 outsides are connected with a data buffer 3, described RS coding module 2 links to each other with described scrambler coding module 1, described data buffer 3 receives the outside data that send, and send data to described RS coding module 2,2 pairs of data that receive of described RS coding module are carried out the RS coding, and further data are sent to described scrambler coding module 1,1 pair of data that receive of described scrambler coding module are carried out 8B10B sign indicating number coding, send to the outside after the adjustment of signal process sign indicating number type, concrete, described scrambler coding module 1 outside is connected with synchronization module 4, described RS coding module 1 adopts RS (255,239) coding, described scrambler coding module 1 adopts seven grades of scramblers.Forward error correction coder of the present invention is applied to optical access network can make system increase light along separate routes under the limited situation of luminous power, and can increase signal transmission distance under the limited situation of Mode Partition Noise.

Claims (4)

1, a kind of forward error correction coder, constitute by scrambler coding module and RS coding module, it is characterized in that: described RS coding module outside is connected with a data buffer, described RS coding module links to each other with described scrambler coding module, described data buffer receives the outside data that send, and send data to described RS coding module, described RS coding module carries out the RS coding to the data that receive, and further data are sent to described scrambler coding module, described scrambler coding module carries out 8B10B sign indicating number coding to the data that receive, and sends to the outside after the adjustment of signal process sign indicating number type.
2, forward error correction coder as claimed in claim 1 is characterized in that: described scrambler coding module outside is connected with synchronization module.
3, forward error correction coder as claimed in claim 1 is characterized in that: described RS coding module adopts RS (255,239) coding.
4, forward error correction coder as claimed in claim 1 is characterized in that: described scrambler coding module adopts seven grades of scramblers.
CNA021508623A 2002-11-29 2002-11-29 Forward error correction encoder Pending CN1505282A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNA021508623A CN1505282A (en) 2002-11-29 2002-11-29 Forward error correction encoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNA021508623A CN1505282A (en) 2002-11-29 2002-11-29 Forward error correction encoder

Publications (1)

Publication Number Publication Date
CN1505282A true CN1505282A (en) 2004-06-16

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CNA021508623A Pending CN1505282A (en) 2002-11-29 2002-11-29 Forward error correction encoder

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CN (1) CN1505282A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100367695C (en) * 2004-11-09 2008-02-06 威盛电子股份有限公司 Data receiving system of PCI express device
CN1767396B (en) * 2004-10-29 2011-11-23 阿尔特拉公司 Programmable logic device, receiver circuit and transmitter circuit
CN103929209A (en) * 2014-04-09 2014-07-16 西安电子科技大学 High-performance combined RS processor based on FPGA
WO2024088024A1 (en) * 2022-10-26 2024-05-02 Huawei Technologies Co., Ltd. Zipper code framework-based communication systems and methods

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1767396B (en) * 2004-10-29 2011-11-23 阿尔特拉公司 Programmable logic device, receiver circuit and transmitter circuit
CN100367695C (en) * 2004-11-09 2008-02-06 威盛电子股份有限公司 Data receiving system of PCI express device
CN103929209A (en) * 2014-04-09 2014-07-16 西安电子科技大学 High-performance combined RS processor based on FPGA
WO2024088024A1 (en) * 2022-10-26 2024-05-02 Huawei Technologies Co., Ltd. Zipper code framework-based communication systems and methods

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