CN1485923A - Dynamic RAM module possessing switchover circuit - Google Patents
Dynamic RAM module possessing switchover circuit Download PDFInfo
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- CN1485923A CN1485923A CNA031540252A CN03154025A CN1485923A CN 1485923 A CN1485923 A CN 1485923A CN A031540252 A CNA031540252 A CN A031540252A CN 03154025 A CN03154025 A CN 03154025A CN 1485923 A CN1485923 A CN 1485923A
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- random access
- dynamic random
- access memory
- module
- memory module
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Abstract
The invention refers to a DRAM transferring device, especially a DRAM module with the transferring circuit. When the specification of the DRAM is different from the slot specification of the computer main board, it sets a transferring circuit on the DRAM module to make the pins of DRAM module accord with the specification of the computer main board.
Description
Technical field
The present invention relates to a kind of switching device of dynamic random access memory, particularly a kind of dynamic random access memory module with built-up circuit, at the built-up circuit of dynamic random access memory module, the dynamic random access memory of different size is converted to the specification of computer main frame panel.
Background technology
With existing general computer system architecture, see also Fig. 1 located by prior art inside computer system configuration diagram, as shown in the figure, motherboard 100 in the computer system architecture includes the CPU 11 of handling the various kinds information data computing of overall calculation machine system, CPU 11 is connected with system storage 13 and other are peripheral by north bridge chips 12, and first system bus 101 of CPU 11 and north bridge chips 12 is referred to as front end system bus (front side bus), being provided with Memory Controller in the north bridge chips 12 is connected with second system bus 102 with system storage 13, existing mostly with 64 Double Date Rate (Double Data Rate, DDR) bus connects, system storage 13 is promptly with Double Date Rate Synchronous Dynamic Random Access Memory module (Double Data Rate-SynchronousDRAM, DDR-SDRAM) implement, this north bridge chips 12 more connects as Accelerated Graphic Port (Accelerated Graphic Port by the various kinds bus, AGP) interface, and north bridge chips 12 more is connected to South Bridge chip 16 by tertiary system system bus 103, computer system promptly connects control each peripheral connectivity port 17 and extended interface by this South Bridge chip 16, as peripheral cell connecting interface bus (Peripheral Component Interconnect, PCI) 18, South Bridge chip 16 more built-in disk system controllers and connect the various disk interface 19 of control, and by 104 connections of various connection winding displacement as Winchester disk drive, storage device such as CD-ROM drive and floppy drive.
North bridge chips 12 shown in above-mentioned Fig. 1 is by second system bus, 102 connection control system memories 13, and the part computer system architecture is arranged at Memory Controller in the CPU 11.These second system bus, 102 existing most Double Date Rate buses with 64 are implemented, and only support Double Date Rate Synchronous Dynamic Random Access Memory module (DDR SDRAM).
See also Fig. 2 located by prior art system storage module hardware schematic diagram, system storage 13 shown in Figure 1 includes the memory module 25 of sheet, in fact also can directly be installed on the motherboard, the memory module 25 of this sheet need be plugged in the slot 23 of a memory bank seat 21, this memory bank seat 21 is arranged on the motherboard, design in order to substitute upgrade-system memory 13, located by prior art is with dual inline memory module (Dual inLine Memory Module, DIMM) implement, this dual inline memory module is several layer printed circuit boards (Printed Circuit Boards that includes RAM chip, PCB), can be described as by two list memory models merging in upright arrangement and form, a dual inline memory module has 64 (bit) access path (Path) to memory (Memory), and 168 pins (pin) are arranged.Memory module 25 is installed several memory chips 201 on it according to actual design, these several memory chip 201 existing Double Date Rate memories with 64 are implemented, so its memory module 25 also is necessary for 64 Double Date Rate memory modules of same size, connect CPU or north bridge chips use by the memory bank seat on the motherboard 21.
Science and Technology Day, crescent was easy, and system storage 13 is because of being responsible for handling the deal with data that stores computer system, so the execution efficient and the speed of the processing speed of system storage 13 decision overall calculation machine system, the continual renovation memory more has its necessity.For faster than existing 64 Double Date Rate memories (DDR) processing speed, designed Double Date Rate memory of new generation, can be described as second generation Double Date Rate memory (DDR II), for new system storage technology, main problem is not at memory itself, but the desired system of memory (CPU and chipset).The cooperation basis that DDR II requires seems and realizes easily that itself guarantees not need support special, non-standard interface, and has improved overall computer system performance.But its memory module (DIMM) will change, and will replace the DDR module of 184 stitch with the DDR II module of 240 stitch.
No matter but be to speed processing speed or increase the design that memory span all need change global storage module 25 and memory chip 201.Because the renewal of system storage is frequent, when buying computer, the consumer must consider the kenel of memory, so the design of the motherboard system storage of compatible different size simultaneously has its necessity, with located by prior art, if need support the system storage 13 (for example plug-in mounting DDR-II memory module on the computer main frame panel of supporting DDR-I) of different size simultaneously, motherboard must increase its complexity and overall routing design with System on Chip/SoC (as north bridge chips) because of the design of various memory is different, more influence the voltage or the loss of signal, and increase the design cost of motherboard.
Summary of the invention
Complicated and the high shortcoming of cost for the design that improves above-mentioned located by prior art, the invention provides a kind of dynamic random access memory module designs connecting wiring on memory module, with the memory of compatible different size, reach and save cost and the convenient purpose that designs.
For reaching above-mentioned purpose, the invention provides a kind of dynamic random access memory module with built-up circuit, make the computer main frame panel that the Different Dynamic RAM chip can compatible different size, can be compatible with the wires design change of new-type memory module and commonly use or existing memory specification, it is incompatible in the problem of same computer system with the multiple memory of solution to make motherboard manufacturer reduce design cost.
This device includes a memory module; Several memory chips are installed on the memory module; One built-up circuit is arranged on the memory module; And several memories connect stitch.Make dynamic random access memory chip be suitable for the memory module of different size by above-described built-up circuit.
Description of drawings
Fig. 1 is a located by prior art inside computer system configuration diagram;
Fig. 2 is a located by prior art system storage module hardware schematic diagram;
Fig. 3 is a system storage module hardware schematic diagram of the present invention;
Fig. 4 is system storage of the present invention and peripheral schematic diagram.
Symbol description among the figure
11 CPU, 12 north bridge chips
13 systems store 16 South Bridge chips
17 connectivity ports
18 peripheral cell connecting interface buses
19 disk interfaces, 100 motherboards
101 first system buss, 102 second system buss
103 tertiary systems system bus 104 connects winding displacement
21 slot holder, 23 slots
25 memory modules, 201 memory chips
30 memory modules, 301 memories connect stitch
41 north bridge chips, 43 slots
45 select pin position 401 buses
Embodiment
Commonly use the problem of compatibility when being applied to 64 Double Date Rate memories (DDR) and memory specification of new generation and replacing for solution, the present invention is by being provided with change-over circuit on memory module, the memory chip of commonly using can be used in by the specification of memory module of new generation on the motherboard of new generation, break the restriction that specific memory only can be used in the motherboard of specific standard.
The invention provides a kind of dynamic random access memory module, on a circuit board, place several dynamic random access memory chips, to form a dynamic random access memory module, the connection stitch that connects the dynamic random access memory module on this circuit board with built-up circuit is by the memory bank on this connection stitch connection computer main frame panel.When the incompatible specification in memory bank of the specification of dynamic random access memory chip, can use this built-up circuit that the pin of dynamic random access memory chip is converted to the specification of memory bank, to reach the dynamic random access memory chip that on the motherboard of first kind of specification, uses second kind of specification.
The invention provides a kind of dynamic random access memory module, on a circuit board, place the double transfer rate dynamic random access memory chips of several first generation (DDR_SDRAM), to form a dynamic random access memory module, the connection stitch that on this module, connects DDR_SDRAM with built-up circuit, the double transfer rate dynamic random access memory of second generation slot by on this connection stitch connection computer main frame panel makes DDR_SDRAM can be used on the computer main frame panel of supporting DDR-II SDRAM specification.
Fig. 3 is a system storage module hardware schematic diagram of the present invention.Convenient with design for the extendibility of computer system, memory module 30 all designs the miniature printed circuit board as sheet, but is not limited to this kind design, also can built-inly be installed on the motherboard.This memory module 30 includes several dynamic random access memory chips 201 and is connected stitch 301 with the memory that several are arranged at memory module 30 1 sides, be familiar with the memory chip 201 that this operator can have different numbers and capacity according to the actual design needs, if need support the memory of different size simultaneously, motherboard can must increase its complexity and overall routing design because of the design of the compatible various memory of need is different with System on Chip/SoC (as north bridge chips), and then the design cost of increase motherboard or System on Chip/SoC, and the present invention can by with the wires design of different size memory on memory module 30, the memory specification that this memory module 30 is supported is different from the specification of above-mentioned memory chip 201.
For instance, if a new generation's system storage second generation Double Date Rate memory (DDR II), reservoir designs manufacturer cost consideration and opportunity angle, the memory chip 201 of existing Double Date Rate memory (DDR) can be installed on the second generation Double Date Rate memory module (module) 30, in other words, Double Date Rate memory chip 201 is used in the computer main frame panel of supporting second generation Double Date Rate memory on, then only need in the memory module 30 of placing Double Date Rate memory chip 201,30 memory connects stitch 301 from memory chip 201 to memory module with a built-up circuit rewiring, makes memory connect stitch 301 and meets second generation Double Date Rate memory specification.But memories such as the data of second generation Double Date Rate memory output Input Address or voltage design connect stitch (pin) 301 certainly will be different with memory existing or that commonly use, the present invention will commonly use to connect up to be connected with memory of new generation and design on memory module 30, the memory chip 201 that is about to commonly use is installed on the memory module 30 of new generation, several built-up circuits 303 of commonly using memory chip 201 and memory module stitch of new generation by connection make memory chip be suitable for the memory module of different size, be and reach the purpose that makes memory module of new generation and commonly use the memory chip compatibility, motherboard and System on Chip/SoC manufacturer only need to go up at a new generation or wherein a kind of reservoir designs in connecting up, and the wiring cost that promptly solves when updated stored device specification is paid the design consideration of supporting different memory with attenuating simultaneously.
See also Fig. 4 system storage of the present invention and peripheral schematic diagram again, if a computer system is at reservoir designs of new generation, north bridge chips 41 needs to support memory specification of new generation on the motherboard of this system, as second generation Double Date Rate memory (DDR II), also need to connect the slot 43 of the second generation DDR specification on the motherboard by the bus 401 of a second generation DDR specification, this second generation DDR slot 43 only need be supported second generation DDR memory module 30, do not need when the memory specification is replaced, to support simultaneously the memory module of several specifications, but for compatible multiple memory specification of while, north bridge chips 41 needs design simultaneously can support multiple memory specification, but because of the switching of different memory specification is all finished on memory module 30, so the wires design on the motherboard then can save the design of many complexity.Memory module 30 as shown in FIG. is provided with several memory chips 201, the memory specification that this memory module 30 is supported for motherboard north bridge chips 41, several memory chips 301 then can be existing or commonly use the memory chip of specification, solve by several built-up circuits 303 shown in Figure 3 that design such as address, voltage or data storing does not cause incompatible problem simultaneously between the memory of different size.
Among Fig. 4, the angle that is connected with north bridge chips 41 in system storage 30, in the system of memory specification of new generation, can to use the existing of different size or commonly use memory in order to reach, on slot 43, use the not selection pin position 45 of effect (enable) of a script, when memory module 30 is plugged slot 43, can select pin position 45 to pass on the memory chip on this memory module 30 403 specifications by this, make north bridge chips 41 after receiving from the information of selecting pin position 45, can this memory module 30 of control connection.
The present invention with above specific embodiment as an illustration, illustrate the Double Date Rate dynamic random access memory chip can be used for second generation Double Date Rate dynamic random access memory module on, and be compatible with the computer main frame panel of second generation Double Date Rate dynamic random access memory specification, but the invention is not restricted to this specific embodiment.Dynamic random access memory chip and dynamic random access memory module can be the specification of the specification that meets the Double Date Rate dynamic random access memory, second generation Double Date Rate dynamic random access memory or the haploidy number specifications according to the transfer rate dynamic random access memory.
In sum, fill part and demonstrate plurality of specifications memory compatible apparatus of the present invention all dark well-off progressive of executing on purpose and effect, have the value of industry, and be present new invention not seen before on the market.
Only the above only is preferred embodiment of the present invention, when can not with the scope implemented of qualification the present invention.Promptly the equalization of being done according to claims scope of the present invention generally changes and modifies, and all should still belong in the scope that patent of the present invention contains.
Claims (12)
1. a dynamic random access memory module is characterized in that, comprises at least:
Several dynamic random access memory chips are installed on this module;
One built-up circuit is arranged on this dynamic random access memory module, and wherein this dynamic random access memory chip meets the first dynamic random access memory specification; And
Several memories connect stitch, be arranged at a side of this module, connect several memories of this dynamic random access memory chip and this by this built-up circuit and be connected stitch, and this dynamic random access memory module meets the second dynamic random access memory specification.
2. dynamic random access memory module as claimed in claim 1, wherein the specification of this first dynamic random access memory specification specification that is the Double Date Rate dynamic random access memory, second generation Double Date Rate dynamic random access memory or haploidy number are according to the specification of transfer rate dynamic random access memory.
3. dynamic random access memory module as claimed in claim 1, wherein the specification of this second dynamic random access memory specification specification that is the Double Date Rate dynamic random access memory, second generation Double Date Rate dynamic random access memory or haploidy number are according to the specification of transfer rate dynamic random access memory.
4. dynamic random access memory module as claimed in claim 1, wherein these several memories connection stitch are arranged on this memory module, meet this second dynamic random access memory specification.
5. dynamic random access memory module as claimed in claim 1, wherein this dynamic random access memory module is placed this dynamic random access memory chip at one several layer printed circuit board (PCB).
6. dynamic random access memory module as claimed in claim 1, wherein this built-up circuit be pin with this dynamic random access memory chip in the rewiring mode, make the stitch of this module accord with this second dynamic random access memory specification of computer main frame panel slot.
7. a computer main frame panel is characterized in that, comprises at least:
One north bridge chips is installed in this computer main frame panel, supports several memory specifications;
One slot is arranged on this computer main frame panel and connects this north bridge chips;
One dynamic random access memory module is plugged in this slot, and wherein this module comprises several memory chips, utilizes a built-up circuit, is connected in the connection stitch of this module, makes this module meet the specification of this slot.
8. computer main frame panel as claimed in claim 7, wherein this dynamic random access memory chip meets the specification of specification, second generation Double Date Rate dynamic random access memory of Double Date Rate dynamic random access memory or the haploidy number specification according to the transfer rate dynamic random access memory.
9. computer main frame panel as claimed in claim 7, wherein this slot meets the specification of specification, second generation Double Date Rate dynamic random access memory of Double Date Rate dynamic random access memory or the haploidy number specification according to the transfer rate dynamic random access memory.
10. computer main frame panel as claimed in claim 7, wherein this dynamic random access memory module is placed this dynamic random access memory chip at one several layer printed circuit board (PCB).
11. computer main frame panel as claimed in claim 7, wherein this built-up circuit be pin with this dynamic random access memory chip in the rewiring mode, make the stitch of this dynamic random access memory module accord with the specification of this computer main frame panel slot.
12. computer main frame panel as claimed in claim 7 wherein when this dynamic random access memory module is plugged in this slot, uses one to select the pin position on this slot, to distinguish the specification of this dynamic random access memory module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA031540252A CN1485923A (en) | 2003-08-14 | 2003-08-14 | Dynamic RAM module possessing switchover circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA031540252A CN1485923A (en) | 2003-08-14 | 2003-08-14 | Dynamic RAM module possessing switchover circuit |
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| Publication Number | Publication Date |
|---|---|
| CN1485923A true CN1485923A (en) | 2004-03-31 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA031540252A Pending CN1485923A (en) | 2003-08-14 | 2003-08-14 | Dynamic RAM module possessing switchover circuit |
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| CN (1) | CN1485923A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103729493A (en) * | 2012-10-12 | 2014-04-16 | 联发科技股份有限公司 | Layout method for printed circuit board |
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2003
- 2003-08-14 CN CNA031540252A patent/CN1485923A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103729493A (en) * | 2012-10-12 | 2014-04-16 | 联发科技股份有限公司 | Layout method for printed circuit board |
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