CN1467862A - Semiconductor device having ohmic contact and method for making the same - Google Patents
Semiconductor device having ohmic contact and method for making the same Download PDFInfo
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- CN1467862A CN1467862A CNA021409439A CN02140943A CN1467862A CN 1467862 A CN1467862 A CN 1467862A CN A021409439 A CNA021409439 A CN A021409439A CN 02140943 A CN02140943 A CN 02140943A CN 1467862 A CN1467862 A CN 1467862A
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Abstract
The invention relates to a semiconductor device possessing Ohm contact and the process for making it. The semiconductor device includes a substrate, a p type gallium nitride layer arranged on the substrate, and a p type gallium and indium nitride layer arranged on the p type gallium nitride layer, for forming a good interface with low Ohm contacting resistance between the semiconductor and the metal electrode. The invention also discloses a light-emitting assembly having the Ohm contact and the process for making it.
Description
Technical field
The present invention relates to a kind of semiconductor device, a p type indium gallium nitride (In particularly is provided with an ohmic contact
xGa
1-xN) layer on p type gallium nitride (GaN) layer forming an excellent interface with low ohm contact resistance, and manufacture method, it can be applicable to aspects such as light-emitting diode, laser diode, microwave components.
Background technology
Be familiar with in this field as us,,, provide a desirable ohmic contact to need the most at the face that the connects place of semi-conductor layer and metal level as optical module (being light-emitting diode, laser diode or microwave components) in order to make semiconductor device.For three, five compound semiconductors, the condition that forms a desirable ohmic contact comprises, level and smooth configuration of surface, good thermostability, simple processing procedure, low contact resistance, high yield and the good tackness produced.Because gallium nitride compound semiconductor such as gallium nitride, aluminum gallium nitride (GaAlN), indium gallium nitride and indium gallium nitride aluminium (InAlGaN) have a direct energy rank band gap, its scope is from 1.95eV to 6eV, therefore, this compounds semiconductor is regarded as being used for the optimal material of luminescence component (as light-emitting diode and laser diode).
One prior art that is used for being formed for the ohmic contact of optical module can be with reference to United States Patent (USP) the 5th, 563, and No. 422, " gallium nitride based three, five compound semiconductor device and method for makings thereof " by name.In above-mentioned this United States Patent (USP), an electrode is coated with a metallic film, and in order to substitute a transparency electrode, because produce in some problem of a n type Ohmic resistance, its characteristic owing to the non-conductor of a transparency electrode or a sapphire substrate causes.Yet, disclose the technology in above-mentioned United States Patent (USP), in the electrode that is coated with a metallic film, be problematic, it can't allow light pass through efficiently.In Material Research Society Symposium Proceeding 449,1061,1997, people such as T.Kim have then reported a specific contact resistance Rc who is formed in nickel/chromium/golden pattern, is used for desirable ohmic contact, 8.3 * 10
-2Ω cm
-2, it heat-treated processing procedure 30 minutes under 500 ℃.At same minutes 449,1093,1197, people such as J.T.Trexler have reported a specific contact resistance Rc who is formed in chromium/golden pattern, is used for desirable ohmic contact, 4.3 * 10
-1Ω cm
-2, it heat-treated processing procedure 15 minutes under 900 ℃.
In the prior art, there have been many reference papers to disclose and have been used for the metallic film of optical module, formed the method for nickel or platinum ohmic contact.Yet, be impossible in a metallic film, form a p type gallium nitride ohmic contact according to the technology in the existing file.
Summary of the invention
As mentioned above, defective ohmic contact that is formed in the metallic film like this, can in the continuous wavelength pattern of gallium nitride light-emitting diode (GaN LEDs) and laser diode (LDs), cause great problem.In order to overcome the problems referred to above, the present inventor studies a kind of ohmic contact energetically, and it is to insert a p type indium gallium nitride layer in three-five family's layers of main composition and the metal electrode with gallium nitride a p type.Structure of the invention described above and method and in nickel/gold or nickel/chromium/golden pattern, form the structure and the method and inequality of a typical p type ohmic contact, so can form one and have low-impedance ohmic contact.
Therefore, in order to solve the shortcoming that produces according to above-mentioned method of the prior art and assembly, the present invention mainly provides a kind of semiconductor device and manufacture method thereof with low ohm contact resistance, wherein, forming a p type indium gallium nitride layer on the p type gallium nitride layer to reduce the ohmic contact resistance between between metal level and p type gallium nitride layer.By on the p of semiconductor device type gallium nitride layer, increasing by a p type indium gallium nitride layer, be positioned at can the rank band-gap energy being reduced effectively and easier quilt is crossed between metal and semiconductor.
The present invention mainly also provides a kind of luminescence component and manufacture method thereof with low ohm contact resistance, wherein, is forming a p type indium gallium nitride layer on the p type gallium nitride layer to reduce the ohmic contact resistance between between metal level and p type gallium nitride layer.By on the p of luminescence component type gallium nitride layer, adding a p type indium gallium nitride layer, then be positioned at can the rank band gap will being reduced effectively and easier quilt is crossed over of metal and semi-conductive.
Therefore, a purpose of the present invention provides the semiconductor device, and it has a p type indium gallium nitride layer and is arranged on the p type gallium nitride layer, and the manufacture method of this semiconductor device.
Another object of the present invention provides a semiconductor device with low-impedance ohmic contact, and preparation method thereof.
Another object of the present invention provides a luminescence component, and it has a p type indium gallium nitride layer and is arranged on the p type gallium nitride layer, and the manufacture method of this luminescence component.
Another object of the present invention provides a luminescence component with low-impedance ohmic contact, and preparation method thereof.
According to above-mentioned purpose, the invention provides the semiconductor device, it comprises at least, and a ground, a p type gallium nitride layer are formed on this ground, a p type indium gallium nitride layer is formed on this p type gallium nitride layer, a metal level is formed on this p type indium gallium nitride layer and manufacture method.
Moreover, the invention provides a luminescence component, it comprises at least, and a ground, a resilient coating are formed on this ground, a n type coating layer is formed on this resilient coating, an active layers is formed on this n type coating layer, a p type coating layer is formed on this active layers, a p type indium gallium nitride layer is formed on this p type coating layer, a metal level is formed on this p type indium gallium nitride layer and manufacture method.
Description of drawings
Figure 1A to Figure 1B is the profile of the p N-type semiconductor N apparatus structure of the traditional prior art of use;
Fig. 2 is a profile of the semiconductor device structure of embodiment 1 among the present invention;
Fig. 3 is a profile of the luminescence component structure of embodiment 2 among the present invention;
Fig. 4 A to Fig. 4 B is the profile of the luminescence component manufacturing process of embodiment 2 among the present invention;
Fig. 5 is the profile of the luminescence component manufacturing process of embodiment 2 among the present invention;
Fig. 6 is the electrical schematic diagram of the bias voltage v.s. electric current of the present invention and traditional p N-type semiconductor N device.
Main symbol description among the figure
5 grounds
10 resilient coatings
The gallium nitride layer of 15 undoped
20 p type gallium nitride layers
25 nickel
30 platinum
35 gold medals
40 alundum (Als (sapphire) layer
The gallium nitride layer of 45 undoped
48 p type gallium nitride layers
50 grounds
60 p type gallium nitride layers
65 p type indium gallium nitride layers
68 gallium nitride semiconductors
70 metal levels
75 grounds
80 aluminium nitride
85 n type gallium nitride coating layers
90 n type aluminum gallium nitride coating layers
95 indium gallium nitride active layers
100 p type aluminum gallium nitride coating layers
105 p type gallium nitride coating layers
110 p type indium gallium nitride layers
113 gallium nitride semiconductors
115 metal levels
120 n type electrodes
Embodiment
Describe the specific embodiment of the present invention in detail below in conjunction with drawings and Examples.
Embodiment 1
As shown in Figure 2, at first, ground 50 (preferable material is alundum (Al, sapphire among the present invention) is loaded in the reactor, and feeds hydrogen (H
2) under about 1050 ℃, about 10 minutes, remove ground 50 is carried out heat.Then, by liquid built polycrystalline growing method, organic metal gas phase building crystal to grow method, molecular beam epitaxy flop-in method or other prior art (for example, using ammonia and trimethyl gallium (TMG, trimethyl gallium) as forerunner's reactive material), the while is also selected CP for use
2Mg (biscyclopentadinel magnesium) or zinc methide (DMZn, dimethylzinc) are as the pre-reaction material that is used for p type alloy, on this ground 50, to form a p type gallium nitride layer 60, its thickness be about 10 how rice be preferably 200 rice how to 2000 rice how.
Then, by feed trimethyl indium (TMI, trimethyl indium), TMG and ammonia to the reactor to form a p type indium gallium nitride layer 65 on this P type gallium nitride layer 60, its thickness be about 5 how rice to 1000 rice how, be preferably 100 rice how, and the most important is that the content of indium is preferably greater than 0.05 percentage by weight in p type indium gallium nitride layer 65.So, form a gallium nitride semiconductor 68.
Then, the formed gallium nitride semiconductor of above-mentioned steps 68 is by multiple cleaning solution: trichloroethylene, acetone, methyl alcohol and distilled water, ultrasonic waves bathe and 50 ℃ under cleaned repeatedly 5 minutes by each solution.Behind cleaning step, this gallium nitride semiconductor 68 was baked range drying 10 minutes firmly via one under 100 ℃, remove aqueous vapor therefrom fully.Under changeing, per second 5500 is coated with photoresist via rotary coating process to this gallium nitride semiconductor 68.Carry out shielding pattern development step before, earlier 85 ℃ under, this gallium nitride semiconductor 68 carried out soft roasting 15 minute thereafter.In order to form a shielding pattern on this gallium nitride semiconductor 68, before being to expose 60 seconds under the ultraviolet ray, a light shield accurately is placed on the gallium nitride semiconductor 68.After the exposure, this gallium nitride semiconductor 68 carries out an oppositely baking under 115 ℃ under ultraviolet ray.Then, form a solution, developed about 40 seconds with the distilled water mixed reagent.
Then, carry out a vapor deposition step to form a metal level 70 on the p of this gallium nitride semiconductor 68 type indium gallium nitride layer 65.In the superincumbent vapor deposition step, nickel, platinum and gold wherein a kind of or their alloy is deposited on the p type indium gallium nitride layer 65 of this gallium nitride semiconductor 68 at least, its thickness is about 200 rice～1000 rice how how.
Embodiment 2
(brilliant process of heap of stone)
As shown in Figure 3, at first, load a ground 75 (preferable material is alundum (Al, sapphire among the present invention) and to a reactor and at 1050 ℃, fed nitrogen about 10 minutes down, in this way the surface of this ground 75 of heat cleaning.
Then, the temperature of this ground 75 is reduced to 600 ℃, and uses ammonia as a nitrogenize precursor, and trimethyl aluminium (TMA, trimethyl aluminium) is as an aluminium precursor.By liquid built polycrystalline growing method, organic metal gas phase building crystal to grow method, molecular beam epitaxy flop-in method or other prior art, above-mentioned material is fed in the reactor and forms an aluminum nitride buffer layer 80 on this ground 75, and its thickness is about 50 rice how.
Then, under about 700～1200 ℃, use ammonia and trimethyl gallium (TMG) as precursor forming a n type gallium nitride coating layer 85, its thickness is about 200 rice how.Simultaneously, methyl silicon (Me-SiH
3, methyl silane) be used precursor as a n type alloy.
Then, add trimethyl aluminium (TMA) to above-mentioned gas, form a n type aluminum gallium nitride layer therefrom, and it is doped with silicon therein.Thus, form the how n type aluminum gallium nitride coating layer 90 of rice of a thickness about 200.
Then, import trimethyl indium (TMI), trimethyl gallium (TMG) and ammonia to the reactor forming an indium gallium nitride active layers 95, how meter its thickness about 20.
Next, use the gas identical, except methyl silicon (Me-SiH), CP with formation n type aluminum gallium nitride coating layer 90
2Mg and zinc methide (DMZn) in addition, to form a p type aluminum gallium nitride coating layer 100.
Then, use and the identical gas of formation n type gallium nitride layer, except methyl silicon (Me-SiH), CP
2Mg and zinc methide (DMZn) in addition, forming a p type gallium nitride layer 105, its thickness about 10 is rice～2000 rice how how, is preferably 400 rice how.
At last, by import trimethyl indium (TMI), trimethyl gallium (TMG) and ammonia to the reactor to form a p type indium gallium nitride layer 110 on this p type gallium nitride layer 105, its thickness is about 5 rice～1000 rice how how, be preferably 100 rice how, and the most important is that the content of indium in p type indium gallium nitride layer 110 is preferably greater than 0.05 percentage by weight.So, form a gallium nitride semiconductor 113 by stacked above-mentioned each layer of mentioning.
(luminescence component processing procedure)
One of part characteristics of the present invention luminescence component forms step will be in hereinafter describing in detail.
Shown in Fig. 4 A, in above-mentioned building crystal to grow process, in order to touch n type electrode, so carry out an etching step.In etching process, form an etch shield by the photolithography method, (Inductively Coupled Plasma ICP) is removed, and by this and partly touches n type gallium nitride coating layer 85 so the unwanted part of p type gallium nitride layer is via an induction coupled plasma etching method.
If n type electrode will be touched in other position, then this process does not just need.After this partly contacts n type gallium nitride coating layer 85, as described in following, carry out first annealing process to reduce resistance.
Whole gallium nitride semiconductor 113 be placed under the nitrogen atmosphere and about 800 ℃ about 20 minutes, activation p type layer wherein to be reducing resistance, it is owing to be entrained in the inconsistent caused of magnesium, zinc and hydrogen in the p type layer.
Shown in Fig. 4 B, then, a metal level 115 is formed on the p type indium gallium nitride floor 110 and introduces the district to cover an electric current.This long and narrow metal level 115 has one 200 rice～2000 width of rice how how.This metal level uses the wherein a kind of of nickel, platinum and gold, and is formed by conventional method, for example methods such as evaporation, sputter and plating.Wherein each all has very big work function (work function).Especially, preferable use one does not have the metal of hydrogen atom infiltration and has excellent electrical property with p type indium gallium nitride layer 110 and contacts.
On the exposed areas of n type gallium nitride coating layer 85, by evaporation thickness about 50 how the carbon of rice and germanium (Ge) and again evaporation thickness about 200 how the gold of rice to form a n type electrode 120.Thus, finish a luminescence component processing procedure.
Shown in Fig. 5, Fig. 6 and table one, we can find in the present invention, contact resistance is reduced to 14K Ω and sheet resistor is reduced to 61K Ω/ from 79K Ω/ from 40K Ω, and therefore, the p type indium gallium nitride layer that is provided at the novelty in the structure of the present invention is really as acting on effectively that we wanted.
Though the above embodiments 2 have double-heterostructure, the present invention also can be applicable to other connected structure, for example pn homogeneous-joint diode, heterostructure and other structure, and can be used for making single carrier transistor, as field-effect transistor, or assemblies such as laser diode and microwave components.
The above is preferred embodiment of the present invention only, is not in order to limit protection scope of the present invention; All other do not break away from the equivalence of being finished under the disclosed spirit and changes or modification, all should be included in the scope of claims.
| P type indium gallium nitride layer | P type gallium nitride layer |
| Contact resistance: 14K Ω | Contact resistance: 40K Ω |
| Sheet resistor: 61K Ω/ | Sheet resistor: 79K Ω/ |
| Energy gap: 3eV (x～15%) | Energy gap: 3.4eV |
Table one
* table one is the measurement result of Fig. 5
Claims (7)
1. the semiconductor device with an ohmic contact is characterized in that, comprises at least:
One ground;
One p type gallium nitride layer (GaN) is on this ground;
One p type indium gallium nitride (In
xGa
1-xN) layer, on this p type gallium nitride layer, 0＜x＜1 wherein; And
One metal level is on this p type indium gallium nitride layer.
2. semiconductor device as claimed in claim 1 is characterized in that, this ground comprises an alundum (Al (sapphire) layer at least.
3. semiconductor device as claimed in claim 1 is characterized in that, this p type gallium nitride layer is Al
xGa
yIn
zN, and 0≤x, y, z≤1, x+y+z=1.
4. semiconductor device as claimed in claim 3 is characterized in that, the thickness of this p type gallium nitride layer be 10 how rice to 2000 rice how.
5. semiconductor device as claimed in claim 1 is characterized in that, the thickness of this p type indium gallium nitride layer be 5 how rice to 1000 rice how.
6. semiconductor device as claimed in claim 1 is characterized in that, this metal level is selected from a kind of of following each material at least: nickel, platinum, palladium and gold.
7. semiconductor device as claimed in claim 1 is characterized in that, more includes a transparent electrode layer, and it is formed on this p type indium gallium nitride layer.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA021409439A CN1467862A (en) | 2002-07-10 | 2002-07-10 | Semiconductor device having ohmic contact and method for making the same |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA021409439A CN1467862A (en) | 2002-07-10 | 2002-07-10 | Semiconductor device having ohmic contact and method for making the same |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007076730A1 (en) * | 2006-01-06 | 2007-07-12 | Dalian Luming Science & Technology Group Co., Ltd. | GaN-BASED OPTOELECTRONIC DEVICE AND METHOD OF MANUFACTURE THE SAME |
| CN100530544C (en) * | 2004-01-22 | 2009-08-19 | 克里公司 | Method for preparing high power element in wide band gap material |
| CN106057663A (en) * | 2016-06-29 | 2016-10-26 | 北京华进创威电子有限公司 | Method for chemical passivation of surface of GaSb single crystal substrate |
-
2002
- 2002-07-10 CN CNA021409439A patent/CN1467862A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100530544C (en) * | 2004-01-22 | 2009-08-19 | 克里公司 | Method for preparing high power element in wide band gap material |
| US7579626B2 (en) | 2004-01-22 | 2009-08-25 | Cree, Inc. | Silicon carbide layer on diamond substrate for supporting group III nitride heterostructure device |
| US7863624B2 (en) | 2004-01-22 | 2011-01-04 | Cree, Inc. | Silicon carbide on diamond substrates and related devices and methods |
| US8513672B2 (en) | 2004-01-22 | 2013-08-20 | Cree, Inc. | Wafer precursor prepared for group III nitride epitaxial growth on a composite substrate having diamond and silicon carbide layers, and semiconductor laser formed thereon |
| US9142617B2 (en) | 2004-01-22 | 2015-09-22 | Cree, Inc. | Wide bandgap device having a buffer layer disposed over a diamond substrate |
| WO2007076730A1 (en) * | 2006-01-06 | 2007-07-12 | Dalian Luming Science & Technology Group Co., Ltd. | GaN-BASED OPTOELECTRONIC DEVICE AND METHOD OF MANUFACTURE THE SAME |
| CN106057663A (en) * | 2016-06-29 | 2016-10-26 | 北京华进创威电子有限公司 | Method for chemical passivation of surface of GaSb single crystal substrate |
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