CN1462910A - Method fo baking photoresistive in multistage in order to improve photoetching quality - Google Patents
Method fo baking photoresistive in multistage in order to improve photoetching quality Download PDFInfo
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- CN1462910A CN1462910A CN 02121962 CN02121962A CN1462910A CN 1462910 A CN1462910 A CN 1462910A CN 02121962 CN02121962 CN 02121962 CN 02121962 A CN02121962 A CN 02121962A CN 1462910 A CN1462910 A CN 1462910A
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- photoresistance
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Abstract
A process for baking photoresist several times to improve photoetch quality includes coating photoresist on wafer, baking exposing, multi-stage baking, developing and baking. It can obtain optimal outline of photoresist.
Description
Technical field
The present invention relates to a kind of method, the particularly method of improving relevant for a kind of photoetching quality of multistage baking photoresistance.
Background technology
General in the manufacture process of wafer, use photoetching process that required integrated circuit patterns is passed on the wafer usually.And the overall optical carving technology comprises that photoresistance covers (Coating), exposure (Exposure) and (Development) the three big technologies of developing.Wherein in order to remove solvent in the photoresistance, making increases tack and etching resistance, also comprises soft roasting (Soft Bake) and hard roasting steps such as (Hard Bake) in the technology.Wherein, soft roasting or be called its baking before for exposure of preceding baking (Pre-bake), be to be used for step that the photoresist layer solvent on the chip is removed from photoresistance, make photoresistance by original liquid state, after soft baking, and become solid-state film, and make photoresist layer strengthen to the adhesive ability of chip surface, so that follow-up technology.And photoresistance is through development step, be sent to next technology finishing photoetching process before, must be through one baking procedure, with further with in the photoresistance residual solvent, drop to minimum by evaporation.This step is called back baking (Post-Bake), also is called hard roasting or postdevelopment bake.And, after exposure is finished, usually add a postexposure bake (Post-exposure Bake in order further to improve the tack of photoresistance; PEB) technology also is called for the second time soft roasting.General baking can use the heat conduction method of the hot-air convection of baking box, ultrared radiation or hot backing plate (Hot Plate) to carry out, and wherein, hot backing plate is normal method of using.
In Fig. 1, shown in the figure schematic flow sheet that existing photoresistance toasts, be baking 110 before the exposure, photoresistance exposure 115, postexposure bake 120, photoresistance development 125 and postdevelopment bake 130 in regular turn.And use hot backing plate heated chip, thus the source that is heated of photoresistance, be to accept the thermal source that hot backing plate transmits from wafer, therefore inner solvent will be accepted to be high heat energy than the surface, leave photoresistance to become to making inner solvent toward surperficial moving.
But after photoresistance is finished design transfer, and finish after the next semiconductor technology, for example ion injects (Ion Implant) technology, dry-etching or the like, but always when process inspection, find the bad situation of element testing electrical property, the bad generation that often forms the problem component of a batch of this kind, it forms great obstacle to the technology yield.Therefore how to improve the bad main cause of testing electrical property, more therefore improve the yield of technology, be the ardent hope of semiconductor production manufacturer.
Summary of the invention
In above-mentioned background of invention, when photoresistance is finished design transfer, and finish as after ion injection (Ion Implant) technology or the dry etch process, but when electrically checking, find the bad situation of element test, often form the bad problem generation of property in batches, the technology yield is formed great influence.
One of purpose of the present invention is the photoresistance baking that utilizes a multistage property, to improve the method for photoetching quality and increase yield.
Another object of the present invention is the photoresistance baking that utilizes a multistage property, the process margin when toasting to increase photoresistance.
According to above-described purpose, the invention provides a kind of multistage baking photoresistance to improve the method for photoetching quality, comprise and be coated with photoresistance earlier on wafer, baking photoresistance before exposing again, exposing patterns is on photoresistance then, carry out multistage segmentation baking photoresistance again, the baking photoresistance after development photoresistance and the development.
It is applied after on the wafer that the present invention also can be used in photoresistance, promptly photoresistance carried out multistage segmentation baking, makes photoresistance progressively reach predetermined hardenability, and then carry out the exposure technology of the photoresistance on the wafer.
The present invention more can be used in after photoresistance is developed, and again photoresistance is carried out multistage segmentation baking, make photoresistance progressively reach required hardenability after, to carry out the photoresistance etching.
Wherein above-mentioned multistage segmentation baking photoresistance comprises three stage baking photoresistances, and the mode that also can be continuous intensification baking photoresistance is carried out.
Multistage baking photoresistance therefore of the present invention is to improve the method for photoetching quality, utilize multistage mode in technology, photoresistance to be carried out repeatedly baking, or use a mode that heats up continuously that photoresistance is toasted, not only can not increase the demand of energy and can improve the nargin of baking, the more important thing is and to produce preferable photoresistance profile, the yield of technology is significantly promoted, provide important improvement semiconductor technology.
Description of drawings
Preferred embodiment of the present invention will be aided with following figure and do more detailed elaboration in following comment, wherein:
Fig. 1 is the schematic flow sheet of existing photoresistance baking;
Fig. 2 A is existing photoresistance baking process, uses the formed bad defective diagrammatic cross-section of higher postexposure bake temperature;
Fig. 2 B is existing photoresistance baking process, uses the formed bad defective diagrammatic cross-section of lower postexposure bake temperature;
Fig. 2 C is for using stage photoresistance baking process of the present invention, the diagrammatic cross-section of the photoresistance pattern of formation;
Fig. 3 is the process schematic representation of the photoresistance baking of a preferred embodiment of the present invention; And
Fig. 4 is the process schematic representation of the photoresistance baking of another preferred embodiment of the present invention.
The figure number symbol description:
Baking 115 photoresistance exposures before 110 exposures
120 postexposure bakes, 125 photoresistances develop
130 postdevelopment bakes
210 photoresistances, 212 residual photoresistances
220 photoresistances, 222 photoresistances depression
230 photoresistances, 310 photoresistance exposures
320 postexposure bakes, 330 postexposure bakes
340 postexposure bakes, 350 photoresistances develop
420 postexposure bakes of 410 photoresistance exposures
430 photoresistances develop
Embodiment
By in the above-mentioned background of invention as can be known, after photoresistance is finished design transfer, and finish as ion and inject after (Ion Implant) technology or the dry etch process, but always when electrically checking, find the bad situation of element test.Therefore, often form the bad problem generation of property in batches, the technology yield is formed great influence.
Multistage baking photoresistance of the present invention is to improve the method for photoetching quality, bad analysis through long problem component, find existing photoresistance baking process, though in each stage of photoetching process, all utilize suitable temperature baking photoresistance, pattern on the photoresistance is transferred, and unwanted photoresistance is removed.But the part photoresistance is because very responsive for the temperature of postexposure bake, so when using slightly high postexposure bake temperature, can produce the existing photoresistance baking process that utilizes as shown in Fig. 2 A, when the situation of using the higher formed bad defective diagrammatic cross-section of postexposure bake temperature takes place.Wherein, photoresistance 210 is heated excessively because of the photoresistance of bottom, thereby after development is finished, though removed the protection of unwanted photoresistance, still exists the situation of residual photoresistance 212.
Referring to Fig. 2 B, be existing photoresistance baking process, but use the lower formed bad defective diagrammatic cross-section of postexposure bake temperature.Wherein, photoresistance 220 forms the situation of photoresistance depression 222 after unwanted photoresistance is removed.So when the ion in the next technology injects or dry-etching is when carrying out, to originally be injected into or etched position wafer surface because of this, because the situation of residual photoresistance or photoresistance depression, and result and the situation of being scheduled to are not quite similar, therefore during the testing electrical property after technology is finished, many testing electrical property condition of poor be will find, technology yield thereby reduction therefore made.
Referring to Fig. 2 C, be to use multistage photoresistance baking process of the present invention, the diagrammatic cross-section of formed photoresistance pattern.As shown in FIG., utilize multistage photoresistance baking process of the present invention, can effectively improve the situation of photoresistance 230 and appearance profile thereof.Below will be with preferred embodiment of the present invention, clearly demonstrate method of the present invention and spirit, as those skilled in the art after understanding preferred embodiment of the present invention, when can be by the technology of teachings of the present invention, change and modification, it does not break away from spirit of the present invention and scope.
Consulting Fig. 3, is the process schematic representation of the photoresistance baking of a preferred embodiment of the present invention.As shown in FIG., the flow process of the employed photoresistance baking of this preferred embodiment is photoresistance exposure 310 in regular turn, and postexposure bake 320,330,340 and photoresistance develop 350.Its most important reason is, through repeatedly finding after the test technology condition, as previously mentioned, when the temperature of postexposure bake is too low, causes the situation of photoresistance depression easily, when the temperature of postexposure bake is too high, causes the situation that photoresistance is residual easily.Its reason be when temperature too high, will make the photoresistance overbaking, because of the heat energy of hot backing plate is the surface that is upwards conducted to photoresistance by the wafer below, so below photoresistance thereby residual.Identical, when temperature is too low, will make the baking deficiency on photoresistance surface, so the situation of the surface of photoresistance thereby generation depression.No matter desire to overcome this kind problem, be the temperature of heightening the temperature of postexposure bake or reducing postexposure bake, all loses it and imitate, and makes on the contrary day by day to tighten the process margin of temperature of postexposure bake of this technology to make and produce more shape difficulty.For thoroughly improving this phenomenon, finally find after the experiment of repeated multiple times, toasted if the temperature range of the temperature of postexposure bake is divided into three sections, promptly be divided into postexposure bake 320, postexposure bake 330 is toasted with 340 3 thermogrades of postexposure bake.Wherein, the temperature of postexposure bake 320 is toasted with lower temperature, and the temperature of postexposure bake 330 is a little more than the temperature of postexposure bake 320, and the temperature of postexposure bake 340 is the temperature baking to require in the former technology again.Use the technology of this triphasic postexposure bake that preferable photoresistance design transfer can be arranged, photoresistance profile as shown in Fig. 2 C, and can more amplify in the also more former technology of process margin, can make photoresistance that the temperature of postexposure bake is unlikely to sensitivity like this, its lifting to technological quality provides better control ability.The NFR107 photoresist of being produced with Japanese trader Mitsubishi (Misubishi) for example, when using multistage photoresistance baking process of the present invention, carry out postexposure bake, toasted photoresistances about 30 seconds with 50 ℃ earlier, then toasted photoresistances about 40 seconds with 80 ℃ again, toasted photoresistances about 50 seconds with 100 ℃ more at last, photoresistance can obtain preferable contour shape.
Referring to Fig. 4, be the process schematic representation of the photoresistance baking of another preferred embodiment of the present invention.As shown in FIG., its flow process can be divided into photoresistance exposure 410, postexposure bake 420 and photoresistance and develop 430.And with aforesaid embodiment different be in, the postexposure bake 420 of this preferred embodiment is to use a mode that heats up continuously to carry out, by the rise slowly of lower temperature.For example with precedent with the NFR107 photoresist that Japanese trader Mitsubishi (Misubishi) is produced, carry out postexposure bake, in 50 ℃ to the 100 ℃ modes that heat up continuously, about 120 seconds of baking photoresistance also can obtain the preferable contour shape of photoresistance.
Multistage baking photoresistance of the present invention is to improve the method for photoetching quality, utilize multistage mode after exposure is finished, photoresistance to be carried out repeatedly baking, or use a mode that heats up continuously that photoresistance is toasted, not only can not increase the demand of energy and can improve the nargin of baking, the more important thing is and to produce preferable photoresistance profile, the yield of technology is significantly promoted, provide important improvement semiconductor technology.Multistage baking photoresistance of the present invention is to improve the method for photoetching quality, toast or postdevelopment bake technology before also can being used in exposure, when the photoresistance baking that does not limit after being used in exposure, the photoresistance of visual reality uses and toasts the characteristic technology of susceptibility, carry out multistage baking photoresistance, with the profile that improves photoresistance and the quality of photoetching.
As understood by those skilled in the art, the above is preferred embodiment of the present invention only, is not in order to limit claim of the present invention; All other do not break away from the equivalence of being finished under the disclosed spirit and changes or modification, all should be included in the scope of claims.
Claims (13)
1. a multistage baking photoresistance comprises at least to improve the method for photoetching quality:
Be coated with a photoresistance;
Toast for the first time this photoresistance;
Expose a pattern in this photoresistance;
Use continuous multistage segmentation to toast this photoresistance, make this photoresistance progressively reach predetermined hardenability;
This photoresistance develops; And
Toast for the second time this photoresistance.
2. multistage baking photoresistance as claimed in claim 1 is to improve the method for photoetching quality, and it is characterized in that: the continuous multistage segmentation of above-mentioned use toasts this photoresistance and comprises, and using at least, the second order segmentation toasts this photoresistance.
3. multistage baking photoresistance as claimed in claim 1 is to improve the method for photoetching quality, and it is characterized in that: the continuous multistage segmentation of above-mentioned use toasts this photoresistance and comprises:
This photoresistance of postexposure bake for the first time uses 50 ℃ of bakings 30 seconds;
This photoresistance of postexposure bake for the second time uses 80 ℃ of bakings 40 seconds; And
This photoresistance of postexposure bake for the third time uses 100 ℃ of bakings 50 seconds.
4. multistage baking photoresistance as claimed in claim 1 is to improve the method for photoetching quality, and it is characterized in that: toast this photoresistance the above-mentioned first time, is this photoresistance of baking before the exposure.
5. multistage baking photoresistance as claimed in claim 1 is to improve the method for photoetching quality, and it is characterized in that: toast this photoresistance the above-mentioned second time, is this photoresistance of postdevelopment bake.
6. multistage baking photoresistance as claimed in claim 1 is to improve the method for photoetching quality, it is characterized in that: comprise, use continuous temperature lifting type to toast this photoresistance, at a preset time, heat continuously to one second predetermined temperature from first predetermined temperature, wherein this second predetermined temperature is higher than this first predetermined temperature.
7. multistage as claimed in claim 6 baking photoresistance is to improve the method for photoetching quality, and it is characterized in that: above-mentioned continuous temperature lifting type toasts this photoresistance, is in 120 seconds, toasts this photoresistance from 50 ℃ to heating continuously to 100 ℃ mode.
8. a multistage baking photoresistance comprises at least to improve the method for photoetching quality:
Be coated with a photoresistance;
Use continuous multistage segmentation to toast this photoresistance, make this photoresistance progressively reach predetermined hardenability; And
Expose a pattern in this photoresistance.
9. multistage baking photoresistance as claimed in claim 8 is to improve the method for photoetching quality, and it is characterized in that: the continuous multistage segmentation of above-mentioned use toasts this photoresistance and comprises, and using at least, the second order segmentation toasts this photoresistance.
10. multistage baking photoresistance as claimed in claim 8 is to improve the method for photoetching quality, and it is characterized in that: the continuous multistage segmentation of above-mentioned use toasts this photoresistance and comprises, and uses continuous temperature lifting type to toast this photoresistance.
11. a multistage baking photoresistance comprises at least to improve the method for photoetching quality:
A photoresistance develops;
Use continuous multistage segmentation to toast this photoresistance, make this photoresistance progressively reach predetermined hardenability; And
Remove this photoresistance.
12. multistage baking photoresistance as claimed in claim 11 is to improve the method for photoetching quality, it is characterized in that: the continuous multistage segmentation of above-mentioned use toasts this photoresistance and comprises, and using at least, the second order segmentation toasts this photoresistance.
13. multistage baking photoresistance as claimed in claim 11 is to improve the method for photoetching quality, it is characterized in that: the continuous multistage segmentation of above-mentioned use toasts this photoresistance and comprises, and uses continuous temperature lifting type to toast this photoresistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02121962 CN1245666C (en) | 2002-05-29 | 2002-05-29 | Method fo baking photoresistive in multistage in order to improve photoetching quality |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02121962 CN1245666C (en) | 2002-05-29 | 2002-05-29 | Method fo baking photoresistive in multistage in order to improve photoetching quality |
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| Publication Number | Publication Date |
|---|---|
| CN1462910A true CN1462910A (en) | 2003-12-24 |
| CN1245666C CN1245666C (en) | 2006-03-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 02121962 Expired - Fee Related CN1245666C (en) | 2002-05-29 | 2002-05-29 | Method fo baking photoresistive in multistage in order to improve photoetching quality |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101344733B (en) * | 2007-07-11 | 2010-09-29 | 上海宏力半导体制造有限公司 | Photoresist coating and developing apparatus |
| CN103257523A (en) * | 2012-02-17 | 2013-08-21 | 中国科学院微电子研究所 | Electron beam positive resist exposure method |
| CN105093863A (en) * | 2015-08-20 | 2015-11-25 | 上海华力微电子有限公司 | Postexposure baking method of photolithography technique |
| CN106873200A (en) * | 2017-03-28 | 2017-06-20 | 武汉华星光电技术有限公司 | Photoresistance roasting plant |
| CN107086801A (en) * | 2017-06-30 | 2017-08-22 | 哈尔滨工业大学 | A kind of double scale factor control strategies of Combined three phase Single Stage PFC Converter |
-
2002
- 2002-05-29 CN CN 02121962 patent/CN1245666C/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101344733B (en) * | 2007-07-11 | 2010-09-29 | 上海宏力半导体制造有限公司 | Photoresist coating and developing apparatus |
| CN103257523A (en) * | 2012-02-17 | 2013-08-21 | 中国科学院微电子研究所 | Electron beam positive resist exposure method |
| CN103257523B (en) * | 2012-02-17 | 2016-01-06 | 中国科学院微电子研究所 | The method of exposure electron beam positive photoresist |
| CN105093863A (en) * | 2015-08-20 | 2015-11-25 | 上海华力微电子有限公司 | Postexposure baking method of photolithography technique |
| CN106873200A (en) * | 2017-03-28 | 2017-06-20 | 武汉华星光电技术有限公司 | Photoresistance roasting plant |
| CN106873200B (en) * | 2017-03-28 | 2020-01-17 | 武汉华星光电技术有限公司 | Photoresist baking equipment |
| CN107086801A (en) * | 2017-06-30 | 2017-08-22 | 哈尔滨工业大学 | A kind of double scale factor control strategies of Combined three phase Single Stage PFC Converter |
| CN107086801B (en) * | 2017-06-30 | 2019-02-19 | 哈尔滨工业大学 | A kind of double scale factor control strategies of Combined three phase Single Stage PFC Converter |
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| Publication number | Publication date |
|---|---|
| CN1245666C (en) | 2006-03-15 |
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