CN1462000A - Flash storage bridge connection, method and its application system - Google Patents
Flash storage bridge connection, method and its application system Download PDFInfo
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- CN1462000A CN1462000A CN02121963A CN02121963A CN1462000A CN 1462000 A CN1462000 A CN 1462000A CN 02121963 A CN02121963 A CN 02121963A CN 02121963 A CN02121963 A CN 02121963A CN 1462000 A CN1462000 A CN 1462000A
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Abstract
A bridge device for NAND flash memory features that the buffer in said bridge device is used as cache for string part of address data in NAND flash memory and the cache control logic of said bridge device is used to judge if the data to be read is cache bit or cache miss. If it is cache hit, it can be directly responded. If it is cache miss, waiting is necessary. In the data reading procedure, the error in read data can be corrected by error correcting function in order to use NAND flash memory instead of NOR one for storing program and data, resulting in lower cost.
Description
Technical field
The present invention relates to a kind of flash storage bridge connection, and particularly relate to a kind of device, method and application system thereof that nand flash memory emulation is used for the NOR flash memory.
Background technology
Because the lasting progress of electronics technology, various information-based products be development constantly also, as desk-top computer, notebook computer and personal digital assistant products such as (Personal Digital Assistant are called for short PDA).Wherein, in order to store active program code (boot code) and to make things convenient for program code to upgrade, can use a kind of flash memory (NOR type flashmemory is hereinafter referred to as the NOR flash memory) of NOR pattern usually; it has fast, stable properties, but price is then comparatively expensive.Other has a kind of flash memory (NAND type flash memory of NAND pattern, hereinafter referred to as nand flash memory), normally being used for storage data uses, though its price is comparatively cheap, but less stable, and speed is also slower, so that its usefulness and fiduciary level requirement, as Storage Media, all dislike not enough slightly as the active program code.Therefore, very universal products such as various information-based products such as PDA have to be subject to its characteristic, and use the NOR flash memory to store the active program code, cause and can't reduce its cost of products.And, then must put up with its existing usefulness and fiduciary level requirement if be when considering to adopt nand flash memory with the cost, can't be satisfactory to both parties.
Summary of the invention
In view of this, the invention provides a kind of flash storage bridge connection, method and application system thereof, it can be that preferable NOR flash memory uses with usefulness and all relatively poor nand flash memory emulation of fiduciary level, not only can promote its usefulness and fiduciary level, also can reduce the manufacturing cost of the various information-based products of its application.
For reaching above-mentioned and other purpose, the invention provides a kind of flash storage bridge connection, be applicable to that with a nand flash memory emulation be the NOR flash memory, with the connected storage interface, comprising: buffer zone and steering logic.Wherein, buffer zone is in order to store the data corresponding to nand flash memory part address.Steering logic couples buffer zone, in order to the reception memorizer instruction, and the requirement of judgement, execution and response storage instruction.
In the preferred embodiment of the present invention, steering logic also comprises: first buffering access (bufferaccess) unit, buffer control logic, the second buffering access unit, error correcting code (errorcorrection code) unit, block address conversion (block address translation table) unit, nand flash memory control module and main control logic unit.Wherein, the first buffering access unit is in order to the access interface as memory interface and buffer zone.Buffer control logic couples first buffering access unit and the buffer zone, in order to control read-write buffer zone.The second buffering access unit couples buffer control logic, in order to the access interface as nand flash memory and buffer zone.The error correction code element couples the second buffering access unit, in order to the mistake of corrigendum from the nand flash memory reading of data.The block address converting unit couples the second buffering access unit, in order to one of memory instructions logical address, is converted to actual address.The nand flash memory control module couples error correction code element and block address converting unit, in order to reality read-write nand flash memory.The main control logic unit couples the first buffering access unit, second buffering access unit and the block address converting unit, reads the data that are not stored in buffer zone, judges whether data that memory instructions is desired to read have been stored in buffer zone and have controlled the data that will be temporary in buffer zone and progressively write nand flash memory from nand flash memory in order to control.
Wherein, the memory instructions of reception comprises that memory read instruction fetch, storer write instruction and memory configurations (configure) instruction.And the steering logic of this flash storage bridge connection is supported 8/16/32 synchronous/asynchronous memory interface, is reached and support as different memory configurations (configuration) such as 4Mx8,16Mx8,32Mx8,64Mx8, and supports its staggered (interleave) and noninterlace (non-interleave) pattern.And when start, the active program code that stores in the nand flash memory can be loaded in advance in the buffer zone, to support local executable operations (execution inplace is called for short XIP).
In the preferred embodiment of the present invention, this flash storage bridge connection is applied in its application system, this system comprises: memory control unit, nand flash memory and flash storage bridge connection.Wherein, the memory control unit support connects the memory interface of a NOR flash memory.Program code or data that nand flash memory uses in order to stocking system.Flash storage bridge connection couples memory control unit and nand flash memory, uses in order to nand flash memory emulation is become the NOR flash memory.
The present invention provides a kind of flash memory bridging method in addition, is applicable to that with a nand flash memory via flash storage bridge connection, emulation is the NOR flash memory, with the connected storage interface, comprises the following steps: at first to receive a memory instructions; When this memory instructions is a memory read instruction fetch, and the data of desiring to read directly respond this memory read instruction fetch when being stored in the flash storage bridge connection; When this memory instructions is a memory read instruction fetch, and the data of desiring to read from the nand flash memory reading of data, respond this memory read instruction fetch when not being stored in the flash storage bridge connection then; When this memory instructions is that a storer writes when instruction, in flash storage bridge connection, progressively transcription is gone in the nand flash memory again with data storing; And when this memory instructions is memory configurations instruction, carry out this memory configurations instruction.Wherein when from the nand flash memory reading of data, the mistake of reading of data can be corrected in advance, to improve its fiduciary level.
The invention provides a kind of flash memory bridge joint (bridge) device, method and application system thereof, be to use the buffer zone that provides in the flash storage bridge connection as high-speed cache (cache), to store the part address date in the nand flash memory, high-speed cache steering logic (cache control logic) to provide in the flash storage bridge connection again, judge that the data of desiring to read are cache hit (cachehit), so can directly respond, or high-speed cache failure (cache miss), so must wait for, and in data read process, utilization error correction code function is corrected the mistake of reading of data, being that the NOR flash memory comes store program code and data with nand flash memory emulation, reach and reduce its manufacturing cost, and keep the effect of its usefulness and fiduciary level.
By in the above-mentioned explanation as can be known, use a kind of flash storage bridge connection provided by the invention, method and application system thereof, then can use nand flash memory, its emulation is become the NOR flash memory, come store program code and data, not only can reduce its manufacturing cost, more can keep its usefulness and fiduciary level.
Description of drawings
For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended accompanying drawing, be described in detail below:
Fig. 1 shows a kind of existing flash memory application synoptic diagram;
Fig. 2 is that the flash storage bridge connection that shows the preferred embodiment according to the present invention is used synoptic diagram;
Fig. 3 is the flash storage bridge connection calcspar that shows the preferred embodiment according to the present invention; And
Fig. 4 shows a kind of flash memory bridge joint method flow diagram.
Symbol description among the figure:
110,210 memory control units
120 NOR flash memories
130,230 nand flash memories
220,300 flash storage bridge connections
310 buffer zones
320 steering logics
325 first buffering access units
330 buffer control logics
335 second buffering access units
340 error correction code elements
350 nand flash memory control modules
355 main control logic unit
S410～S480 method step
Embodiment
Please refer to shown in Figure 1ly, it is that a kind of existing flash memory is used synoptic diagram.This application examples is desk-top computer, notebook computer or personal digital assistant (Personal DigitalAssistant in this way, be called for short PDA) in, utilization quickflashing (flash) storer is with the circuit of store program code or data, and this application comprises memory control unit 110, nand flash memory 130 and NOR flash memory 120.Wherein, memory control unit 110 has nand flash memory interface and memory interface, to connect nand flash memory 130 and NOR flash memory 120 respectively.Because of NOR flash memory 120 has preferable usefulness and fiduciary level characteristic, so normally in order to store program code, to guarantee its usefulness and fiduciary level, nand flash memory 130 is then usually in order to storage data.
Yet, to compare because of NOR flash memory 120 and nand flash memory 130, it costs an arm and a leg many, then cause the manufacturing cost of this kind application mode to reduce, and come store program code as if directly changing with nand flash memory 130, will influence the usefulness and the fiduciary level of system.Therefore, the invention provides a kind of flash storage bridge connection,, significantly promote and use usefulness and the fiduciary level that nand flash memory 130 comes the application of store program code with under the situation that increases cost a little.
Please referring to shown in Figure 2, it is the flash storage bridge connection application synoptic diagram of the preferred embodiment according to the present invention.This uses except that comprising memory control unit 210 and the nand flash memory 230 in order to store program code, also comprises a flash memory bridge joint (bridge) device 220.This flash storage bridge connection 220 couples memory control unit 210 and nand flash memory 230, in order to nand flash memory 230 emulation becoming NOR flash memory is used, reaches usefulness and the fiduciary level that meets the stocking system program code to provide.Certainly, those skilled in the art are when knowing, and system also can be planned to the zone of store program code and the zone use of storage data respectively with this nand flash memory 230 via suitable planning.
Please referring to shown in Figure 3, it is the flash storage bridge connection calcspar of the preferred embodiment according to the present invention.This flash storage bridge connection 300 comprises: buffer zone 310 and steering logic 320.Wherein, buffer zone 310 can by single one or more for example be that the impact damper of FIFO or RAM is formed, it is in order to store the data corresponding to nand flash memory 230 part addresses, and when it is made up of a plurality of impact dampers, and the use that can interlock (interleaved access), to promote system effectiveness.Steering logic 320 couples buffer zone 310, in order to the reception memorizer instruction, and the requirement of judgement, execution and response storage instruction.
Wherein steering logic 320 also comprises: first buffering access (buffer access) unit 325, buffer control logic 330, the second buffering access unit 335, error correcting code (error correctioncode) unit 340, block address conversion (block address translation table) unit 345, nand flash memory control module 350 and main control logic unit 355.The first buffering access unit 325 is in order to as the memory interface of the memory control unit 210 of Fig. 2 and the access interface of buffer zone 310.Buffer control logic 330 couples the first buffering access unit 325, second buffering access unit 335 and the buffer zone 310, in order to control read-write buffer zone 310.The second buffering access unit 335 couples buffer control logic 330, in order to as the nand flash memory 230 of Fig. 2 and the access interface of buffer zone 310.Error correction code element 340 couples the second buffering access unit 335, in order to the mistake of corrigendum from nand flash memory 230 reading of data of Fig. 2.Block address converting unit 345 couples the second buffering access unit 335, in order to one of memory instructions logical address, is converted to actual address.Nand flash memory control module 350 couples error correction code element 340 and block address converting unit 345, in order to the nand flash memory 230 of reality read-write Fig. 2.Main control logic unit 355 couples the first buffering access unit 325, second buffering access unit 335 and the block address converting unit 345, reads the data that are not stored in buffer zone 310, judges whether the data that memory instructions is desired to read have been stored in buffer zone 310 and have controlled the nand flash memory 230 that the data that will be temporary in buffer zone 310 progressively write Fig. 2 from the nand flash memory 230 of Fig. 2 in order to control.Certainly, as is known to the person skilled in the art, it for example is little processing controls logic that main control logic unit 355 wherein can use.
Wherein write instruction and memory configurations (configure) instruction, be illustrated so can be divided into several different situations because of the memory instructions that receives comprises memory read instruction fetch, storer.At first preferably steering logic 320 is when start, the active program code that can will be stored in the nand flash memory 230 loads in the buffer zone 310 in advance, with the local executable operations that provides support (execution in place, be called for short XIP) function, and in the process of loading procedure code, can be through error correction code element 340 mistake of correction data more, to improve its fiduciary level.
When receiving the memory read instruction fetch, whether main control logic unit 355 can be checked the data of desiring to read and be stored in the buffer zone 310, in this way then directly by taking out data in the buffer zone 310, to respond this memory read instruction fetch; As otherwise through block address converting unit 345, logical address is converted to the nand flash memory address of actual correspondence, and through nand flash memory control module 350 reading of data, in reading process, then through error correction code element 340 mistake of correction data more, deposit in the buffer zone 310 in through second buffering access unit 335 and the buffer control logic 330 again, then the data of just desiring to read via 325 responses of the first buffering access unit.This section wait process can have several different practices, and first kind for continue keeping the bus right to use when response data is finished; Second kind for discharge the bus right to use in advance, waits for that next retry (retry) can quick response data when reading; The third is for discharging the bus right to use, and in finishing reading of data in nand flash memory 230, and when being stored in buffer zone 310, sends interrupt request.Those skilled in the art can cooperate needs, use different wait methods, to promote the usefulness of system.
When receiving that storer writes instruction, then through first buffering access unit 325 and the buffer control logic 330, deposit in the buffer zone 310 will write data in advance, progressively data are deposited in the nand flash memory 230 through the second buffering access unit 335 and nand flash memory control module 350 again.And when receiving the memory configurations instruction, then directly carry out this memory configurations instruction by main control logic unit 355.Wherein, this flash storage bridge connection 300 is supported 8/16/32 synchronous/asynchronous memory interface, is reached and support it for example is different memory configurations such as 4Mx8,16Mx8,32Mx8,64Mx8, and supports its staggered and noninterlace pattern.
In above-mentioned explanation, can conclude a kind of flash memory bridging method, be applicable to that with a nand flash memory via flash storage bridge connection, emulation is the NOR flash memory, with the connected storage interface.The method comprises the following steps: at first to receive a memory instructions in the S410 step shown in the process flow diagram of Fig. 4; In step S420, judge the kind of memory instructions then, when this memory instructions is the memory read instruction fetch, and in the S430 step, judge when the data desire to read have been stored in the flash storage bridge connection, then directly respond this memory read instruction fetch to the S450 step; When this memory instructions is the memory read instruction fetch, and in step S420, judge when the data of desiring to read are not stored in the flash storage bridge connection,, with from the nand flash memory reading of data, respond this memory read instruction fetch to the S450 step then then to step S440; When judging that in step S420 memory instructions is a storer when writing instruction, then to step S460, with data storing in flash storage bridge connection, in step S470, progressively the data transcription is gone in the nand flash memory again; And when this memory instructions is the memory configurations instruction, then carries out this memory configurations and instruct to step S480.Wherein when from the nand flash memory reading of data, the mistake of reading of data can be corrected in advance, to improve its fiduciary level.
By in the above-mentioned explanation as can be known, the present invention use provide in the flash storage bridge connection get steering logic soon, judge that the data of desiring to read are that the storage area meets, can directly respond, or the storage area does not meet, must wait for, and utilization error correction code function is corrected the mistake of reading of data in data read process.So it for nand flash memory emulation is come store program code and data for the NOR flash memory, not only can reduce its manufacturing cost, more can keep its usefulness and fiduciary level.
Though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, thus protection scope of the present invention when with claims and in conjunction with instructions and accompanying drawing the person of being defined be as the criterion.
Claims (19)
1. a flash storage bridge connection is applicable to that with a nand flash memory emulation be a NOR flash memory, to connect a memory interface, comprising:
One buffer zone is in order to store the data corresponding to this nand flash memory part address; And
One steering logic couples this buffer zone, in order to receive a memory instructions, carries out and respond the requirement of this memory instructions.
2. flash storage bridge connection as claimed in claim 1 is characterized in that: this steering logic also comprises:
One first buffering access unit is in order to the access interface as this memory interface and this buffer zone;
One buffer control logic couples this first buffering access unit and this buffer zone, in order to this buffer zone of control read-write;
One second buffering access unit couples this buffer control logic, in order to the access interface as this nand flash memory and this buffer zone;
One error correction code element couples this second buffering access unit, in order to the mistake of corrigendum from this nand flash memory reading of data;
One block address converting unit couples this second buffering access unit, and the logical address in order to this memory instructions is converted to an actual address;
One nand flash memory control module couples this error correction code element and this block address converting unit, reads and writes this nand flash memory in order to reality; And
One main control logic unit, couple this first buffering access unit, this second buffering access unit and this block address converting unit, read the data that are not stored in this buffer zone, judge whether data that this memory instructions is desired to read have been stored in the data that this buffer zone and control will be temporary in this buffer zone and have progressively write this nand flash memory from this nand flash memory in order to control.
3. flash storage bridge connection as claimed in claim 1 is characterized in that: this memory instructions comprises that memory read instruction fetch, storer write instruction and memory configurations instruction.
4. flash storage bridge connection as claimed in claim 1 is characterized in that: this steering logic is supported 8/16/32 synchronous/asynchronous interface.
5. flash storage bridge connection as claimed in claim 1 is characterized in that: this steering logic is supported as different memory configurations such as 4Mx8,16Mx8,32Mx8,64Mx8, and is supported staggered and noninterlace pattern.
6. flash storage bridge connection as claimed in claim 1 is characterized in that: this steering logic can load the active program code that stores in this nand flash memory in this buffer zone when start.
7. flash storage bridge connection as claimed in claim 1 is characterized in that: this buffer zone is made up of a plurality of impact damper, and the use that can interlock.
8. flash storage bridge connection application system comprises:
One memory control unit, this memory control unit support connects a memory interface of a NOR flash memory;
One nand flash memory is in order to the program code of stocking system use; And
One flash storage bridge connection couples this memory control unit and this nand flash memory, uses in order to this nand flash memory emulation is become this NOR flash memory.
9. flash storage bridge connection application system as claimed in claim 8 is characterized in that: this flash storage bridge connection comprises:
One buffer zone is in order to store the data corresponding to this nand flash memory part address; And
One steering logic couples this buffer zone, in order to receive the memory instructions that this memory control unit sends, judges, carries out and respond the requirement of this memory instructions.
10. flash storage bridge connection application system as claimed in claim 9 is characterized in that: this steering logic also comprises:
One first buffering access unit is in order to the access interface as this memory interface and this buffer zone;
One buffer control logic couples this first buffering access unit and this buffer zone, in order to this buffer zone of control read-write;
One second buffering access unit couples this buffer control logic, in order to the access interface as this nand flash memory and this buffer zone;
One error correction code element couples this second buffering access unit, in order to the mistake of corrigendum from this nand flash memory reading of data;
One block address converting unit couples this second buffering access unit, and the logical address in order to this memory instructions is converted to an actual address;
One nand flash memory control module couples this error correction code element and this block address converting unit, reads and writes this nand flash memory in order to reality; And
One main control logic unit, couple this first buffering access unit, this second buffering access unit and this block address converting unit, read the data that are not stored in this buffer zone, judge whether data that this memory instructions is desired to read have been stored in the data that this buffer zone and control will be temporary in this buffer zone and have progressively write this nand flash memory from this nand flash memory in order to control.
11. flash storage bridge connection application system as claimed in claim 9 is characterized in that: this memory instructions comprises that memory read instruction fetch, storer write instruction and memory configurations instruction.
12. flash storage bridge connection application system as claimed in claim 8 is characterized in that: this flash storage bridge connection is supported 8/16/32 synchronous/asynchronous interface.
13. flash storage bridge connection application system as claimed in claim 8 is characterized in that: this flash storage bridge connection is supported as different memory configurations such as 4Mx8,16Mx8,32Mx8,64Mx8, and is supported staggered and noninterlace pattern.
14. flash storage bridge connection application system as claimed in claim 8 is characterized in that: this flash storage bridge connection can load the active program code that stores in this nand flash memory when start in advance.
15. a flash memory bridging method is applicable to that with a nand flash memory via a flash storage bridge connection, emulation is a NOR flash memory, to connect a memory interface, comprises the following steps:
Receive a memory instructions;
When this memory instructions is a memory read instruction fetch, and the data of desiring to read respond this memory read instruction fetch when being stored in this flash storage bridge connection;
When this memory instructions is this memory read instruction fetch, and the data of desiring to read are not when being stored in this flash storage bridge connection, and this nand flash memory reading of data responds this memory read instruction fetch then certainly;
When this memory instructions is that a storer writes when instruction, in this flash storage bridge connection, progressively transcription is gone in this nand flash memory again with this data storing; And
When this memory instructions is memory configurations instruction, carry out this memory configurations instruction.
16. flash memory bridging method as claimed in claim 15 is characterized in that: when this nand flash memory reading of data certainly, can be with the mistake corrigendum in advance of reading of data.
17. a flash memory bridging method is applicable to that with a nand flash memory via a flash storage bridge connection, emulation is a NOR flash memory, to connect a memory interface, comprises the following steps:
Receive a memory instructions;
When this memory instructions is a memory read instruction fetch, and the data of desiring to read respond this memory read instruction fetch when being stored in this flash storage bridge connection; And
When this memory instructions is this memory read instruction fetch, and the data of desiring to read are not when being stored in this flash storage bridge connection, and this nand flash memory reading of data responds this memory read instruction fetch then certainly.
18. flash memory bridging method as claimed in claim 17 is characterized in that: when this nand flash memory reading of data certainly, can be with the mistake corrigendum in advance of reading of data.
19. a flash memory bridging method is applicable to that with a nand flash memory via a flash storage bridge connection, emulation is a NOR flash memory, to connect a memory interface, comprises the following steps:
Receive a memory instructions;
When this memory instructions is that a storer writes when instruction, in this flash storage bridge connection, progressively transcription is gone in this nand flash memory again with this data storing; And
When this memory instructions is memory configurations instruction, carry out this memory configurations instruction.
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| CN02121963A CN1462000A (en) | 2002-05-29 | 2002-05-29 | Flash storage bridge connection, method and its application system |
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| CN02121963A CN1462000A (en) | 2002-05-29 | 2002-05-29 | Flash storage bridge connection, method and its application system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010148922A1 (en) * | 2009-11-24 | 2010-12-29 | 中兴通讯股份有限公司 | Method and device for accessing data in nand flash memory |
| CN102103566A (en) * | 2009-12-18 | 2011-06-22 | Nxp股份有限公司 | Flash memory-interface |
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2002
- 2002-05-29 CN CN02121963A patent/CN1462000A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010148922A1 (en) * | 2009-11-24 | 2010-12-29 | 中兴通讯股份有限公司 | Method and device for accessing data in nand flash memory |
| CN101702139B (en) * | 2009-11-24 | 2011-11-30 | 中兴通讯股份有限公司 | Method and device for accessing data of Nand flash memory |
| CN102103566A (en) * | 2009-12-18 | 2011-06-22 | Nxp股份有限公司 | Flash memory-interface |
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