CN1455335A - Method of recording fault time of power supply for computer system - Google Patents
Method of recording fault time of power supply for computer system Download PDFInfo
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- CN1455335A CN1455335A CN 02118818 CN02118818A CN1455335A CN 1455335 A CN1455335 A CN 1455335A CN 02118818 CN02118818 CN 02118818 CN 02118818 A CN02118818 A CN 02118818A CN 1455335 A CN1455335 A CN 1455335A
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Abstract
The computer system comprises the power source utilized to generate a power supply signal, the storage and the processor. The processor comprises the power supply end, the input end for receiving the normal signal of the power supply and the output end connected to the storage. The said power supply end connected to the power source is utilized to receive the signal of the power supply. The output end outputs the failure time of the power supply of the computer system to the storage. When the input end of the processor does not receive the normal signal of the power supply and the voltage value of the signal of the power supply is lower than the critical voltage, the processor stores the failure time of the power supply and the testing code to the storage device. Based on the failure time of the power supply, the testing code is created by calculation according to the prearranged mode.
Description
FIELD OF THE INVENTION
The present invention relates to the method for the electric power supply fault-time (power failure time) of a kind of logger computer system, refer to a kind of method of utilizing non-volatile (non-volatile) storer to come electric power supply fault-time of logger computer system especially.
Background technology
When the power supply supply failure of computer system, the user's that may seriously paralyse work, and also the user not only can lose the documentation that all do not store as yet, more needs one tediously long period that this computer system is resumed work again.So, the supvr of one computer network system must be noted that and follows the trail of in this computer network system, the situation whether computing machine generation electric power supply fault is arranged, and the relevant information of the electric power supply fault by analyzing this computing machine, this supvr then can avoid the incident of electric power supply fault to take place once again and influence the action of this computing machine.
Past, for the definite time of logger computer generation electric power supply fault, generally can a time data logging device (time recording device) be installed in this computing machine and calculate the definite time that the electric power supply fault takes place, then should the time data can be recorded in the memory storage of nonvolatile memory and so on and to use when further analyzing in the future.This time data logging device is constantly to upgrade the time that receives the normal electricity supply with this computing machine of record recently, that is this computing machine is under normal electric power supply, this time data logging device can be according to nearest running time of this computing machine data for updating constantly, so that keeping this computing machine, a nonvolatile memory is in time under the normal operation state recently, therefore when the situation of this computing machine generation electric power supply fault, this time data logging device promptly can be considered the time of generation electric power supply fault in the time data that this nonvolatile memory write down.
Yet therefore this time data logging device need expend the action that a large amount of system resource of this computing machine detects constantly and writes down owing to must constantly upgrade the data of this nonvolatile memory according to the present mode of operation of this computing machine.In addition, when this computing machine received a stable electric power supply, this time data logging device even also can be correlated with upgraded the action with record.Generally speaking, itself promptly has the function of rectification the power supply of computing machine, therefore this power supply can provide the electric current of this computing machine quite stable, as mentioned above, therefore this time data logging device can constantly carry out the detection of time data, upgrade, and the action of record and take this system for computer resource, thereby influence the computing of other programs and execution and seriously reduce the performance of this computing machine.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of method in the electric power supply fault-time that detects when the electric power supply fault takes place opening entry computer system, to address the above problem.
Another fundamental purpose of the present invention is to provide the method for electric power supply fault-time of a kind of logger computer system, this computer system comprises that a power supply is used for producing an electric power supply signal, one storer is used for storing data, and a processor is used for handling this data.This processor comprises an electric power supply end, and it is connected in this power supply, is used for receiving this electric power supply signal, one input end is used for receiving an electric power regular supply signal, and an output terminal, it is connected in this storer, and the electric power supply fault-time that is used for exporting this computer system is to this storer.When the input end of this processor does not receive this electric power regular supply signal, and when this electric power supply voltage of signals value has been lower than a critical voltage, this processor is stored in this storer with an electric power supply fault-time and a check code, and this check code is to produce with a predetermined way computing fault-time by this electric power supply.
A fundamental purpose more of the present invention is to provide the method for electric power supply fault-time of a kind of logger computer system, this method can not take any system documentation and influence other program implementation, and do not need extra hardware circuit and extra standby power supply to operate this function, so generally speaking, method of the present invention can make computing machine have higher execution performance (performance) under the situation that need not add any extra element cost.
Description of drawings
Fig. 1 is the functional block diagram of computer system of the present invention.
Fig. 2 is the synoptic diagram of computer system when the electric power supply fault shown in Figure 1.
Fig. 3 is the process flow diagram of computer system processor electric power supply fault shown in Figure 1.
Concrete embodiment
See also Fig. 1, Fig. 1 is the functional block diagram of computer system 10 of the present invention.Computer system 10 comprises a power supply (power supply) 12, is used to provide the required operating voltage of computer system 10; One first memory 16 is used for record material, and it is a nonvolatile RAM; And one processor 14 be used for handling this data.Processor 14 receives a standby power suppling signal (standby power signal) 18 at first input end 13, and receives an electric power regular supply signal (powergood sigaal) 20 at second input end 15.In addition, processor 14 exports an electric power supply fault-time and a check code (checksum) with respect to this electric power supply fault-time to first memory 16 by an output terminal 17 that is connected in first memory 16 and is stored.Computer system 10 can be utilized a real-time clock signal (real-time clock, RTC) come time of logger computer system 10, and this real-time clock signal can be by a processor, a south bridge circuit (south bridge), or other elements of computer system 10 provide.Generally speaking, electric power regular supply signal 20 is produced by a logical circuit (logic circuit), be used to refer to the state of the electric power supply signal 18 that computer system 10 received, if electric power supply signal 18 meets the required specification of computer system 10, then this logical circuit can be exported the electric power regular supply signal 20 of representing binary bit value " 1 ", and in case the situation of electric power supply fault takes place, then this logical circuit can be exported the electric power regular supply signal 20 of representing binary bit value " 0 ".
See also Fig. 2, Fig. 2 is the synoptic diagram of computer system 10 when the electric power supply fault shown in Figure 1.Among Fig. 2, electric power supply signal 18 all is labeled out in order to explanation at the magnitude of voltage that electric power supply fault 28 front and back take place.Before electric power supply fault 28 took place, electric power regular supply signal 20 kept a binary bit value " 1 ", and the magnitude of voltage of electric power supply signal 18 is a steady state (SS).Yet, electric power supply fault 28 takes place after, the magnitude of voltage of electric power supply signal 18 begins to descend, after one period time delay, the logical circuit that produces electric power regular supply signal 20 has detected the generation of electric power supply fault 28, therefore, electric power regular supply signal 20 also is transformed into " 0 " by binary bit value " 1 ".Since the situation of electric power supply fault 28 takes place, this moment, computer system 10 must determine whether should be stored in first memory 16 fault-time corresponding to the electric power supply of electric power supply fault 28.
Because the output voltage of power supply 12 can make output voltage values produce by a small margin unavoidably because of the instability of inner member own height changes,, computer system 10 writes down corresponding electric power supply fault-time so only needing the situation (for example supply undertension and continue running so that computer system 10 to be provided) for the electric power supply fault, so, computer system 10 is the situations that judge whether to take place great electric power supply fault by a magnitude of voltage that compares electric power supply signal 18 and a critical voltage 22, if the magnitude of voltage of electric power supply signal 18 is to be higher than critical voltage 22, then computer system 10 does not need record data any time, because this electric power supply fault may be a magnitude of voltage slight variations and quite of short duration and can not influence the running of actual computer system 10.If the magnitude of voltage subcritical voltage 22 of electric power supply signal 18, then computer system 10 must record data correlation time with as electric power supply fault-time, because this moment electric power supply signal 18 magnitude of voltage can reduce fast at any time and can't provide computer system 10 required operating voltage, therefore can cause whole computer system 10 can't continue operation.When the situation of great electric power supply fault takes place when, processor 14 must keep a surge time 26 and write down this electric power supply fault-time, and processor 14 must be lower than the operating voltage 24 of processor 14 at the magnitude of voltage of electric power supply signal 18 before, promptly deposit this electric power supply in first memory 16 fault-time.Because the operating voltage 24 subcritical voltages 22 of processor 14, therefore when great electric power supply fault takes place, 24 this section surge time 26 of operating voltage that the magnitude of voltage that computer system 10 is utilized electric power supply signal 18 is reduced to processor 14 by critical voltage 22 finish and write down this electric power supply action of fault-time.
Except electric power supply fault-time, when the magnitude of voltage subcritical voltage 22 of electric power supply signal 18, computer system 10 also writes first memory 16 with a check code simultaneously.If this electric power supply failure situations is not very serious, and still can continue running after the computer system 10, then computer system 10 can be removed this check code from first memory 16, so this check code is to be used for representing that this electric power supply fault is not temporary electric power supply change.
See also Fig. 3, Fig. 3 is the process flow diagram that computer system 10 shown in Figure 1 is handled the electric power supply fault.As mentioned above, when electric power regular supply signal 20 generation binary bit values " 1 " are changed to " 0 ", or processor produces when resetting (reset), computer system 10 can be taked suitably, and action comes the record electricity supply fault time, and the step of computer system 10 processing electric power supply faults is as follows: step 100: the electric power supply fault and the magnitude of voltage subcritical voltage 22 of electric power supply signal 18 take place; Step 104: should write first memory 16 with corresponding check code real-time clock time (RTC time); Step 106: whether the magnitude of voltage of electric power supply signal 18 subcritical voltage 22? if be, carry out step 104, otherwise, carry out step 108; Does step 108: electric power regular supply signal 20 have binary bit value " 1 " or " 0 "? if be " 1 ", then carry out step 110, if be " 0 ", then carry out step 106; Step 110: do not detect the situation of any electric power supply fault, and, then this check code is removed if first memory 16 stores this check code; Step 112: the electric power supply situation of computer system 10 is normal; Step 114: processor produces resets; Step 116: write down present real-time clock time with as electric power supply release time (power backtime); Does step 118: the first record body 16 store a check code? if be, carry out step 120, otherwise, carry out step 106; Step 120: deposit first memory 16 stored electric power supply release time and electric power supply in a second memory fault-time, and the check code in the first memory 16 is removed, get back to step 106.
As described in step 120, have only when processor produces replacement because of the electric power supply fault, electric power supply fault-time and electric power supply just can be recorded in this second memory release time, and second memory can be the memory storage of any kind of so that allow system operator follow the trail of and manage the information of all electric power supply fault-times and electric power supply release time, no matter so be Winchester disk drive, the network disk machine, or other memory storages all can be used to store data correlation time.Computer system 10 is whether utilize check code (step 118) to differentiate the electric power supply fault be because the electric power supply fault that the electric power supply shakiness is caused or have a user this computing machine to be carried out the action of normal shutdown, and when the electric power supply shakiness causes the electric power supply fault, check code will be stored in the first memory 16, yet if do not store this check code in the first memory 16, this second memory just can not write down data any time.Note that after processor is reset computer system 10 can be checked the state (step 106) of electric power supply signal 18 again, and the state of electric power supply signal 18 is when producing any variation, its follow-up handling procedure also as mentioned above.
As step 104,106 is described, computer system 10 must constantly repeatedly be upgraded and the record electricity supply fault time according to the time of computer system 10 the last normal operations, thus, though if the magnitude of voltage subcritical voltage 22 of electric power supply signal 18, but still be higher than the operating voltage of processor 14 and be enough to make processor 14 to continue running, that is in surge time 26, this moment constantly update time data and it is stored in first memory 16, so the time data that first memory 16 is write down is the information of the most approaching actual electric power supply fault time.
Compared to known techniques, the method of electric power supply fault-time of logger computer of the present invention system 10 is only detecting under the situation that the electric power supply fault takes place, the system resource of the system 10 that just can use a computer is carried out the relevant subsequent handling procedure, so when computer system 10 receives suitable electric power supply signal 18, the method of electric power supply fault-time of logger computer of the present invention system 10 can't take any system resource and influence other program implementation, and do not need extra hardware circuit and extra standby power supply to operate this function, so generally speaking, computer system 10 can have higher execution performance under the situation that need not add any extra element cost.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (20)
1. the method for electric power supply fault-time of a logger computer system, described computer system comprises:
Power supply is used for producing the electric power supply signal;
First memory is used for storing data;
Processor is used for handling described data, and it comprises:
The electric power supply end, it is connected in described power supply, is used for receiving described electric power supply signal;
Input end is used for receiving an electric power regular supply signal; And
Output terminal, it is connected in described first memory, and the electric power supply fault-time that is used for exporting described computer system is to described first memory;
Described method comprises the following steps:
(a) input end when described processor does not receive described electric power regular supply signal, and when described electric power supply voltage of signals value has been lower than a critical voltage, described processor is stored in described first memory with one first electric power supply fault-time and one first check code, and described first check code produces with a predetermined way computing by described first electric power supply fault-time.
2. the method for claim 1, wherein said storer is to be a nonvolatile RAM.
3. the method for claim 1, wherein said first electric power supply fault-time and described first check code are lower than in described electric power supply voltage of signals value and write described first memory before the minimum operation voltage of described processor and store, and described critical voltage is greater than described minimum operation voltage.
4. the method for claim 1, it also comprises the following steps:
(b) if the input end of described processor does not receive described electric power regular supply signal yet, and described electric power supply voltage of signals value still is lower than described critical voltage, described processor is stored in described first memory with one second electric power supply fault-time and one second check code, and described second check code is to produce with described predetermined way computing fault-time by described second electric power supply.
5. the method for claim 1, it also comprises the following steps:
(c) after described processor reset, read electric power supply fault-time from described first memory, and described electric power supply is write a second memory fault-time corresponding to a predetermined check code.
6. the method for claim 1, it also comprises the following steps:
(d) after described processor reset, an electric power supply is write described second memory release time.
7. method as claimed in claim 6, wherein said electric power supply fault-time and described electric power supply release time are to produce according to a real-time clock.
8. method as claimed in claim 7, wherein said real-time clock are that the element by a subsystem in the described computer system provides, and described subsystem comprises described processor and south bridge circuit.
9. the method for claim 1, wherein said electric power supply signal is a standby power suppling signal.
10. the method for claim 1, wherein said computer system also comprises a logical circuit, is used for producing described electric power regular supply signal, and the input end of described processor is connected in described logical circuit, is used for receiving described electric power regular supply signal.
11. a computer system, it comprises:
Power supply is used for producing an electric power supply signal;
First memory is used for storing data;
Processor is used for handling described data, and it comprises:
The electric power supply end, it is connected in described power supply, is used for receiving described electric power supply signal;
Input end is used for receiving an electric power regular supply signal; And
Output terminal, it is connected in described first memory, and the electric power supply fault-time that is used for exporting described computer system is to described first memory;
Wherein the input end when described processor does not receive described electric power regular supply signal, and when described electric power supply voltage of signals value has been lower than a critical voltage, described processor is stored in described first memory with one first electric power supply fault-time and one first check code, and described first check code produces with a predetermined way computing by described first electric power supply fault-time.
12. computer system as claimed in claim 11, wherein said storer are nonvolatile RAMs.
13. computer system as claimed in claim 11, wherein said first electric power supply fault-time and described first check code are lower than in described electric power supply voltage of signals value and write described first memory before the minimum operation voltage of described processor and store, and described critical voltage is greater than described minimum operation voltage.
14. computer system as claimed in claim 11, wherein if the input end of described processor does not receive described electric power regular supply signal yet, and described electric power supply voltage of signals value still is lower than described critical voltage, described processor is stored in described first memory with one second electric power supply fault-time and one second check code, and described second check code is to produce with described predetermined way computing fault-time by described second electric power supply.
15. computer system as claimed in claim 11 wherein after described processor reset, reads electric power supply fault-time corresponding to a predetermined check code from described first memory, and described electric power supply is write a second memory fault-time.
16. computer system as claimed in claim 11 wherein after described processor reset, writes described second memory release time with an electric power supply.
17. computer system as claimed in claim 16, wherein said electric power supply fault-time and described electric power supply produce according to a real-time clock release time.
18. computer system as claimed in claim 17, wherein said real-time clock is provided by an element of a subsystem in the described computer system, and described subsystem comprises a described processor and a south bridge circuit.
19. computer system as claimed in claim 11, wherein said electric power supply signal are standby power suppling signals.
20. computer system as claimed in claim 11, wherein said computer system also comprises a logical circuit, be used for producing described electric power regular supply signal, and the input end of described processor is connected in described logical circuit, is used for receiving described electric power regular supply signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02118818 CN1220944C (en) | 2002-04-29 | 2002-04-29 | Method of recording fault time of power supply for computer system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02118818 CN1220944C (en) | 2002-04-29 | 2002-04-29 | Method of recording fault time of power supply for computer system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1455335A true CN1455335A (en) | 2003-11-12 |
| CN1220944C CN1220944C (en) | 2005-09-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02118818 Expired - Lifetime CN1220944C (en) | 2002-04-29 | 2002-04-29 | Method of recording fault time of power supply for computer system |
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| CN (1) | CN1220944C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102841668A (en) * | 2011-06-24 | 2012-12-26 | 联想（新加坡）私人有限公司 | Electric power system for portable electronic device having a timekeeping circuit |
-
2002
- 2002-04-29 CN CN 02118818 patent/CN1220944C/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102841668A (en) * | 2011-06-24 | 2012-12-26 | 联想（新加坡）私人有限公司 | Electric power system for portable electronic device having a timekeeping circuit |
| US9229472B2 (en) | 2011-06-24 | 2016-01-05 | Lenovo (Singapore) Pte Ltd | Method for supplying electric power to a timekeeping circuit within a portable electronic device |
| CN102841668B (en) * | 2011-06-24 | 2016-08-17 | 联想（新加坡）私人有限公司 | Possesses the power system of the portable electric appts of timing circuit |
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| Publication number | Publication date |
|---|---|
| CN1220944C (en) | 2005-09-28 |
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Granted publication date: 20050928 |