CN1447513A - Single-phase bridge type inverter in high voltage frequency converter - Google Patents

Single-phase bridge type inverter in high voltage frequency converter Download PDF

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CN1447513A
CN1447513A CN 02109361 CN02109361A CN1447513A CN 1447513 A CN1447513 A CN 1447513A CN 02109361 CN02109361 CN 02109361 CN 02109361 A CN02109361 A CN 02109361A CN 1447513 A CN1447513 A CN 1447513A
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signal
pwm
circuit
output
reference voltage
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CN100385784C (en
Inventor
许希
李寅
楚子林
丁兆国
王建峰
孙敬华
丁庆振
周维来
王学才
齐德强
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Harbin Jiuzhou Electric Co Ltd
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Tianjin Electric Transmission Design And Research Institute
Harbin Jiuzhou Electric Co Ltd
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Abstract

An inverter using only one set of optical-to-electrical transducer with not high frequency and one optical fiber can transfer pwm signal rapidly with short time delay about 5-10 u s, providing the features of good performance of real time transmission, simple circuit, low cost and high reliability. The inventer includes following components: the pwn generation circuit 1, the pulse modulation circuit 2, the decomposition circuit 4 and two driving circuits 5 and 6. The amplitude U of the input reference voltage wave in the pwn generation circuit 1 is voltage signal. The outputs are the absolute value (1) of pwn and the polarity signal (2), which are transferred to the +pwm and -pwm signals. The pulse modulation circuit 2 sends the modulated signal to the demodulation circuit 3.

Description

Single-phase bridge type inverter in the high voltage converter
The invention belongs to electronic technology field, be used to produce the control signal of single-phase bridge control inverter.
The single-phase bridge type inverter that One's name is legion is arranged in the high voltage converter, they divide three groups of series connection to link the three-phase alternating voltage that makes the higher variable ratio frequency changer transformation of frequency converter output.In the past to each single-phase bridge type inverter, as Fig. 1, need two PWM generative circuits, produce two pwm signals, i.e. pwm signal 1 and pwm signal 2, these two signals by two channel transfers to single-phase bridge type inverter, by two drive circuits in the single-phase bridge type inverter, each drive circuit produces two grid pulses with interlocked relationship, amounts to four grid pulse signals, removes four IGBT pipe V1-V4 of control inverter.Because the high voltage converter output voltage is very high, controller will transmit with optical fiber to the pwm signal between inverter.For Fig. 1, each single-phase bridge type inverter needs two cover photoelectric switching circuit and two optical fiber.Complex circuit, reliability reduces.If as shown in Figure 2, adopt an optical fiber, transmit pwm signal with the mode of data communication, because the real-time to pwm signal requires very high, contain much information, the frequency characteristic of optical fiber communication equipment is had relatively high expectations, also must adopt measures such as signal passback and verification for improving reliability.Thereby it is higher to control complicated cost, and real-time is relatively poor.General signal transmission needs several milliseconds even longer.
The present invention seeks to disclose the single-phase bridge type inverter in a kind of high voltage converter, only need not high cover optical-electrical converter and the optical fiber of frequency of utilization characteristic, just can transmit pwm signal fast, it is very short to delay time, about 5-10us, and the transmission real-time is good, circuit is simple, and cost reduces, the reliability height.
Its composition of the present invention comprises a PWM generative circuit 1, and the amplitude U of input reference voltage ripple is that voltage signal and frequency and output frequency have the frequency signal of determining relation, an absolute value signal (1) and the polar signal (2) of a PWM of output.With polar signal with the PWM absolute value signal be divided into the time go up disconnected from each other+pwm signal and-pwm signal, a pulse modulated circuit 2, utilize digital circuit to carry out pulse modulation, the employing modulating frequency is that the doublet impulse of fc1 and fc2 is modulated, and superposition becomes a modulated pwm signal again.The modulated pwm signal is carried out demodulation by the demodulator circuit 3 that optical fiber is sent in the inverter, a decomposition circuit 4, utilize several triggers and gate circuit from+PWM and-decomposite the pwm signal 2 of the pwm signal 1 of control V1, V2 pipe and control V3, V4 pipe the pwm signal.Two drive circuits 5,6 produce grid pulse, remove four IGBT pipe V1-V4 of control inverter.
Wherein PWM generative circuit 1 adopts general reference voltage to compare with triangular carrier and produces the circuit of pwm signal, but both are absolute value, adopts reference voltage ripple absolute value to compare with the unipolarity isosceles triangle wave and produces the PWM absolute value signal.Voltage signal is the amplitude U of reference voltage ripple, and frequency signal is that frequency and output frequency have the pulse signal of determining relation.This pulse signal is added to as count pulse spends for one 0 to 360 degree cycle counters 7, produce the phase angle [alpha] of reference voltage ripple, be transformed to through an absolute value SIN function device 8 again | sin α |, through multiplier 9, after multiplying each other with U absolute value reference voltage ripple U|sin α |.Adopt any unipolarity isoceles triangle wave producer 10, produce one and determine frequency and unipolarity isosceles triangle wave highly.Two signals are compared at comparator 11 places, when reference voltage time output ' 1 ' more than or equal to the triangle wave number, otherwise are ' 0 '.PWM absolute value signal that Here it is (12).At comparator 13 places reference voltage phase of wave parallactic angle α is compared with 180 degree, draw reference voltage polar signal (14), voltage timing polarity ' 1 ' is ' 0 ' when negative.Described modulation circuit 2 utilizes the polar signal of reference voltage before modulation, with the PWM absolute value signal be divided into the time go up disconnected from each other+pwm signal and-pwm signal, the positive and negative half cycle of corresponding reference voltage utilizes digital circuit 16,19 to carry out pulse modulation respectively.The employing frequency is that the doublet impulse of fc1 and fc2 is modulated them, because two modulating waves separate in time, can directly superpose, and utilizes simple digital circuitry that their demodulation are come out after the transmission.Described demodulator circuit 3 utilize the identical monostable flipflop 21,23 of two pulse durations or 28,30 and gate circuit the modulated signal that receives is carried out demodulation.It is Tc1=1/ (2*fc1) that monostable triggers 21,23 pulsewidth, and 28,30 pulsewidth is Tc2=1/ (2*fc2), wherein fc1, fc2 be respectively+PWM and-frequency of modulation pulse of PWM.The output of two gate circuits respectively through decline delayer 25 or 32, rising delayer 26 or the 33 and second decline delayer 27 or 34 output+pwm signals and-pwm signal.Described decomposition circuit 4 utilize several triggers and gate circuit from+PWM and-decomposite the pwm signal 2 of the pwm signal 1 of control V1, V2 pipe and control V3, V4 pipe the pwm signal, produce four grid pulses through two drive circuits 5,6.
Fig. 1 is the electrical schematic diagram of prior art 1 of the present invention;
Fig. 2 is the electrical schematic diagram of prior art 2 of the present invention;
The electrical schematic diagram of Fig. 3 embodiment of the invention;
Fig. 4 is the electrical schematic diagram of PWM generative circuit among Fig. 3;
Fig. 5 is the electrical schematic diagram of pulse modulated circuit among Fig. 3;
Fig. 6 is the electrical schematic diagram of demodulator circuit among Fig. 3;
Fig. 7 is the electrical schematic diagram of decomposition circuit among Fig. 3;
Fig. 1 is the electrical schematic diagram of prior art 1 of the present invention, and two pwm circuits 1,2 are arranged, and to be voltage signal and frequency with output frequency have the amplitude U of input reference voltage ripple determines the frequency signal that concerns, exports two pwm signals 1,2.With 2 optical fiber pwm signal 1,2 is sent to 4 IGBT pipe V1-V4 that drive circuit 3,4 removes control inverter.
Fig. 2 is the electrical schematic diagram of prior art 2 of the present invention, and two pwm circuits 1,2 are arranged, and to be voltage signal and frequency with output frequency have the amplitude U of input reference voltage ripple determines the frequency signal that concerns, exports two pwm signals 1,2.A telecommunication circuit 3 is imported two pwm signals 1,2, by the communication control procedure of determining input information is formed to be suitable for the communication data of communicating by letter and transmitting, and is output as communication data.Be sent to a telecommunication circuit 4 through optical fiber, it be input as the communication data that receives, through handling two pwm signals 1,2 of output, remove 4 IGBT pipe V1-V4 of control inverter through drive circuit 5,6.
Fig. 3 is an electrical schematic diagram of the invention process, and a pwm circuit 1 is arranged, and the amplitude U of input reference voltage ripple is that voltage signal and frequency and output frequency have the frequency signal of determining relation, exports a PWM absolute value signal (1) and polar signal (2).A modulation circuit 2, its input signal (1) and (2), before modulation with polar signal (2) with PWM absolute value signal (1) be divided into the time go up disconnected from each other+pwm signal and-pwm signal.Utilizing digital circuit to carry out pulse modulation, is that the employing modulating frequency is the doublet impulse modulation of fc1 and fc2, and superposition becomes a modulated pwm signal and output again.Be sent to a demodulator circuit 3 through optical fiber, carry out demodulation, be output as+pwm signal (3) and-pwm signal (4).Adopt a decomposition circuit 4, utilize trigger and gate circuit from input+pwm signal and-decomposite the pwm signal 1 (5) of control V1, V2 pipe the pwm signal and control the pwm signal 2 (6) of V3, V4 pipe.They import two drive circuits 5,6 respectively, produce phased pulse and remove to control four IGBT pipe V1-V4.
Fig. 4 is the electrical schematic diagram of PWM generative circuit among Fig. 3, and comparing with triangular carrier for general reference voltage produces the circuit of pwm signal, but both are absolute value.Be input as frequency and the output frequency of 0-360 degree cycle counter 7 have the frequency signal of determining relation, by cycle count, and the phase angle [alpha] of output reference voltage ripple.Absolute value Sine Function Generator 8 be input as 7 output, through absolute calculation, output | sin α |.A voltage signal that is input as reference voltage wave amplitude U of multiplier 9, another is input as 8 output, and the two multiplies each other, output U|sin α |.Unipolarity isoceles triangle wave producer 10 is self-excited oscillators, and it is output as the isoceles triangle wave of oscillation of definite frequency of having of single positive polarity and amplitude.First of comparator 11 is input as 9 output, and second is input as 10 output, and it is output as PWM absolute value signal (12).When first input is imported more than or equal to second, be output as " 1 ", otherwise be " 0 ".First of comparator 13 is input as 7 output α, and second is input as 180 degree, is output as polar signal (14), when reference voltage is timing α≤180 degree, is output as " 1 ", and α when reference voltage is negative>180 degree is output as " 0 ".
Fig. 5 is the electrical schematic diagram of modulation circuit among Fig. 3, is input as PWM absolute value signal (12) with of door 15, and another is input as polar signal (14), by with computing, the signal+PWM of the positive half cycle of corresponding reference voltage in the output PWM absolute value signal (12).The triggering input of the pulse generator 16 that can trigger and the input that resets all are 15 output, and pulse frequency is fc1.Output pulse frequency is the spike train of fc1 under the effect of input, this is+and the modulated signal of pwm signal.Inverter 17 is with the anti-phase output of input signal (14).With door 18, the pulse generator that can trigger and 15,16 identical, but pulse frequency is fc2, and output pulse frequency is the spike train of fc2 under the effect of input, this is-and the modulated signal of pwm signal, output modulated pwm signal goes electrical to optical converter and optical fiber outwards to send behind the superposition.
Fig. 6 is the electrical schematic diagram of Fig. 3 intermediary demodulation circuit, utilizes two identical monostable flipflop and gate circuits of pulse duration that the modulated pwm signal that receives is carried out demodulation.The input of monostable flipflop 21 is the modulated pwm signals from optical fiber and optical-electrical converter, is output as the pulse that a series of width are Tc1.Reverser 22 is with 21 output anti-phase back output.The input of monostable flipflop 23 is 22 output.Under the trailing edge effect of 21 output pulses, rising edge of 22 outputs, width of 23 output is to be the pulse of Tc1 also.Set Tc1=1/2fc1 (fc1 is among Fig. 5+PWM modulating frequency).One of XOR gate 24 is input as the modulated pwm signal that receives, and another is input as 23 output.Whenever receive+during the modulated signal of pwm signal, 24 just continue output " 1 ", otherwise just have interruptions " 0 ", export.Decline delayer 25 be input as 24 output, utilize 25 little time-delay, make that when having in 24 outputs " 1 " when being interrupted of short duration " 0 " 25 export and still can be continuously " 1 ".Rising delayer 26 be input as 25 output, utilize its time-delay of rising, make and have only that (for example 3) 26 just have output when receiving a plurality of modulating pulse continuously.Decline delayer 27 be input as 26 output, utilize the time-delay that descends to compensate the pulse that is suppressed in 26, export demodulated+pwm signal, it with Fig. 5 in+pwm signal is identical, and minimum time-delay is only arranged.
28-34 is corresponding one by one with 21-27, acts on identical.But Tc2=1/2fc2 (fc2 is among Fig. 5-PWM modulating frequency) exports demodulated-pwm signal, it with Fig. 5 in-pwm signal is identical, and minimum time-delay is only arranged.
Fig. 7 is the electrical schematic diagram of decomposition circuit among Fig. 3, utilize several triggers and gate circuit from+PWM and-decomposite the pwm signal 2 of the pwm signal 1 of control V1, V2 pipe and control V3, V4 pipe the pwm signal.With door 35 be input as that demodulation is come out among Fig. 6+pwm signal and-pwm signal, export the two logic OR signal.The clock of d type flip flop 36 is input as 35 output, and its D input links to each other with the Q output.The Q end under the effect of clock input signal, constantly changes its state for its output.Reverser 37 is passed to 35 output after anti-phase the clock input of d type flip flop 38, and 38 D is input as 36 Q output, 38-be output as its Q end, the Q of output 36 end state information under the effect of clock input signal.The set input of S-R trigger-39 is+pwm signal that reset terminal is-pwm signal that its Q end output=" 1 " expression has received+pwm signal that output=" 1 " expression of Q end has been received-pwm signal.Or door two inputs of 40 are 36 and 38 Q output, a kind of state of the phased pulse of its output expression.With two inputs of door 41 also be 36 and 38 Q output, the another kind of state of its output expression grid pulse.With an input of door 42 be 40 output, another is input as 39 Q output, it is output as the pwm signal 1 that reference voltage is timing.With an input of door 43 be 41 output, another input is 39 Q output, the pwm signal 1 that it is output as reference voltage when being negative.With an input of door 45 be 41 output, another input is 39 Q output, it is output as the pwm signal 2 that reference voltage is timing.With an input of door 46 be 40 output, another input is 39 Q output, the pwm signal 2 that it is output as reference voltage when being negative.Or door two outputs of 44 are 42 and 43 output, and its output is pwm signal 1, is used to control V1, V2 pipe.Or door two inputs of 47 are 45 and 46 output, and its output is pwm signal 2, is used to control V3, the V4 pipe.
The present invention need only transmit pwm signal with regard to four IGBT devices in the real-time control inverter of energy with an optical fiber to each single-phase bridge type inverter, and less demanding to the frequency characteristic that transmits passage, it is good to have the control real-time simultaneously, and circuit is simple, cost is low, high reliability features.
The present invention can be applied to the various converter plants that contain a plurality of single-phase bridge type inverters, particularly controller and single-phase bridge type inverter distance is far away, contravarianter voltage is higher, inverter quantity big and real-time and the higher occasion of reliability requirement, for example high voltage converter of multiple unit overlapped in series to controlling.

Claims (2)

1. the single-phase bridge type inverter in the high voltage converter, it is characterized in that forming and comprise a PWM generative circuit 1, the amplitude U of input reference voltage ripple is that voltage signal and frequency and output frequency have the frequency signal of determining relation, absolute value signal 1 and a polar signal 2 of a PWM of output; With polar signal with the PWM absolute value signal be divided into the time go up disconnected from each other+pwm signal and-pwm signal, a pulse modulated circuit 2, utilize digital circuit to carry out pulse modulation, the employing modulating frequency is that the doublet impulse of fc1 and fc2 is modulated, and superposition becomes a modulated pwm signal again; The modulated pwm signal is carried out demodulation by the demodulator circuit 3 that optical fiber is sent in the inverter; A decomposition circuit 4, utilize several triggers and gate circuit from+PWM and-decomposite the pwm signal 2 of the pwm signal 1 of control V1, V2 pipe and control V3, V4 pipe the pwm signal.Two drive circuits 5,6 produce grid pulse, remove four IGBT pipe V1-V4 of control inverter.
2. the single-phase bridge type inverter in the high voltage converter as claimed in claim 1, feature is that wherein PWM generative circuit 1 adopts compare with the triangular carrier circuit of generation pwm signal of general reference voltage, but both are absolute value, adopt reference voltage ripple absolute value to compare with the unipolarity isosceles triangle wave and produce the PWM absolute value signal; Voltage signal is the amplitude U of reference voltage ripple, and frequency signal is that frequency and output frequency have the pulse signal of determining relation; This pulse signal is added to as count pulse spends for one 0 to 360 degree cycle counters 7, produce the phase angle [alpha] of reference voltage ripple, be transformed to through an absolute value SIN function device 8 again | sin α |, through multiplier 9, after multiplying each other with U absolute value reference voltage ripple U|sin α |; Adopt any unipolarity isoceles triangle wave producer 10, produce one and determine frequency and unipolarity isosceles triangle wave highly; Two signals are compared at comparator 11 places, when reference voltage time output ' 1 ' more than or equal to the triangle wave number, otherwise are ' 0 '.PWM absolute value signal that Here it is (12); At comparator 13 places reference voltage phase of wave parallactic angle α is compared with 180 degree, draw reference voltage polar signal 14, voltage timing polarity ' 1 ' is ' 0 ' when negative; Described modulation circuit 2 utilizes the polar signal of reference voltage before modulation, with the PWM absolute value signal be divided into the time go up disconnected from each other+pwm signal and-pwm signal, the positive and negative half cycle of corresponding reference voltage utilizes digital circuit 16,19 to carry out pulse modulation respectively; The employing frequency is that the doublet impulse of fc1 and fc2 is modulated them, because two modulating waves separate in time, can directly superpose, and utilizes simple digital circuitry that their demodulation are come out after the transmission; Described demodulator circuit 3 utilize the identical monostable flipflop 21,23 of two pulse durations or 28,30 and gate circuit the modulated signal that receives is carried out demodulation; It is Tc1=1/ (2*fc1) that monostable triggers 21,23 pulsewidth, and 28,30 pulsewidth is Tc2=1/ (2*fc2), wherein fc1, fc2 be respectively+PWM and-frequency of modulation pulse of PWM.The output of two gate circuits respectively through decline delayer 25 or 32, rising delayer 26 or the 33 and second decline delayer 27 or 34 output+pwm signals and-pwm signal; Described decomposition circuit 4 utilize several triggers and gate circuit from+PWM and-decomposite the pwm signal 2 of the pwm signal 1 of control V1, V2 pipe and control V3, V4 pipe the pwm signal, produce four grid pulses through two drive circuits 5,6.
CNB02109361XA 2002-03-25 2002-03-25 Single-phase bridge type inverter in high voltage frequency converter Expired - Fee Related CN100385784C (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102118101A (en) * 2011-01-14 2011-07-06 中国电力科学研究院 Dead zone control combined communication method for trigger signals of flexible DC converter
CN101478225B (en) * 2008-12-19 2012-11-07 中国电力科学研究院 Communication method by using series connection valve triggering signal of high voltage electric and electronic device
CN103916034A (en) * 2013-01-07 2014-07-09 永济新时速电机电器有限责任公司 Power inverting module
CN104218779A (en) * 2014-08-26 2014-12-17 河海大学 Serially-connected IGBT gate electrode drive unit synchronizing method and system based on Raman laser amplifier
CN105471234A (en) * 2015-12-16 2016-04-06 山西惠特科技有限公司 Optical fiber signal conversion circuit for 3,300V high-power IGBT driver
CN104670043B (en) * 2013-11-28 2017-02-15 中车大连电力牵引研发中心有限公司 Traction motor modulating method and traction motor modulating device

Family Cites Families (3)

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CN2047428U (en) * 1989-04-08 1989-11-08 薛恩霖 Traffic signal instrument for initiative alarming
US6069808A (en) * 1997-05-21 2000-05-30 Texas Instruments Incorporated Symmetrical space vector PWM DC-AC converter controller
JPH11136948A (en) * 1997-10-27 1999-05-21 Toyo Electric Mfg Co Ltd Switching signal-outputting device of pwm converter

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101478225B (en) * 2008-12-19 2012-11-07 中国电力科学研究院 Communication method by using series connection valve triggering signal of high voltage electric and electronic device
CN102118101A (en) * 2011-01-14 2011-07-06 中国电力科学研究院 Dead zone control combined communication method for trigger signals of flexible DC converter
CN102118101B (en) * 2011-01-14 2014-03-12 中国电力科学研究院 Dead zone control combined communication method for trigger signals of flexible DC converter
CN103916034A (en) * 2013-01-07 2014-07-09 永济新时速电机电器有限责任公司 Power inverting module
CN103916034B (en) * 2013-01-07 2016-08-10 永济新时速电机电器有限责任公司 Inverted power module
CN104670043B (en) * 2013-11-28 2017-02-15 中车大连电力牵引研发中心有限公司 Traction motor modulating method and traction motor modulating device
CN104218779A (en) * 2014-08-26 2014-12-17 河海大学 Serially-connected IGBT gate electrode drive unit synchronizing method and system based on Raman laser amplifier
CN105471234A (en) * 2015-12-16 2016-04-06 山西惠特科技有限公司 Optical fiber signal conversion circuit for 3,300V high-power IGBT driver
CN105471234B (en) * 2015-12-16 2018-02-23 山西惠特科技有限公司 Fiber-optic signal change-over circuit for the driving of 3300V high-power IGBTs

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