CN1428818A - Method for making ceramic base plate form flat surface by using porous material - Google Patents
Method for making ceramic base plate form flat surface by using porous material Download PDFInfo
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- CN1428818A CN1428818A CN 01138678 CN01138678A CN1428818A CN 1428818 A CN1428818 A CN 1428818A CN 01138678 CN01138678 CN 01138678 CN 01138678 A CN01138678 A CN 01138678A CN 1428818 A CN1428818 A CN 1428818A
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Abstract
The present invention relates to a method for flattening ceramic base plate surface by utilizing porous material and is aimed at meeting the requirements for subsequent film layer cohesion. It can be used in the structure of base plate, buffer layer and porous nano structure layer, etc. and can provide required flat surface for making film in the porous nano structure layer, and the characteristics required for subsequent metallation and adhesive force of electronic material, heat conduction, electric insulation, dielectric and other integrated electronic elements. The buffer layer is used for providing connection of base plate and porous nano structure layer, and the ceramic base plate can be used for providing structure strength and surface fixation.
Description
Technical field
The present invention relates to a kind of method of utilizing porous material to realize the ceramic base plate surface planarization,, especially can be applicable to the planarization of base material in present electronic information communication, photoelectricity, the display industry to satisfy the requirement that subsequent film adhesive force is provided.
Background technology
In present thin-film component processing procedure, the requirement of surface flatness is quite important, is the manufacturing industry of base material with wafer or glass especially, and the processing of substrate surface planarization need be paid suitable cost; In addition, the planarization of metallization module in the integrated circuit manufacture process also is the key that element is made success or not.
At present, processing method about flattening surface, general mechanical milling method, chemical mechanical milling method (the chemical mechanical polishing of adopting, CMP), the high temperature density current of chemical method for etching, boron-phosphorosilicate glass (BPSG) or spin-on glasses method (SOG), utilize surface flatness or adhesion of thin film (adhesion) after these modes are handled that certain limitation is all arranged, and processing procedure complexity, manufacturing cost are too high, Figure 1 shows that prior art flattening method comparison sheet.
Summary of the invention
Main purpose of the present invention, be to solve above-mentioned defective, avoid the existence of defective, the invention provides a kind of method of utilizing porous material to realize the ceramic base plate surface planarization, to satisfy the requirement that subsequent film adhesive force is provided, utilize porous material to impel the ceramic base plate surface planarization and promote the adhesive force of rete, simplify existing planarization processing procedure, reduce manufacturing cost.
For realizing above-mentioned purpose, a kind of method of utilizing porous material to realize the ceramic base plate surface planarization provided by the invention, form a resilient coating 20 and a porous nanometer structure layer 10 in regular turn in a substrate 30, this porous nanometer structure layer 10 provides the required smooth surperficial and required pinning effect of following of thin film manufacture process technology, adhesive force and heat conduction, electric insulation, dielectric and the required characteristic of other integration electronic component to meet follow-up metallization and electronic material.
Description of drawings
Fig. 1 is a prior art flattening method comparison sheet.
Fig. 2 is the structural representation of porous nanometer structure of the present invention to substrate planarization mechanism.
Fig. 3 is the collection of illustrative plates that the X-x-ray diffraction observation post of the embodiment of the invention one gets.
Fig. 4 is the sem observation photo of the embodiment of the invention one.
Fig. 5 is the result of the surface measurements flatness gained of the embodiment of the invention one.
Fig. 6-1 is the adhesive force resolution chart of the embodiment of the invention one, is illustrated in the planarization substrate and plates 6.5 μ m aluminium films and etch the aluminum steel schematic diagram with the light shield etching mode.
Fig. 6-2 is the optics picture that plates 6.5 μ m aluminium films on the embodiment of the invention one planarization substrate and etch aluminum steel with the light shield etching mode.
The electric characteristics figure of Fig. 7-1 diode of on flat substrate, making for the embodiment of the invention one.
Fig. 7-2 is that the embodiment of the invention one is made the integrated circuit schematic diagram on flat substrate.
Embodiment
The invention provides a kind of method of utilizing porous material to realize the ceramic base plate surface planarization, be on substrate 30, to form a resilient coating 20 and a porous nanometer structure layer 10 in regular turn, utilize porous material to realize the requirement of ceramic base plate surface planarization with coupling subsequent film adhesive force, wherein porous nanometer structure layer 10 provides the thin film manufacture process technology required smooth surface and the required pinning effect of following, with adhesive force and the heat conduction that meets follow-up metallization and electronic material, electric insulation, dielectric and other are integrated the required characteristic of electronic component, its material is selected from zeolite, the class zeolite, mesoporous material, the group that porous materials such as mesoporous multiple material are formed, or formed by at least a above material in this group.Resilient coating 20 provide substrate 30 and porous nanometer structure layer 10 then, its material is selected from the group that glaze, glass, pottery, mesoporous material, mesoporous multiple material are formed, or is made up of wherein at least a above material of this group; Substrate 30 provides structural strength and surperficial set, and resilient coating 20 can with porous nanometer structure layer 10 by being constituted with one deck or by multilayer.
The method of utilizing porous material to realize the ceramic base plate surface planarization of the present invention is to utilize control porous nanometer structure layer 10 structure to provide substrate to have heat conduction, electric insulation, dielectric and other to integrate the required characteristic of electronic component and can be applicable to low-temp ceramics and burn any integrated component substrates that combine such as (LTCC), chip carrier, passive device, active member, light-emitting component, light passive device and light active member altogether.
Now concrete technology of the present invention is divided into three aspects such as flatness, adhesion strength and exploitativeness, conjunction with figs. is described as follows.
Embodiment one: the flatness test
Be illustrated in figure 2 as the structural representation of porous nanometer structure of the present invention to substrate planarization mechanism, can form a resilient coating 20 and a porous nanometer structure layer 10 on a substrate 30 in regular turn, substrate 30 is that aluminium oxide material, resilient coating 20 are the class zeolite for glaze, porous nanometer structure layer 10.The collection of illustrative plates that Fig. 3 gets with X-x-ray diffraction (XRD) observation post for present embodiment, wherein the crest of X-x-ray diffraction collection of illustrative plates is caused from forming the structural cycle arrangement by the class zeolite.As shown in Figure 4, the photo that gets with sweep electron microscope (SEM) observation post for present embodiment, but clear view is to the structure of this substrate 30, resilient coating 20 and porous nanometer structure layer 10 after sweep electron microscope amplifies, Fig. 5 then is the result of surface measurements flatness gained, the maximum drop amount of curve in its collection of illustrative plates (curve) dipping and heaving is shown in the collection of illustrative plates, this measurement result confirmation the present invention surface flatness that planarization has a dust () size level to substrate surface.
Embodiment two: the absorption affinity test
Be depicted as the adhesive force resolution chart of the embodiment of the invention one as Fig. 6-1, being illustrated in the planarization substrate plates 6.5 μ m aluminium films and etches the aluminum steel schematic diagram with the light shield etching mode, and Fig. 6-2 etches the optics picture of aluminum steel for plating 6.5 μ m aluminium films on the planarization substrate of present embodiment and with the light shield etching mode, shows that by α-step measurement result this sample had both made the aluminium thickness reach 6.5 μ m and still had splendid adhesive force.
Embodiment three: the exploitativeness test
Be depicted as the electric characteristics figure of the diode that the embodiment of the invention makes on flat substrate as Fig. 7-1, Fig. 7-2 is that the embodiment of the invention is made RLCD integrated circuit schematic diagram on flat substrate, be presented at can make on the planarization substrate and have diode (diode) and RLCD integrated circuit, the substrate after the planarization of confirmation present embodiment possesses exploitativeness.
The present invention discloses and has described selected preferred embodiment especially, can not limit scope of the invention process with it, be that all persons skilled in the art all can understand, do variation possible on any form or the details according to the present patent application claim, all do not break away from spirit and scope that patent of the present invention contains.
Claims (11)
1. a method of utilizing porous material to realize the ceramic base plate surface planarization is characterized in that: form a resilient coating 20 and a porous nanometer structure layer 10 in regular turn on this substrate 30.
2. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, wherein, these porous nanometer structure layer 10 materials can be zeolite, class zeolite, mesoporous material, mesoporous multiple material.
3. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, wherein, these resilient coating 20 materials can be selected from glaze, glass, pottery, mesoporous material, mesoporous multiple material, and this resilient coating 20 can with porous nanometer structure layer 10 by being constituted with one deck or by multilayer.
4. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, it is characterized in that: utilize control porous nanometer structure layer structure, provide substrate to have the substrate of the required characteristic of heat conduction, electric insulation, dielectric and other integration electronic component as resistance (R), inductance (L), electric capacity passive devices such as (C) and integrated passive device thereof.
5. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, it is characterized in that: utilize control porous nanometer structure layer 10 structure, provide substrate to have heat conduction, electric insulation, dielectric and other and integrate the substrate of the required characteristic of electronic component as active member such as transistor, diode, memory element and integrated active member thereof.
6. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, it is characterized in that: utilize control porous nanometer structure layer 10 structure, provide substrate to have the substrate of the required characteristic of heat conduction, electric insulation, dielectric and other integration electronic component as laser diode (laser diode), light-emitting diode (LED), field emission source light-emitting components such as (Field Emitter).
7. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, it is characterized in that: utilize control porous nanometer structure layer 10 structure, provide substrate to have heat conduction, electric insulation, dielectric and other and integrate the substrate of the required characteristic of electronic component as light passive device such as fiber waveguide, photodetector and integrated smooth passive device thereof.
8. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, it is characterized in that: utilize control porous nanometer structure layer 10 structure, provide substrate to have heat conduction, electric insulation, dielectric and other and integrate the substrate of the required characteristic of electronic component as light active member such as image intensifer, optical switch, light adjusting and integrated smooth active member thereof.
9. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, it is characterized in that: utilize control porous nanometer structure layer 10 structure, provide substrate to have heat conduction, electric insulation, dielectric and the required characteristic of other integration electronic component are integrated the one-tenth integrated component that forms as any combinations such as claim 4 to 8 a described passive device, active member, light-emitting component, light passive device and light active members substrate.
10. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, it is characterized in that: utilize control porous nanometer structure layer 10 structure, provide substrate to have the required characteristic of heat conduction, electric insulation, dielectric and other integration electronic component as chip carrier (Chip-Carrier) and claim 4 to 9 arbitrary integration.
11. the method for utilizing porous material to realize the ceramic base plate surface planarization according to claim 1, it is characterized in that: utilize control porous nanometer structure layer 10 structure, providing substrate to have heat conduction, electric insulation, dielectric and other integrates the required characteristic of electronic component and burns altogether above (LTCC) at low-temp ceramics and carry out, can with claim 4 to 10 arbitrary integration, according to this to set up thick film thin film manufacture process integration technology.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01138678 CN1196174C (en) | 2001-12-28 | 2001-12-28 | Method for making ceramic base plate form flat surface by using porous material |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01138678 CN1196174C (en) | 2001-12-28 | 2001-12-28 | Method for making ceramic base plate form flat surface by using porous material |
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| Publication Number | Publication Date |
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| CN1428818A true CN1428818A (en) | 2003-07-09 |
| CN1196174C CN1196174C (en) | 2005-04-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 01138678 Expired - Lifetime CN1196174C (en) | 2001-12-28 | 2001-12-28 | Method for making ceramic base plate form flat surface by using porous material |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102980159A (en) * | 2012-11-14 | 2013-03-20 | 深圳大学 | Heat dissipation device and manufacture method thereof and light-emitting diode (LED) light source provided with the same |
| CN105753512A (en) * | 2016-02-26 | 2016-07-13 | 电子科技大学 | Ceramic substrate planarization manufacturing method |
-
2001
- 2001-12-28 CN CN 01138678 patent/CN1196174C/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102980159A (en) * | 2012-11-14 | 2013-03-20 | 深圳大学 | Heat dissipation device and manufacture method thereof and light-emitting diode (LED) light source provided with the same |
| CN102980159B (en) * | 2012-11-14 | 2016-05-18 | 深圳大学 | The manufacture method of heat abstractor, heat abstractor and there is the LED light source of this heat abstractor |
| CN105753512A (en) * | 2016-02-26 | 2016-07-13 | 电子科技大学 | Ceramic substrate planarization manufacturing method |
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| Publication number | Publication date |
|---|---|
| CN1196174C (en) | 2005-04-06 |
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Granted publication date: 20050406 |