CN1409575A - Vocoder system using multiple port routing to communicate and its business frame exchanging method - Google Patents
Vocoder system using multiple port routing to communicate and its business frame exchanging method Download PDFInfo
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- CN1409575A CN1409575A CN 01126959 CN01126959A CN1409575A CN 1409575 A CN1409575 A CN 1409575A CN 01126959 CN01126959 CN 01126959 CN 01126959 A CN01126959 A CN 01126959A CN 1409575 A CN1409575 A CN 1409575A
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Abstract
This invention discloses a vocoder system with multiinterface route communication and its service frame exchange method. A host control CPU used in receiving service frame of the base station writes in the multiinterfce route communication unit and sends its service frame to the base station which receives global positioning system synchronous clock from a clock receiving units and is used to store service frame; n number of digital signal processors (DSP) receive and send the service frame according to the interrupted signals of to receive and send service frame and receive synchronous clock of global positioning system from; EI interface connecting with the mobile exchange center; clock receiving unit and clock receiving unit extracting EL interface.
Description
Technical field
The present invention relates to vocoder system, specifically, relate to the vocoder system and the business frame exchanging method thereof that adopt multiple port routing to communicate.
Background technology
Vocoder system provides the conversion of 64KBPS (Bit Per Second) PCM sign indicating number (Pulse CodeModulation) with the base station voice signal, the i.e. Code And Decode of voice.The Code And Decode of voice is mainly finished by digital signal processor (Digital Signal Processor), needs a master cpu (Central Processing Unit) to carry out the management and the transmission of control traffic frame of vocoder simultaneously.In real system, a digital signal processor can be realized a plurality of vocoder unit by time division multiplexing, also therefore causes the complicated of management and traffic frame transmission.In U.S. Pat 5, a kind of vocoder system and method are provided in 724,610, and its system comprises: a pair of first processor, by selector channel between mobile switching centre and CIS (CDMA interconnect system), control the communication of traffic frame with CIS; Double port memory is preserved traffic frame by first processor control, and can be conducted interviews by direct memory access (Direct Memory Access) controller; Second processor is used to control dma controller; Selector/vocoder module is connected between E1 interface and the double port memory, is used to receive the traffic frame through after the Digital Signal Processing; And with E1 interface and the clock receiving element of MSC.The employed method of system is: first processor is read the traffic frame of double port memory, sends to CIS; Perhaps the traffic frame with the CIS that receives writes double port memory.Second processor control dma controller, transport service frame between the FIFO of double port memory and vocoder (First-In First-Out) memory, interrupt receiving and sending traffic frame to digital signal processor by sending and receiving, interrupt signal is produced at precise time by interrupt control unit.
In this patent, system has used the first processor and second processor, the pattern that adopts two-stage to transmit, and system coordination work is difficulty relatively, complex structure; Simultaneously, the number of times that traffic frame is transmitted is more, has increased the transmission delay of system; Fifo structure is adopted in traffic frame transmission at digital signal processor, has status register and control fifo register, has strengthened the complexity of communicating by letter with digital signal processor; In addition, the double port memory both sides visit easy generation conflict, cause the transmission error in data.
Summary of the invention
In order to solve the deficiencies in the prior art, the invention provides two kinds of technical solutions, vocoder system in each scheme all adopts a master cpu, between master cpu and digital signal processor, adopt the multiple port routing to communicate unit, reduce the complexity of system, reduced the traffic frame transmission delay; Simultaneously, take measures to avoid between master cpu and DSP, to carry out traffic frame when exchange, simultaneously a certain unit of access service frame switching device and the conflict that produces.
The present invention also respectively provides a kind of method of traffic frame exchange at each vocoder scheme.
In order to finish the invention task, vocoder system of the present invention comprises: master cpu, be used to receive the service in base station frame, write the multiple port routing to communicate unit, and the traffic frame of multiple port routing to communicate unit sent to the base station, and receive the global positioning system synchronised clock of self-clock receiving element 1; The multiple port routing to communicate unit is used for the storage service frame; N digital signal processor, according to the interrupt signal reception and the transmission traffic frame of multiple port routing to communicate unit, and reception comes the global positioning system synchronised clock of self-clock receiving element 1; The E1 interface that links to each other with mobile switching centre; Clock receiving element 1; And the clock receiving element 2 that extracts the E1 interface clock.
Multiple port routing to communicate unit in the described vocoder system comprises: n master cpu transmission/DSP receives formation and n master cpu reception/DSP transmit queue, the port in the left side of formation is connected to master cpu by address bus and data/address bus, also link to each other simultaneously with interrupt generating unit, status register, the right side port is connected to DSP by address bus and data/address bus, and links to each other with the right side of interrupt generating unit; Interrupt generating unit, left side interrupt signal of output is connected to the interruption input of master cpu, there is n interrupt signal output on the right side, and each interrupt signal output connects the interruption input of corresponding DSP, and described interrupt generating unit also links to each other with status register simultaneously; Status register is used to indicate the position that produces the DSP that interrupts.
The treatment step of the method for CDMA vocoder system principal and subordinate processor exchanges data of the present invention is as follows: master cpu receives traffic frame by the interface with the base station, traffic frame is write the multiple port routing to communicate unit, generating unit is interrupted in visit, interrupt the digital signal corresponding processor, digital signal processor reads traffic frame, consign in the vocoder unit that this digital signal processor realizes by time division multiplexing pairing one, the traffic frame of this vocoder unit writes the multiple port routing to communicate unit by digital signal processor, generating unit is interrupted in visit, interrupt master cpu, master cpu receives traffic frame, sends to the base station.
Vocoder system of the present invention can also be realized like this, system comprises: master cpu, receive the service in base station frame, write the transmitting element of multiple port routing to communicate unit, and the traffic frame of multiple port routing to communicate unit receiving element sent to the base station, and receive the global positioning system synchronised clock of self-clock receiving element 1; The multiple port routing to communicate unit is used for the storage service frame, and receives the global positioning system synchronised clock of self-clock receiving element 1; N digital signal processor, according to the interrupt signal reception and the transmission traffic frame of multiple port routing to communicate unit, and reception comes the global positioning system synchronised clock of self-clock receiving element 1; The E1 interface that links to each other with mobile switching centre; The clock receiving element 1 of synchronous master cpu, digital signal processor and multiple port routing to communicate unit; And the clock receiving element 2 that extracts the E1 interface clock.
Multiple port routing to communicate unit in the described vocoder system comprises: n master cpu transmission/DSP receives formation and n master cpu reception/DSP transmit queue, the left side port of formation is connected to master cpu by address bus and data/address bus, the right side port is connected to DSP by address bus and data/address bus, and described formation simultaneously is also connected to interrupt generating unit; Interrupt generating unit, reception comes the timing signal of self-clock receiving element 1, produces regularly according to this signal and interrupts, and offers master cpu and each DSP respectively.
The treatment step of the method for CDMA vocoder system principal and subordinate processor exchanges data of the present invention is as follows: master cpu receives traffic frame by the interface with the base station, when specific timing is interrupted arriving, traffic frame is write the multiple port routing to communicate unit, digital signal processor reads traffic frame when specific timing is interrupted arriving, consign in the vocoder unit that this digital signal processor realizes by time division multiplexing pairing one, the traffic frame of this vocoder unit writes the multiple port routing to communicate unit by digital signal processor when specific timing is interrupted arriving, master cpu reads the multiport communication unit when specific timing is interrupted arriving, receive traffic frame, send to the base station.
Compared with prior art, system and method for the present invention, whole exchanges data flow process is serial, can avoid the access conflict of memory; In addition, only use the one-level formation to transmit traffic frame, improved transmission speed, reduced transmission delay; Reduce the software and hardware complexity of system, reduced cost; Can increase the number of digital signal processor and individual digit signal processor flexibly realizes the number of vocoder unit helping the unification of system architecture under the different digital signal processor situation by time division multiplexing.
Description of drawings
Fig. 1 is patent US5, the vocoder system of describing in 724,610;
Fig. 2 .1 is a kind of vocoder system schematic diagram that adopts the multiple port routing to communicate unit that the present invention proposes;
Fig. 2 .2 is the vocoder system schematic diagram that the another kind that proposes of the present invention adopts the multiple port routing to communicate unit;
Fig. 3 .1 is the concrete structure schematic diagram of the multiple port routing to communicate unit among Fig. 2 .1;
Fig. 3 .2 is the concrete structure schematic diagram of the multiple port routing to communicate unit among Fig. 2 .2.
Embodiment
Be described in further detail below in conjunction with the enforcement of accompanying drawing technical scheme:
As shown in Figure 1, patent US5,724,610 vocoder systems of describing comprise a pair of first processor 102 and second processor 106, selector/vocoder 105, direct memory access controller 104, double port memory 103, interface with mobile switching centre 108---E1 interface 107 reaches two clock receiving elements 101 and 109.As can be seen, this system has used three, has increased the complexity of system works, and causes access conflict easily.
In order to solve the deficiencies in the prior art, the present invention proposes two kinds of vocoder systems, respectively shown in Fig. 2 .1 and Fig. 2 .2.It is similar that the hardware of these two kinds of vocoders constitutes, and all comprises master cpu, clock receiving element 1 and 2, multiple port routing to communicate unit, a n digital signal processor (DSP) and E1 interface.Difference is: the vocoder system of first kind of scheme, the global positioning system synchronised clock of clock receiving element 1 (202 among Fig. 2 .1) send to master cpu 201 and each DSP204; And in second kind of scheme, the global positioning system synchronised clock of clock receiving element 1 (202 ' among Fig. 2 .2) not only sends to master cpu 201 and each DSP204, also sends to multiple port routing to communicate unit 203 '.These two schemes can both solve the collision problem that above-mentioned master cpu and DSP reference to storage are visited simultaneously, the multiple port routing to communicate unit is as the media of master cpu and digital signal processor reciprocal exchange of business frame, the traffic frame of carrying vocoder specifies the multiple port routing to communicate unit below in conjunction with Fig. 3 .1 and Fig. 3 .2 and how to address this problem.
In Fig. 3 .1, multiport route communication unit 203 mainly comprises: n master cpu transmit queue/DSP receives formation and n master cpu reception formation/DSP transmit queue 301, interrupt generating unit 302, status register 303.In the present invention, formation can be go in ring formation, linear formation or First Input First Output.The left side port of formation is connected to master cpu, right side port and interrupt signal 1 that master cpu transmit queue/DSP receives formation 1 and master cpu reception formation/DSP transmit queue 1 are connected to digital signal processor 1, right output port and interrupt signal 2 that master cpu transmit queue/DSP receives formation 2 and master cpu reception formation/DSP transmit queue 2 are connected to digital signal processor 2, and the like.Master cpu can be visited all formations like this, and digital signal processor is only to visit corresponding formation.
And in Fig. 3 .2, multiple port routing to communicate unit 203 ' mainly comprises: n master cpu transmit queue/DSP receives formation and n master cpu reception formation/DSP transmit queue 301 ' and interrupt generating unit 302 '.Formation 301 ' is connected situation with first kind of scheme with the signal of master cpu, DSP.Both differences are that the clock that clock receiving element 1 (202 ') is given multiple port routing to communicate unit 203 ' is to give interrupt generating unit 302 '.
In above-mentioned two kinds of schemes, the work in series mechanism that interrupt generating unit provides makes master cpu can avoid producing conflict in different time access queue with digital signal processor.In Fig. 3 .1, what interrupt generating unit 302 adopted is handshake mechanism, and visit interrupt generating unit 301 produces interruption pulse signal (pulse length need be determined by processor), and the left side provides an interrupt signal, and the right side provides n interrupt signal.To pass through left side port access, (bit) of right side port corresponding states register 303 represent whether visited interrupt generating unit 302, but do not know only by the left side port for status register 303; Read states register 303 clearing cells are then removed status register., after formation 301 writes traffic frame, visit corresponding interrupt generating unit 302 and produce interrupt signals and interrupt the other side in master cpu 201 or vocoder unit, remind the other side to read traffic frame in the formation.
In Fig. 3 .2, what interrupt generating unit adopted is timing mechanism, produce m fixed intervals pulse signal and give digital signal processor 204 ', the time interval is the 1/m (is the 20/m millisecond for code division multiple access system) of each frame duration, just each vocoder unit on each digital signal processor 204 ' has a timing signal, and then the corresponding vocoder unit of the time interval between two commutator pulses is read or write queue 301 '.Timing signal at master cpu 201 ' can be m, the time interval is the 1/m (is the 20/m millisecond for code division multiple access system) of each frame duration, in time interval between two commutator pulses then master cpu 201 ' read or write clock pulse corresponding queues 301 ', commutator pulse also can be m*n, the time interval is 1/ (m*n) (is 20/ (m*n) millisecond for code division multiple access system) of each frame duration, each time interval is read corresponding formation 301 ', that is to say that each time interval can read the traffic frame of a vocoder unit.Mixed a principle at the branch in the time interval, guarantee master cpu 201 ' and digital signal processor 204 ' work in series, do not visit the same unit of same formation 301 ' simultaneously, that is to say that some vocoder unit or master cpu 201 ' write formation 301 ' and could access queue 301 ' through the other side after the time of a safety to traffic frame.This safe time interval is the time decision of access queue by both party, and the principle of selection is to avoid producing access conflict.
A digital signal processor can be realized a plurality of vocoder unit by time division multiplexing, and therefore corresponding transmit queue and reception formation should be satisfied each vocoder unit buffer memory one frame traffic frame at least, just need buffer memory m frame traffic frame at least.First byte of each traffic frame is the length of this traffic frame, and simultaneously for the indication current queue is full of sign not, length is that 0 expression formation is for empty.Second byte is routing address (Route Address) RA, the position of indication vocoder unit.Routing address RA is with vocoder element number correspondence, the vocoder unit routing address RA on each digital signal processor, and span is 0 to m-1, represents the numbering of vocoder on the digital signal processor.In addition, the present invention introduces the notion of a routing address: digital signal processor is numbered, is called digital signal processor number (DSP No.) DN, then the span of DN is 0 to n-1.All vocoder unit under the same master cpu control are numbered, be called vocoder unit address (Vocoder Address) VA, n digital signal processor arranged, each digital signal processor is realized m vocoder unit, VA=m*DN+RA then, the span of VA is 0 to (m*n-1).The vocoder unit that each traffic frame is corresponding certain during Route Selection, calculates DN and RA or obtains VA by DN and RA by VA, and decision will write or read the routing address of digital signal processor and traffic frame under the formation of traffic frame.When master cpu receives the traffic frame of vocoder, the transmit queue that master cpu reads digital signal processor obtains traffic frame, can obtain routing address RA, digital signal processor DN by digital signal processor under the formation then can calculate vocoder address VA, and the corresponding relation of VA and base station is determined the destination address that traffic frame sends when being called out by foundation; Equally, receive traffic frame vocoder will be sent to the time for master cpu, calculate digital signal processor DN and routing address RA by VA, traffic frame is sent to digital signal processor number be the digital signal processor corresponding queues of DN, digital signal processor sends to the vocoder unit that routing address is RA to traffic frame again.
Claims (6)
1, adopt the vocoder system of multiple port routing to communicate unit, it is characterized in that mainly comprising:
Master cpu (201), be used to receive the service in base station frame, write multiple port routing to communicate unit (203), and the traffic frame of multiple port routing to communicate unit (203) is sent to the base station, receive the global positioning system synchronised clock of self-clock receiving element 1 (202); Multiple port routing to communicate unit (203) is used for the storage service frame; N digital signal processor (DSP) (204), according to the interrupt signal reception and the transmission traffic frame of multiple port routing to communicate unit (203), and reception comes the global positioning system synchronised clock of self-clock receiving element 1 (202); The E1 interface (205) that links to each other with mobile switching centre; Clock receiving element 1 (202); And the clock receiving element 2 (206) that extracts E1 interface (205) clock.
2, vocoder system as claimed in claim 1, it is characterized in that described multiple port routing to communicate unit (203) comprises that n master cpu transmission/DSP receives formation and n master cpu reception/DSP transmit queue (301), the port in the left side of formation (301) is connected to master cpu (201) by address bus and data/address bus, also link to each other simultaneously with interrupt generating unit (302), status register (303), the right side port is connected to DSP (204) by address bus and data/address bus, and links to each other with the right side of interrupt generating unit (302); Interrupt generating unit (302), left side interrupt signal of output is connected to the interruption input of master cpu (201), there is n interrupt signal output on the right side, each interrupt signal output connects the interruption input of corresponding DSP (204), simultaneously, described interrupt generating unit (302) also links to each other with status register; Status register (303) is used to indicate the position that produces the DSP (204) that interrupts.
3, adopt the vocoder system of multiple port routing to communicate unit, it is characterized in that mainly comprising: master cpu (201 '), receive the service in base station frame, write multiple port routing to communicate unit (203 '), and the traffic frame of multiple port routing to communicate unit (203 ') sent to the base station, receive the global positioning system synchronised clock of self-clock receiving element 1 (202 '); Multiple port routing to communicate unit (203 ') is used for the storage service frame, and receives the global positioning system synchronised clock of self-clock receiving element 1 (202 '); N digital signal processor (DSP) (204 '), according to the interrupt signal reception and the transmission traffic frame of multiple port routing to communicate unit (203 '), and reception comes the global positioning system synchronised clock of self-clock receiving element 1 (202 '); The E1 interface (205 ') that links to each other with mobile switching centre; Clock receiving element 1 (202 '); And the clock receiving element 2 (206 ') that extracts the E1 interface clock.
4, vocoder system as claimed in claim 3, it is characterized in that described multiple port routing to communicate unit (203 ') comprising: n master cpu transmission/DSP receives formation and n master cpu reception/DSP transmit queue (301 '), the left side port of formation is connected to master cpu (201 ') by address bus and data/address bus, the right side port is connected to DSP (204 ') by address bus and data/address bus, and described formation simultaneously is also connected to interrupt generating unit (302 '); Interrupt generating unit (302 '), reception comes the timing signal of self-clock receiving element 1 (202 '), produces regularly according to this signal and interrupts, and offers master cpu (201 ') and each DSP (204 ') respectively.
5, the method of the traffic frame exchange of vocoder system according to claim 1 and 2, it is characterized in that comprising: master cpu (201) receives traffic frame by the interface with the base station, traffic frame is write multiple port routing to communicate unit (203), generating unit (302) is interrupted in visit, interrupt corresponding digital signal processor (204), digital signal processor (204) reads traffic frame, consign in the vocoder unit that this digital signal processor realizes by time division multiplexing pairing one, the traffic frame of this vocoder unit writes multiple port routing to communicate unit (203) by digital signal processor (204), generating unit (302) is interrupted in visit, interrupt master cpu (201), master cpu (201) receives traffic frame and sends to the base station.
6, method according to the exchange of the traffic frame of claim 3 or 4 described vocoder systems, it is characterized in that comprising: master cpu (201 ') receives traffic frame by the interface with the base station, when specific timing is interrupted arriving, traffic frame is write multiple port routing to communicate unit (203 '), digital signal processor (204 ') reads traffic frame when specific timing is interrupted arriving, consign in the vocoder unit that this digital signal processor realizes by time division multiplexing pairing one, the traffic frame of this vocoder unit writes multiple port routing to communicate unit (203 ') by digital signal processor (204 ') when specific timing is interrupted arriving, master cpu (201 ') reads multiport communication unit (203 ') when specific timing is interrupted arriving, receive traffic frame and send to the base station.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005029879A1 (en) * | 2003-09-25 | 2005-03-31 | Zte Corporation | A vocoder equipment in mobile communication system and a method of speech frame scheduling |
| CN100414920C (en) * | 2004-03-31 | 2008-08-27 | 华为技术有限公司 | Apparatus and method for realizing inter-communication between digital signal processors |
| CN101341736B (en) * | 2005-12-23 | 2010-12-22 | 三叉微系统(远东)有限公司 | An audio/video renderer peripheral with dual interrupt lines for staggered interrupts |
| CN101227662B (en) * | 2008-02-03 | 2012-07-18 | 中兴通讯股份有限公司 | Apparatus, system and method for extracting E1 access time division multiplex data |
| CN103312352B (en) * | 2004-03-03 | 2015-09-16 | 艾利森电话股份有限公司 | For the method and system of double-core process |
| CN107301868A (en) * | 2017-06-23 | 2017-10-27 | 杭州士兰微电子股份有限公司 | Audio decoding system and audio-frequency decoding method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR970002689B1 (en) * | 1994-06-30 | 1997-03-08 | Hyundai Electronics Ind | Cdma |
| JPH10513634A (en) * | 1995-12-01 | 1998-12-22 | フィリップス エレクトロニクス ネムローゼ フェンノートシャップ | Digital cordless telephone system, radio base station, and combination of radio base station and cordless handset |
| KR100254200B1 (en) * | 1997-11-20 | 2000-04-15 | 윤종용 | A method of data downloading for appending functions of vocoder |
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2001
- 2001-09-30 CN CNB011269596A patent/CN100417232C/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005029879A1 (en) * | 2003-09-25 | 2005-03-31 | Zte Corporation | A vocoder equipment in mobile communication system and a method of speech frame scheduling |
| CN103312352B (en) * | 2004-03-03 | 2015-09-16 | 艾利森电话股份有限公司 | For the method and system of double-core process |
| CN100414920C (en) * | 2004-03-31 | 2008-08-27 | 华为技术有限公司 | Apparatus and method for realizing inter-communication between digital signal processors |
| CN101341736B (en) * | 2005-12-23 | 2010-12-22 | 三叉微系统(远东)有限公司 | An audio/video renderer peripheral with dual interrupt lines for staggered interrupts |
| US8484389B2 (en) | 2005-12-23 | 2013-07-09 | Entropic Communications, Inc. | AV renderer peripheral with dual inerrupt lines for staggered interrupts |
| CN101227662B (en) * | 2008-02-03 | 2012-07-18 | 中兴通讯股份有限公司 | Apparatus, system and method for extracting E1 access time division multiplex data |
| CN107301868A (en) * | 2017-06-23 | 2017-10-27 | 杭州士兰微电子股份有限公司 | Audio decoding system and audio-frequency decoding method |
| CN107301868B (en) * | 2017-06-23 | 2020-07-14 | 杭州士兰微电子股份有限公司 | Audio decoding system and audio decoding method |
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