CN1395156A - Conversion device of SDR and QDR and adapter card, main board and internal memory module interface using it - Google Patents

Conversion device of SDR and QDR and adapter card, main board and internal memory module interface using it Download PDF

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Publication number
CN1395156A
CN1395156A CN 01120120 CN01120120A CN1395156A CN 1395156 A CN1395156 A CN 1395156A CN 01120120 CN01120120 CN 01120120 CN 01120120 A CN01120120 A CN 01120120A CN 1395156 A CN1395156 A CN 1395156A
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sdr
qdr
signal
data
instruction
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Chinese (zh)
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吴坤河
庄海峰
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Leadtek Technology Co Ltd
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Leadtek Technology Co Ltd
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Priority to CN 01120120 priority Critical patent/CN1395156A/en
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Abstract

The invention relates to the conversion device of SDR and QDR as well as the relevant adaptation cards, main boards and memory module interfaces. The conversion device of SDR and QDR possesses QDR interface element, SDR interface element and the conversion core element. The QDR interface element is utilzied to exchange the signal for the QDR element. The SDR interface element is utilized to exchange the signal for the SDR element. The conversion core element converts the commands and data in the QDR format to the commands and data in the SDR format, as well as converts the commands and data in the SDR format to the commands and data in the QDR format.

Description

The conversion equipment of SDR and QDR and adapter, mainboard and the memory module interfaces of using it
The invention relates to a kind of internal memory conversion equipment and use its device, and particularly relevant for the conversion equipment and the adapter, mainboard, memory modules and the portable computer mainboard that use it of a kind of SDR and QDR.
Because the improvement of computer technology and technology, encapsulation technology not only has the growth of advancing by leaps and bounds on the processing speed of central processing unit (CPU, Central Processing Unit), many changes are also arranged on internal memory.Along with the raising that the internal memory access speed is required, internal memory commonly used is also from incipient DRAM (Dynamic Random Access Memory) (DRAM), extension data output random access memory (EDO RAM) etc., until most common synchronization DRAM (Dynamic Random Access Memory) (Synchronous Data Rate RAM now, hereinafter referred to as the SDR random access memory) and double data rate (DDR) random access memory (Double Data Rate RAM is hereinafter referred to as the DDR random access memory).Yet the cost of DDR random access memory is higher at present, therefore, if can use the SDR random access memory, and can have the efficient of DDR random access memory, even be higher than the DDR random access memory, will help the reduction of cost and the raising of efficient.
Therefore, the present invention proposes a kind of ratio method and structure faster at present, can improve the efficient of SDR random access memory significantly.The structure that this kind is brand-new is called quadruple according to rate random access memory (Quadruple Data Rate RAM is hereinafter referred to as the QDR random access memory).And present invention includes the formulation of QDR signal system, and the conversion method between SDR and the QDR signal system.SDR proposed by the invention and the transformational structure of QDR and method can be used in various need the use in all electronic products of random access memory, for example adapter, mainboard and portable computer mainboard etc.
The present invention proposes the conversion equipment of a kind of SDR and QDR, and this conversion equipment has QDR interface element, SDR interface element, clock controller, instruction control unit, status register group and DTU (Data Transfer unit).Wherein, the QDR interface element is used for carrying out signal exchange with the QDR element, and the SDR interface element then is used for carrying out signal exchange with the SDR element.Clock controller will be converted to conversion equipment and the employed clock of SDR element by the clock signal that the QDR element is delivered to.Instruction control unit is processed into corresponding SDR command signal with the QDR command signal after obtaining the QDR command signal of QDR element, and outputs to the SDR element.The status register group is used for storing the employed module buffer of QDR interface group (Mode Register Set, MRS) with extension of module buffer group (Extended Mode Register Set, EMRS) data in, and provide transitional information to make suitable instruction and data-switching to instruction control unit.DTU (Data Transfer unit) then is used for the data kenel of QDR is converted to the data kenel that is applicable to SDR, and the data kenel of SDR is converted to the data kenel that is applicable to QDR.
And in one embodiment of the invention, DTU (Data Transfer unit) has comprised a data shielding and has surveyed controller, QDR to a SDR data converter and SDR to a QDR data converter.Wherein, data mask and detection controller are used for obtaining the QM signal and the DQS signal of QDR element, the QM signal is changed into SDR QM signal and SDR QM signal is outputed to the SDR element, and transfer the DQS signal to the QDR element extracts data to the SDR element data extract signal.QDR to SDR data converter converts the serial signal of QDR element to parallel signal, and according to the order of instruction control unit, and the parallel signal of conversion gained separately is transferred to four SDR elements.SDR to QDR data converter then changes into the employed serial signal of QDR element with the data-signal of four SDR elements, and transfers to the QDR element according to the serial signal that the order of instruction control unit will be changed gained.
In sum, the present invention sets up ALT-CH alternate channel between QDR and SDR, make SDR in system that supports QDR or device, normally to move, and do not need and will support the system of QDR or install whole system or the device of supporting SDR that convert to, therefore can be so that the normal simultaneously operation of SDR and QDR.
The user can not need to purchase new QDR memory modules, uses device of the present invention in conjunction with existing SDR memory modules, can make the only SDR efficient of script bring up to the memory module of the efficient that possesses QDR.
Concerning the producer, when printed circuit board (PCB)s such as making adapter, mainboard, can the lower SDR chip of alternative costs, cooperate device of the present invention, can make product have the data-handling efficiency of QDR equally, make the existing product of the products and marketing of being produced have same quality and effect, but its cost of manufacture can significantly reduce.
For above and other objects of the present invention, feature and advantage can be become apparent, embodiment cited below particularly, and conjunction with figs. is described in detail below:
The accompanying drawing simple declaration:
Figure 1A is the block scheme according to the conversion equipment of first embodiment of the invention;
Figure 1B is the embodiment according to the utilization circuit of Figure 1A conversion equipment;
Fig. 2 A is the block scheme according to the conversion equipment of second embodiment of the invention;
Fig. 2 B is the embodiment according to the utilization circuit of Fig. 2 A conversion equipment;
Fig. 3 A is the block scheme according to the conversion equipment of third embodiment of the invention;
Fig. 3 B is first embodiment according to the utilization circuit of Fig. 2 A conversion equipment;
Fig. 3 C is second embodiment according to the utilization circuit of Fig. 3 A conversion equipment;
Fig. 3 D is the 3rd embodiment according to the utilization circuit of Fig. 2 A conversion equipment;
Fig. 4 is the block scheme according to the conversion equipment of fourth embodiment of the invention;
Fig. 5 is the block scheme according to fifth embodiment of the invention;
Fig. 6 is the block scheme according to sixth embodiment of the invention;
Fig. 7 is the block scheme according to seventh embodiment of the invention;
Fig. 8 is the block scheme according to eighth embodiment of the invention; And
Fig. 9 is the block scheme according to ninth embodiment of the invention.Description of reference numerals: 10,20,30,52,62,70,80,92,1002,1102,1202,1302, the conversion equipment 12 of 1402:SDR and QDR, 22,32,42: conversion core parts 14,24,34,40:QDR interface element 18,28,38,44,46,48,410:SDR interface element 512: adapter 54,56,58,510:SDR modular matrix 612: mainboard 64,66,68,610:SDR DIMM712: memory modules 72,74,76:SDR memory chip group matrix 812: memory module interfaces 82,84,86,88:SDR DIMM912: the mainboard 94 of portable computer, 96,98,910:SO-DIMM slot 1000,1100,1200,1300,1400:QDR element 1004,1104,1204,1304,1404:SQDR1006,1106,1306: phase-locked loop (being called for short PLL) 120,220,320: clock controller 122,222,322: instruction control unit 124,224,324: status register group 126,226,326: DTU (Data Transfer unit) 50,60,90: chipset 1260,2260,3260: data mask and detection controller 1262,2262,3262:SDR to QDR data converter and 1264,2264,3264:QDR to SDR data converter
Embodiment
Please refer to Figure 1A, is the block scheme according to the conversion equipment of first embodiment of the invention.In the conversion equipment 10 of SDR and QDR, a QDR interface element 14, a SDR interface element 18 and conversion core parts 12 have been comprised.This conversion equipment 10 can " SQDR " be named, and wherein, QDR interface element 14 is used for carrying out signal exchange with the QDR memory modules.SDR interface element 18 then is to be used for carrying out signal exchange with the SDR memory modules.
In Figure 1A, also drawn the conversion equipment block scheme of first embodiment of the internal circuit of changing core parts 12 in more detail.In this embodiment, conversion core parts 12 have comprised a clock controller 120, instruction control unit 122, a status register group 124 and a data conversion equipment 126.Wherein, (CKn CKn#) converts conversion equipment 10 and the employed clock of SDR element (MCKn) to the clock signal that clock controller 120 will be delivered to by the QDR element.
Instruction control unit 122 (comprises CSn, RAS, CAS in the QDR instruction that obtains, BAn, CAn, WE etc.) after, the QDR command signal is processed into corresponding SDR instruction (MCSn, MRAS, MCAS, MBAn, MAn, MWE etc.), be input to the SDR element then, when the QDR signal was data read command or data write command, DTU (Data Transfer unit) 126 will the mobilizing function control system at last.Status register group 124 then is used for storing the employed module buffer of QDR interface group, and (Mode Register Set is MRS) with extension of module buffer group (Extended Mode Register Set, the EMRS) data in.126 data kenels with QDR of DTU (Data Transfer unit) are converted to the data kenel that is applicable to SDR, and the data kenel of SDR is converted to the data kenel that is applicable to QDR.
In Figure 1A, also drawn the block scheme of the internal circuit of DTU (Data Transfer unit) 126 in more detail.In this embodiment, DTU (Data Transfer unit) 126 has comprised the shielding of data and has surveyed controller 1260, SDR to a QDR data converter 1262 and QDR to a SDR data converter 1264.When the mobilizing function control system, data mask with survey controller 1260 just can reach the QM signal and the DQS signal of QDR element, the QM signal is changed into the SDRQM signal be input to the SDR element again, and used data extract signal when the DQS signal changed into QDR the SDR element is extracted data.When the QDR command signal was data read command, QDR to SDR data converter 1264 can convert the serial signal of QDR element to parallel signal, and according to the order of instruction control unit 122, and the parallel signal of conversion gained separately is transferred to four SDR elements.When the QDR command signal is the data write command, SDR to QDR data converter 1262 can change into the employed serial signal of QDR element to the data-signal of four SDR elements, and transfers to the QDR element according to the serial signal that the order of instruction control unit 122 will be changed gained.And at serial and conversion device that this used, only need be with the rising edge and the drop edge of serial signal according to the operating clock value, finishing for a serial conversion of signals is four parallel signals, or a parallel signal is transferred to the signal of serial.
Because QDR sends four bits (bit) in one-period (cycle), and SDR only can send a bit in one-period, so QDR all is better than SDR on processing speed and efficient, in the above-described embodiments, be the conversion equipment that designs SDR and QDR in the mode of corresponding four the SDR elements of a QDR element.But the person skilled in the art should know, in fact also can one the mode of the corresponding SDR element of QDR element design this conversion equipment, but its efficient will reduce obviously, if will keep identical efficient, then the frequency of SDR must be increased to two times that are about QDR, just can make the SDR output bit identical with QDR, but the technology of the frequency of raising SDR is also difficult, therefore required cost also can improve relatively, and therefore application of the present invention still is to use four groups of SDR modules to produce the efficient of QDR.
Please refer to Figure 1B, is the utilization circuit diagram according to the conversion equipment 10 of SDR shown in Figure 1A and QDR.Fashionable when writing, then by the conversion equipment 1302 of QDR element 1400 input DQS signals to SDR and QDR.When reading, QDR element 1400 will be imported the conversion equipment 1402 of DQS signal to SDR and QDR, then after the SQDR 1404 via the conversion equipment 1402 of SDR and QDR handles, input to QDR element 1400 at last, person skilled in the art's this conversion equipment 10 as can be known need not use the clock signal of outside phase-locked loop and two times, and the DQS signal is directly to transmit.For example: when QDR element 1400 wants access data to SDR, at first QDR element 1400 can be sent an access command, via the instruction control unit 122 of QDR interface element 14 to conversion equipment 10, after this moment, instruction control unit 122 received the access command of QDR element 1400, be processed into corresponding SDR instruction, coomand mode data buffer 124 is stored the data in QDR interface 14 employed module buffer groups and the extension of module buffer group then, and the mobilizing function control system.After the mobilizing function control system, data mask and detection controller 1260 can remove to read the DM signal and the DQS signal of QDR element 1400, data mask with survey controller 1260 and the DM conversion of signals of QDR element 1400 can be become SDR DM signal, and used data extract signal when becoming QDR that the SDR element is extracted data the DQS conversion of signals of QDR element 1400.When the access command of QDR element 1400 is the data write command, QDR to SDR data converter 1264 can convert the serial signal of QDR element 1400 to parallel signal, and, separately send the parallel signal of conversion gained to four SDR elements according to the order of instruction control unit 122.When the access command of QDR element 1400 is data read command, SDR to QDR data converter 1262 can convert the data-signal of four SDR elements to QDR element employed serial signal, and transfers to QDR element 1400 according to the serial signal that the order of instruction control unit 122 will be changed gained.
Please refer to Fig. 2 A, is the block scheme according to the conversion equipment of second embodiment of the invention.The function of all devices all device with Figure 1A is identical, unique difference be when data mask when surveying controller 2260 and obtain the QM of QDR element and DQS signal, the QM signal is changed into SDR QM signal and outputs to the SDR element, used data extract signal when the DQS signal is changed into the QDR element SDR element is extracted data, and in the time must returning the DQS signal, produce the DQS signal of passback according to two times clock signals to the QDR element.
Please refer to Fig. 2 B, be a embodiment according to the utilization circuit of the conversion equipment of Fig. 2 A, conversion equipment 20 of the present invention can be used among Fig. 2 B, if produce the DQS signal of passback by two times clock signals, write fashionable, just by the conversion equipment 1204 of QDR element 1200 input DQS signals to SDR and QDR.When reading, just the SQDR1204 by the conversion equipment 1202 of SDR and QDR changes into the DQS signal with two times of clock signals that QDR element 1200 is provided, and then outputs to QDR element 1200.
Please refer to Fig. 3 A, is the block scheme of the conversion equipment of third embodiment of the invention.The function of all devices all conversion equipment with Figure 1A is identical, unique difference is phase-locked loop (PhaseLock Loop, under be called for short PLL) 321 with data mask with survey controller 3260, wherein behind the 321 receive clock signals of phase-locked loop, producing frequency is the built-in function clock signal of two times of clock signal frequencies.And data mask and detection controller 3260 are when obtaining the QM of QDR element and DQS signal, the QM signal is changed into SDR QM signal and outputs to the SDR element, used data extract signal when the DQS signal is changed into the QDR element SDR element is extracted data, and in the time must returning the DQS signal, produce the DQS signal of passback according to the built-in function clock signal to the QDR element.
Please refer to Fig. 3 B and 3D, according to the practice circuit embodiments of Fig. 2 A conversion equipment 20 of the embodiment of the invention.Conversion equipment 20 of the present invention can be used among Fig. 3 B.Among this figure from the direction of the conversion equipment 1002 of QDR element 1000 to SDR and QDR for writing, and from the direction of conversion equipment 1002 to the QDR elements 1000 of SDR and QDR for reading.Fig. 3 B and 3D mainly illustrate in Fig. 2 A conversion equipment 20 phase-locked loop 321 can in be built in SDR and the QDR conversion equipment 1002, or in be built in the SQDR 1004, or provide by the outside.
In one embodiment, if phase-locked loop 1006 is the insides at the conversion equipment 1002 of SDR and QDR, and the clock signal that produces the clock signal with two times is during to DTU (Data Transfer unit), write fashionable, just by the conversion equipment 1002 of QDR element 1000 output DQS signals to SDR and QDR.When reading, then just the built-in function clock signal that phase-locked loop 1006 is provided is changed into the DQS signal by the SQDR 1004 of the conversion equipment 1002 of SDR and QDR, output to QDR element 1000 then.
In another embodiment, if phase-locked loop 1106 is in SQDR 1104 inside, please refer to Fig. 3 C, is the practice circuit embodiments according to Fig. 3 A conversion equipment 30 of the embodiment of the invention.And the built-in function clock signal that phase-locked loop 1106 is produced outputs to DTU (Data Transfer unit).Write fashionable, just by the conversion equipment 1102 of QDR element 1100 input DQS signals to SDR and QDR.When reading, then the SQDR1104 by the conversion equipment 1102 of SDR and QDR changes into the DQS signal with the built-in function clock signal that phase-locked loop 1106 is provided, and outputs to the QDR element then.
In another embodiment, if phase-locked loop 1306 is provided by external circuit, please refer to Fig. 3 D, is the another kind of practice circuit embodiments according to Fig. 2 A conversion equipment 20 of the embodiment of the invention.And the built-in function clock signal that phase-locked loop 1306 is produced is input in the conversion equipment 1302 of SDR and QDR.Write fashionable, just by the conversion equipment 1302 of QDR element 1300 input DQS signals to SDR and QDR.When reading, then the DQDR 1304 by the conversion equipment 1302 of SDR and QDR changes into the DQS signal with the built-in function clock signal that phase-locked loop 1306 is provided, and outputs to the QDR element then.
Please refer to Fig. 4, is the block scheme of fourth embodiment of the invention.Wherein change core parts and be used for instruction and the data mode that instruction and data mode with QDR convert SDR to, be input to the SDR element by SDR interface element 44,46,48 and 410, and instruction and data mode with instruction and the data mode of SDR converts QDR to are sent to the QDR element by QDR interface element 40.
Next please refer to Fig. 5, is the block scheme of fifth embodiment of the invention.In adapter 512, a chipset of supporting to use the QDR module 50, conversion equipment 52 and four SDR modular matrixs 54,56,58 and 510 have been comprised.Wherein, in order to make block scheme become apparent, the QDR interface element of conversion equipment 52 and SDR interface element are only respectively to represent with the connecting line that SDR modular matrix 54,56,58 and 510 is connected with chipset 50.With the connected mode of this kind device, just can on the adapter 512 of supporting the QDR module, use the SDR modular matrix.
Next please refer to Fig. 6, is the block scheme of sixth embodiment of the invention.In mainboard 612, a chipset of supporting the QDR module 60, conversion equipment 62 and four SDRDIMM 64,66,68 and 610 have been comprised.Wherein, in order to make that block scheme can be clearer, the QDR interface element of conversion equipment 62 is only represented with SDR DIMM64,66,68 and 610 connecting lines that are connected with chipset 60 respectively with the SDR interface element.With the connected mode of this kind device, just can on the mainboard 612 of supporting QDR DIMM, use SDR DIMM.
Next please refer to Fig. 7, is the block scheme of seventh embodiment of the invention.In memory modules 712, comprised that a conversion equipment 70 and a plurality of SDR memory chip group matrix are as 72~76.Wherein, in order to make that block scheme can be clearer, the QDR interface element of conversion equipment 70 is represented as 72~76 connecting lines that are connected with a plurality of SDR memory chip group matrixes with the outside device respectively with the SDR interface element.With the connected mode of this kind device, just can on the memory modules 712 of supporting QDR memory chip group matrix, use SDR memory chip group matrix.
Next please refer to Fig. 8, is the block scheme according to eighth embodiment of the invention.In memory module interfaces 812, a conversion equipment 80 and four SDR DIMM 82,84,86 and 88 have been comprised.Wherein, in order to make that block scheme can be clearer, the QDR interface element of conversion equipment 80 is represented with the connecting line that four SDR DIMM 82,84,86 and 88 are connected with the outside device respectively with the SDR interface element.With the connected mode of this kind device, just can on the memory module interfaces 812 of supporting QDRDIMM, use SDR DIMM.
Please refer to Fig. 9, is the block scheme of ninth embodiment of the invention.In the mainboard 912 of portable computer, a chipset of supporting the QDR module 90, conversion equipment 92 and four SDR dimm sockets 94,96,98 and 910 have been comprised.Wherein, in order to make that block scheme can be clearer, the QDR interface element of conversion equipment 92 is only represented with the connecting line that SDR dimm socket 94,96,98 and 910 is connected with chipset 90 respectively with the SDR interface element.With the connected mode of this kind device, just can on the mainboard 912 of the portable computer of supporting the QDR dimm socket, use the SDR dimm socket.
In sum, the present invention sets up ALT-CH alternate channel between QDR and SDR, not only can the data-handling efficiency of QDR can also still be arranged so that SDR and QDR are normal simultaneously to be moved under the situation of only using the SDR internal memory.
The user can not need to purchase new QDR memory modules, uses device of the present invention in conjunction with existing SDR memory modules, can make the memory module of the only SDR improved efficiency of script to the efficient that possesses QDR; Also can use existing SDR memory modules, add that device of the present invention and QDR memory modules use simultaneously, further improve the efficient of system.
Concerning the producer, when making memory modules and adapter, can the lower SDR chip of alternative costs, cooperate device of the present invention, can make product have the data-handling efficiency of QDR equally, make the existing QDR product of the products and marketing of being produced have same quality and effect, but its cost of manufacture can significantly reduce.And when making mainboard, use the device of the present invention can be for the user no matter use under the situation of SDR and QDR module at the same time, or only use and can reach the efficient of QDR under the situation of SDR module, so can improve competitiveness of product.
Though the present invention with the embodiment explanation as above; so it is not to be used for limiting the present invention, any person skilled in the art, without departing from the spirit and scope of the present invention; when can doing various changes and retouching, so protection scope of the present invention is as the criterion with claims.

Claims (10)

1. the conversion equipment of SDR and QDR is characterized by: comprising:
One QDR interface element is used for carrying out signal exchange with a QDR element;
One SDR interface element is used for carrying out signal exchange with a SDR element;
One clock controller is used for the clock conversion of signals that this QDR element is delivered to is become this conversion equipment and the employed clock of this SDR element;
One status register group is used for storing the QDR element state;
One instruction control unit after obtaining a QDR command signal of this QDR element, is processed into a corresponding SDR command signal with this QDR command signal, and exports this SDR element to; And
One DTU (Data Transfer unit), be couple to this instruction control unit, this QDR interface element and this SDR interface element, be used for receiving the order that transmits by this instruction control unit, and the data that will have a QDR data kenel according to this are converted to the data with a SDR data kenel that are applicable to this SDR element, and these data with SDR data kenel are converted to the data with this QDR data kenel that are applicable to this QDR element.
2. the conversion equipment of SDR as claimed in claim 1 and QDR is characterized by: this DTU (Data Transfer unit) comprises:
One data mask and detection controller, be used for obtaining a QM signal and a DQS signal of this QDR element, this QM signal is changed into a SDR QM signal and this SDR QM signal is inputed to this SDR element, and transfer a DQS signal to this QDR element extracts data to this SDR element a data extract signal;
One QDR to SDR data converter becomes a parallel signal with a serial conversion of signals of this QDR element, and according to the order of this instruction control unit, and this parallel signal of conversion gained separately is transferred to those four SDR elements; And
One SDR to QDR data converter changes into employed this serial signal of this QDR element with the data-signal of those four SDR elements, and transfers to this QDR element according to this serial signal that the order of this instruction control unit will be changed gained.
3. the conversion equipment of SDR as claimed in claim 1 and QDR is characterized by: this DTU (Data Transfer unit) comprises:
One data mask and detection controller, obtain a QM signal and a DQS signal that this QDR element is transmitted, this QM signal is changed into a SDR QM signal and exports this SDR element to, transfer this DQS signal to this QDR element extracts data to this SDR element a data extract signal, and in the time must returning this DQS signal, produce this DQS signal of passback according to these clock signals of two times to this QDR element;
One QDR to SDR data converter converts this serial signal of this QDR element to this parallel signal, and according to the order of this instruction control unit, and this parallel signal of conversion gained separately is transferred to those four SDR elements; And
One SDR to QDR data converter changes into employed this serial signal of QDR element with the data-signal of those four SDR elements, and transfers to the QDR element according to this serial signal that the order of this instruction control unit will be changed gained.
4. the conversion equipment of SDR as claimed in claim 1 and QDR is characterized by: this DTU (Data Transfer unit) comprises:
One phase-locked loop receives this clock signal, and the generation frequency is a built-in function clock signal of this clock signal frequency twice;
One data mask and detection controller, be used for obtaining a QM signal and the DQS signal of this QDR, this QM signal is changed into a SDR QM signal and inputs to this SDR element, transfer this DQS signal to this QDR element extracts data to the SDR element a data extract signal, and in the time must returning this DQS signal, produce this DQS signal of passback according to this built-in function clock signal to this QDR element;
One QDR to SDR data converter becomes a parallel signal with a serial conversion of signals of this QDR element, and according to the order of this instruction control unit, and the parallel signal of conversion gained separately is transferred to those four SDR elements; And
One SDR to QDR data converter changes into employed this serial signal of QDR element with the data-signal of those four SDR elements, and transfers to the QDR element according to this serial signal that the order of this instruction control unit will be changed gained.
5. the conversion equipment of SDR and QDR is characterized by: comprising:
One QDR interface element is used for carrying out signal exchange with the QDR element;
One SDR interface element is used for carrying out signal exchange with the SDR element; And
One conversion core parts, the instruction and the data mode that convert instruction and the data mode of QDR to SDR, reach the SDR element by this SDR interface element, and, reach the QDR element by this QDR interface element with instruction and data mode that instruction and the data mode of SDR converts QDR to.
6. an adapter that uses the conversion equipment of SDR and QDR is applicable on the circuit board of supporting the QDR module, it is characterized by: have a chipset of supporting QDR on this circuit board at least, this adapter comprises at least:
At least one SDR modular matrix; And
The conversion equipment of one SDR and QDR comprises:
One QDR interface element is used for carrying out signal exchange with this chipset;
One SDR interface element is used for carrying out signal exchange with this SDR modular matrix; And
One conversion core parts, the instruction and the data mode that convert instruction and the data mode of QDR to SDR, be sent to this SDR modular matrix by this SDR interface element, and, be sent to this chipset of supporting QDR by this QDR interface element with instruction and data mode that instruction and the data mode of SDR converts QDR to.
7. mainboard that uses the conversion equipment of SDR and QDR is characterized by: comprising:
One chipset supports to use the QDR module; And
The conversion equipment of one SDR and QDR comprises:
At least one SDR DIMM;
The conversion equipment of one SDR and QDR comprises a QDR interface element, is used for carrying out signal exchange with this chipset; One SDR interface element is used for carrying out signal exchange with this SDR DIMM; Reach conversion core parts, the instruction and the data mode that convert instruction and the data mode of QDR to SDR, be sent to this SDR DIMM by this SDR interface element, and, be sent to this chipset by this QDR interface element with instruction and data mode that instruction and the data mode of SDR converts QDR to.
8. memory modules that uses the conversion equipment of SDR and QDR is applicable to that it is characterized by: this memory modules comprises on the internal memory of supporting the QDR memory modules:
At least one SDR memory chip group matrix; And
The conversion equipment of one SDR and QDR comprises a QDR interface element, carries out signal exchange with this internal memory; One SDR interface element carries out signal exchange with this SDR memory chip group matrix; Reach conversion core parts, the instruction and the data mode that convert instruction and the data mode of QDR to SDR, be sent to this SDR memory chip group matrix by this SDR interface element, and, be sent to this internal memory by this QDR interface element with instruction and data mode that instruction and the data mode of SDR converts QDR to.
9. memory module interface that uses the conversion equipment of SDR and QDR is characterized by: comprising:
At least one SDR DIMM; And
The conversion equipment of one SDR and QDR comprises a QDR interface element, carries out signal exchange with this memory module interfaces; One SDR interface element carries out signal exchange with this SDR DIMM; Reach conversion core parts, the instruction and the data mode that convert instruction and the data mode of QDR to SDR, be sent to this SDR DIMM by this SDR interface element, and, be sent to this memory module interfaces by this QDR interface element with instruction and data mode that instruction and the data mode of SDR converts QDR to.
10. portable computer mainboard that uses the conversion equipment of SDR and QDR is characterized by: comprising:
One chipset supports to use the QDR module; And
The conversion equipment of one SDR and QDR comprises a QDR interface element, is used for carrying out signal exchange with this chipset; One SDR interface element provides at least one SO-DIMM slot; One conversion core parts, the instruction and the data mode that convert instruction and the data mode of QDR to SDR, be sent to this SO-DIMM slot by this SDR interface element, and, be sent to this chipset by this QDR interface element with instruction and data mode that instruction and the data mode of SDR converts QDR to.
CN 01120120 2001-07-05 2001-07-05 Conversion device of SDR and QDR and adapter card, main board and internal memory module interface using it Pending CN1395156A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 01120120 CN1395156A (en) 2001-07-05 2001-07-05 Conversion device of SDR and QDR and adapter card, main board and internal memory module interface using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 01120120 CN1395156A (en) 2001-07-05 2001-07-05 Conversion device of SDR and QDR and adapter card, main board and internal memory module interface using it

Publications (1)

Publication Number Publication Date
CN1395156A true CN1395156A (en) 2003-02-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 01120120 Pending CN1395156A (en) 2001-07-05 2001-07-05 Conversion device of SDR and QDR and adapter card, main board and internal memory module interface using it

Country Status (1)

Country Link
CN (1) CN1395156A (en)

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