CN1383298A - Connector for multi-machine communication bus - Google Patents
Connector for multi-machine communication bus Download PDFInfo
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Abstract
This invention relates to a bus connection device of multi-device communication in communication field. At the sending side, data sent by HDLC contocol processor links with a lock first to a difference sneder to make energy signal generate a module, the signal of sending data sent by the module and the sender connected the energy signal to the bus difference sender to output difference signals. At the receiving side, TTL signals received via the difference receiver link to the receive end of HELC protocol processor. The designed idle state device is directly connected with the difference bus, available for long distance transmission, anti-interference and preventing electrostatic interference.
Description
The present invention relates to communication field, relate in particular to the multi computer communication system in the communications field.
At present in the communications field, the application of multi-computer communication is very widely, in the application of multi-computer communication, be used for transfer of data, the agreement of Data Control etc. has a lot, wherein, High level data link control (High-level Data Link Control, hereinafter to be referred as HDLC) be exactly a kind of agreement that data link layer is most widely used, this agreement is positioned at the second layer of osi model, many other link layer protocol such as SDLC (Synchronous Data Link Control, synchronous data-link control), LAPB (Link AccessProcedure Balanced, the balance Link Access Procedure), LAPD (Link Access Procedure on theD-channel, D-channel link visit rules) and AppleTalk (procotol that the MAC machine is used) etc. all be on the basis of HDLC agreement or its frame structure, develop and.The HDLC agreement adopts the first place sign of a special code character 01111110 as message or datagram frame, be applicable to the connected mode of point-to-point or point-to-multipoint: under point-to-point interconnection, all has only a node owing to send and receive, so do not need to do collision detection; Under the point-to-multipoint mode, the transmitting terminal of a plurality of transmitters (is equivalent to the open collector mode by open circuit output, hereinafter to be referred as OPEN-DRAIN) mode is connected on the HDLC bus, therefore transmitter needs the detection and retransmission mechanism of conflict: whether each node at first has signal by an input channel that links to each other with bus before sending data, judge the busy spare time of channel with this, if free time then send data immediately, otherwise continue the busy not busy situation of monitoring channel; Because a plurality of nodes take same channel, therefore after the free time appears in channel, the situation that a plurality of nodes send simultaneously may appear, this just need carry out collision detection, a node is intercepted channel when sending, in case conflicting, discovery stops immediately sending, and in the back repeating transmission of waiting for a period of time, this mode is called as CSMA/CD (Carrier Sense MultipleAccess with Collision Detection, the Carrier Sense Multiple Access that has collision detection) mode, adopt this mode to make the utilance of channel be greatly improved, theory analysis can reach 87.5%.But because the HDLC bus directly links together Transistor-Transistor Logic level by the OPEN-DRAIN mode, transmission range is limited, therefore it only is suitable for short-range communication, if enlarge the range of application of HDLC bus, then must adopt extra transmitter to improve transmission range, but because multiple spot connects the control that need conflict, therefore the transmitter that increases must be the transmitter that the output band enables, and must increase the control logic of the output enable of transmitter, open simultaneously with the output of avoiding a plurality of transmitters and cause conflict.The processor of existing support HDLC agreement such as the processor MPC68360 of MOTOROLA company, MPC860, the hdlc controller SAB82525 of the AM186 of AMD and SIEMENS company etc. is not to be with external transmitter, the data-signal that they send in physical layer is a Transistor-Transistor Logic level, and will send data terminal is arranged to the OPEN-DRAIN mode and exports, to reach the purpose that can link together with the mode of " line with ", but thisly be not connected with a lot of shortcomings with the OPEN-DRAIN of external transmitter: owing to be that Transistor-Transistor Logic level directly transmits, so transmission range is short, antijamming capability is poor.Because no external transmitter, the antistatic capacity of system hardware is more weak.If add external transmitter, as mentioned above, then must increase the transmitter that the output band enables to control, and need control logic.Owing to increased extra control logic, make the utilance of channel reduce, the complexity of system hardware and software design increases.
The purpose of this invention is to provide and a kind ofly grow that Distance Transmission, antijamming capability and antistatic capacity are strong, channel utilization is high and the connector for multi-machine communication bus of simplicity of design, with a little less than overcoming transmission range weak point that exist in the existing multi-computer communication jockey, poor anti jamming capability, antistatic capacity, the high shortcoming of complexity that utilance is low and system hardware and software designs of channel.
In order to finish above-mentioned task, the present invention has constructed a kind of connector for multi-machine communication bus, comprises differential bus A, differential bus B and terminal build-out resistor, it is characterized in that, also comprises host node, bus idle state setting device and a plurality of from node;
Described host node comprises differential signal transmitter and differential signal receiver two parts;
Describedly comprise differential signal receiver, enable signal generation module and bus-type differential transmitter from node;
Described enable signal generation module, receive the transmission data-signal TxD and the tranmitting data register signal TxCLK of HDLC protocol processor, and analyze transmission data and idle condition, produce to send enable signal TxEN and send data-signal TxD ' and delivers to described bus-type differential transmitter;
Described bus-type differential transmitter receives the signal of described enable signal generation module output and converts differential signal to and sends to differential bus A; Described differential signal receiver from node detects input from the bus collision that differential bus B goes up received signal and outputs to the HDLC protocol processor; Described bus idle state setting device links to each other with differential bus A, and to guarantee being connected HDLC protocol processor on the bus when not sending data when all, each collision detection input is presented as an idle condition; Differential signal receiver in the described host node is gone up received signal and is delivered to the signal input part RxD of HDLC protocol processor from differential bus A; Differential signal transmitter in the described host node receives the transmission data-signal TxD of HDLC protocol processor output, sends to after the conversion on the differential bus B; The terminal connecting terminal build-out resistor of differential bus B.
The present invention has also constructed a kind of connector for multi-machine communication bus, comprises differential bus, it is characterized in that, also comprises bus idle state setting device and at least one communication node;
Described communication node comprises enable signal generation module, bus-type differential transmitter and differential signal receiver;
The transmission data-signal TxD of described enable signal generation module reception HDLC protocol processor and tranmitting data register signal TxCLK and transmission are ready to signal RTS, handle the back and send data-signal TxD ' and transmission enable signal TxEN to described bus-type differential transmitter output; Differential signal after described bus-type differential transmitter will be handled outputs on the differential bus, and the signal that its inner receiver receives sends to the bus collision detection signal input CTS of HDLC protocol processor; Described differential signal receiver receives the signal of differential bus, sends to the reception data input pin of HDLC protocol processor after the processing; Described bus idle state setting device is connected the end of differential bus.
With respect to existing HDLC bus structures and device, the connector for multi-machine communication bus of the supporting bus type HDLC agreement that the present invention constructed transmits based on difference is because adopted the enable signal generation module, if the HDLC protocol processor of selecting has RTS output, then directly with the enable signal TxEN of the reverse back of RTS as the differential signal transmitter, otherwise just from data-signal, extract the TxEN signal, TxD ' directly obtains from TxD, thereby it is far away to have transmitting range, the characteristics that antijamming capability is strong.Compare with of the prior art one main many connected modes of controlling all transmitters by host node from mode, system's line reduces 1/4, and channel utilization improves more than 1 times, and the complexity of software design reduces to some extent.Other Bit Oriented or character-oriented data link control protocol also can be adopted the connection that uses the same method, and it is different just to produce the process that sends enable signal TxEN.
The present invention will be further described in detail below in conjunction with the drawings and specific embodiments.
Fig. 1 is the connector for multi-machine communication bus structure chart of point-to-multipoint delivery mode of the present invention;
Fig. 2 is the connector for multi-machine communication bus structure chart of multi-point mode of the present invention;
Fig. 3 is an enable signal generation module functional block diagram of the present invention;
Fig. 4 is a bus idle state setting device schematic diagram of the present invention;
Fig. 5 is that the node of one embodiment of the invention sends the part schematic diagram;
Fig. 6 is the node receiving unit schematic diagram of one embodiment of the invention;
Fig. 7 is the transmission part schematic diagram of another embodiment of the present invention.
Fig. 1 is the pie graph of bus connecting device of the present invention when being applied in the point-to-multipoint delivery mode.The point-to-multipoint mode has a host node and a plurality of from node, and host node receives all information of sending from node and sends information to all from node, and host node has only one.Only send information and receive only the information that host node is sent from node, can have one or more from node to host node.Being from node in the empty frame in differential bus left side among Fig. 1, is host node in the empty frame in differential bus right side.On the transmitting channel of host node, owing to have only host node to send, all receive from node, therefore can directly link together through differential bus B by the difference transceiver, and the end of this differential bus B installs the terminal build-out resistor additional, to prevent reflection effect.On the receive channel of host node, because having a plurality ofly needs to send from node, therefore must adopt device proposed by the invention to link together, be ready to signal RTS (if the HDLC protocol processor of selecting has this signal output) from the transmission data of node HDLC protocol processor and tranmitting data register signal TxCLK and transmission and deliver to the enable signal generation module, and output sends data and sends enable signal TxEN; Sending data enables to link to each other with the bus-type differential transmitter with transmission, the bus-type differential transmitter is the differential signal transmitter that an inside has receiver, input signal is connected with transmission enable signal TxEN with the data of enable signal generation module output respectively with Enable Pin, the differential signal of output is connected to differential bus A, the signal that inner receiver receives is connected with the bus collision detection signal input CTS of HDLC protocol processor, can have a plurality ofly from node, it sends data and links to each other with differential bus A according to same connected mode; The bus idle state setting device is connected on the end of differential bus A, with the bus collision detection signal input CTS input that guarantees HDLC protocol processor under the idle condition is high level signal, simultaneously, the bus idle state setting device plays the effect of terminal build-out resistor again, and a bus idle state setting device can only be arranged in the whole device.The input of host node differential signal receiver is connected with differential bus A, and the output of receiver is received the reception data input pin of HDLC protocol processor.Under the point-to-multipoint mode, also can adopt host node to control all modes from the transmitter of node links together with differential bus, need to increase in addition control line and control logic, thereby destroyed the collision detection and the retransmission mechanism of HDLC bus, the design of hardware and software complexity of system all will increase.Adopt device proposed by the invention but not have these problems, make the HDLC bus no longer only be only applicable to the short haul connection occasion.
Fig. 2 is the pie graph of bus connecting device of the present invention when being applied in the multi-point mode, be connected node on the bus during multipoint system and do not have principal and subordinate's branch, each node not only sends data but also receive data from same bus on bus, on a pair of differential bus two or more nodes can be arranged.Be a communication node in the empty frame in the left side of differential bus among the figure, it (is RTS that the transmission data of HDLC protocol processor and tranmitting data register signal TxCLK and transmission are ready to signal, if the HDLC protocol processor of selecting has this signal output) deliver to the enable signal generation module, and output sends data and sends enable signal TxEN; Sending data enables to link to each other with the bus-type differential transmitter with transmission, the bus-type differential transmitter is the differential signal transmitter that an inside has receiver, input signal is connected with transmission enable signal TxEN with the data of enable signal generation module output respectively with Enable Pin, the differential signal of output is connected to differential bus, the signal that inner receiver receives is connected with the bus collision detection signal input CTS of HDLC protocol processor, and the transmitter of a plurality of nodes links to each other with differential bus according to same connected mode; The bus idle state setting device is connected on the end of differential bus, with the bus collision detection signal input CTS input that guarantees HDLC protocol processor under the idle condition is high level signal, simultaneously, the bus idle state setting device plays the effect of terminal build-out resistor again, and a bus idle state setting device can only be arranged on a pair of differential bus; The reception data input pin of each node receives the output signal of differential signal receiver, and the input of differential signal receiver is directly connected to differential bus.Adopt the device of difference HDLC bus provided by the present invention to connect, the communication distance of HDLC bus is greatly improved and (brings up to thousands of rice by several meters, the transmitter and the traffic rate that depend on employing), make the HDLC bus no longer only be applied to the short haul connection occasion.Other Bit Oriented or character-oriented data link control protocol also can adopt same thinking to connect.
Fig. 3 is the theory diagram of enable signal generation module in the present invention's connector for multi-machine communication bus of constructing, so that also can be suitable for the device that the present invention constructs when not being with RTS signal output HDLC protocol processor selecting for use.Comprise that reverser, enable signal extraction element and 2 select three devices of 1 MUX, input signal is transmission data-signal TxD ', the tranmitting data register signal TxCLK of HDLC protocol processor, if having to send, the HDLC protocol processor of selecting is ready to signal RTS output, then also comprise the RTS signal, the enable signal generation module is output as and sends data-signal TxD ' and send enable signal TxEN.If the HDLC protocol processor that uses in the system has control signal RTS, such as MPC860, because the RTS signal is in HDLC agreement dateout device continuously effective, therefore can be used as the enable signal TxEN of differential signal transmitter, but it is effective that this signal is a low level, and TxEN needs the control signal of a high level, therefore need RTS is reverse, at this moment 2 select 1 MUX be chosen as A (among the figure shown in the dotted line), both the reverse signal of RTS was as output signal.If the HDLC protocol processor that uses in the system does not have RTS, as AM186, then need to extract the TxEN signal by the enable signal extraction element from send data terminal TxD, this part function can be finished with programmable logic device when realizing, also can form with the simple logic combination of devices.The extraction principle of enable signal is: the initial condition of TxEN signal is a low level ' 0 ', when signal sent, first BIT that sends frame head was low, at this moment put TxEN immediately for high, and being retained to continuous 8 ' 1 ' appearance of transmitting terminal, TxD ' directly obtains from TxD.At this moment 2 B that are chosen as that select 1 MUX promptly enable enable signal that signal extracting device extracts as output signal.The enable signal that the enable signal extraction element extracts and oppositely after the RTS signal difference little, the effect of enable signal extraction element proposed by the invention is also can be suitable for the present invention when not being with RTS signal output HDLC protocol processor selecting for use.
Fig. 4 is the schematic diagram of bus idle state generation device in the connector for multi-machine communication bus that the present invention constructed, and this device is in order to guarantee that receiver can be exported a high level when transmitter all cuts out, thus the sign bus idle state.The idle condition generation device is composed in series by three resistance R 1, R2, R3, and the two ends of series resistance are the VCC and the GND of welding system respectively.All be in when transmitters all on the bus under the situation of closed condition, owing to the direct voltage on two differential lines is basic identical, what receiver received will be low level state, this and HDLC protocol processor do not meet the situation of high level as the bus free time, and the effect of this device is exactly in order to guarantee that receiver receives a high level when all transmitters are in closed condition.Dividing potential drop by R1, R2, R3, the DC voltage difference of two differential lines A and B by clamped a fixed level (this level value is the electric definition value of the differential level " 1 " that adopted), thereby guaranteed that receiver can be exported a high level when transmitter all cuts out, simultaneously resistance value satisfies R2//(R1+R3)=Z
0, as the terminal build-out resistor of difference transmission lines.
Fig. 5 is the transmission part schematic diagram of a node in one embodiment of the present of invention, HDLC protocol processor wherein is the communication microcontroller AM186CC of AMD, this controller does not have the RTS output signal, item in the drawings is D1, the bus-type differential transmitter is the ADM3485E of AD company, item is D13 in the drawings, and being created among the programmable chip D14 of enable signal finished, and adopts the FLEX6016 of ALTERA company.The TxDA and the TxCLK of D1 output deliver to D14, in D14, finish the extraction of TxEN, transmission data terminal DI that the TxD ' of output and TxEN are connected to D13 and transmission Enable Pin DE, the differential output signal TxDA+ of D13 and TxDA-link to each other with differential bus in the system, export by RO in the inside of D13 RO received signal from A and B, the signal of output is connected to the collision detection input CTSA of D1.
Fig. 6 is applied in the receiving unit schematic diagram of host node among the embodiment of point-to-multipoint pattern for the present invention, R1 wherein, R2, R3 have constituted the bus idle state setting device, resistance is 120 Ω, and the Ω of R2//(R1+R3)=80 approximates differential transfer line impedence 88 Ω of system.The bus idle state setting device directly is connected with differential bus, and the DC potential difference of differential lines TxDA+ and TxDA-is clamped on 1/3VCC.The HDLC protocol processor is AM186CC, and differential signal receiver adopts the MAX3096 of MAXIM company.Differential signal receiver directly will be delivered to the received signal input RxD of HDLC protocol processor from the signal that differential bus TxDA+ and TxDA-receive.
Fig. 7 is the partial graph of the transmission part of another one embodiment of the present invention, and the protocol processor among the figure is MPC860, and item is D1, and the output of RTS signal is arranged.Bus-type differential signal transmitter is ADM3485, and item is D13 among the figure.The output signal RTS of D1 after the inverter negate as TxEN, the transmission data output end TxDA of TxEN and D1 is connected to D13, the differential signal of D13 output is connected to system's differential bus, and the signal that D13 inside receives from differential bus is directly connected to the collision detection input CTSA of D1.This routine receiving unit principle is identical with example shown in Figure 6, no longer carefully states.
Claims (12)
1, a kind of connector for multi-machine communication bus comprises differential bus A, differential bus B and terminal build-out resistor, it is characterized in that, also comprises host node, bus idle state setting device and at least one is from node;
Described host node comprises differential signal transmitter and differential signal receiver two parts;
Describedly comprise differential signal receiver, enable signal generation module and bus-type differential transmitter three parts from node, each has identical connected mode from node;
Described enable signal generation module receives the transmission data-signal TxD and the tranmitting data register signal TxCLK of HDLC protocol processor, produces to send enable signal TxEN and send data-signal TxD ', and delivers to described bus-type differential transmitter; Described bus-type differential transmitter becomes differential signal to send to differential bus A the conversion of signals that receives; Described differential signal receiver from node is gone up received signal and is outputed to the bus collision detection signal input CTS of HDLC protocol processor from differential bus B; Described bus idle state setting device links to each other with differential bus A; Differential signal receiver in the described host node is gone up received signal and is delivered to the signal input part of HDLC protocol processor from differential bus A; Differential signal transmitter in the described host node receives the transmission data-signal TxD of HDLC protocol processor output, sends to after the conversion on the differential bus B; The terminal connecting terminal build-out resistor of differential bus B.
2, connector for multi-machine communication bus according to claim 1, it is characterized in that, described enable signal generation module comprises enable signal extraction element and MUX, described enable signal extraction element receives the transmission data-signal TxD and the tranmitting data register signal TxCLK of HDLC protocol processor, signal after handling is sent to described MUX, and will send data-signal TxD ' and send to described bus-type differential transmitter, described MUX output sends enable signal TxEN to described bus-type differential transmitter.
3, connector for multi-machine communication bus according to claim 1 is characterized in that, described MUX adopts 2 to select 1 selector.
4, connector for multi-machine communication bus according to claim 1, it is characterized in that, described enable signal generation module also comprises reverser, and the transmission that this reverser receives the HDLC protocol processor is ready to signal RTS, output is sent to the other end of described MUX.
5, connector for multi-machine communication bus according to claim 1, it is characterized in that, described bus idle state generation device is composed in series successively by first resistance R 1, second resistance R 2 and the 3rd resistance R 3, and the tie point of described first resistance R 1 and described second resistance R 2 and the end of described differential bus A link; The tie point of described second resistance R 2 and described the 3rd resistance R 3 and the other end of described differential bus A link; The two ends of series resistance are the power end VCC and the earth terminal GND of welding system respectively.
6, connector for multi-machine communication bus according to claim 1 is characterized in that, described bus-type differential transmitter adopts the inner differential signal transmitter that has receiver.
7, a kind of connector for multi-machine communication bus comprises differential bus, it is characterized in that, also comprises bus idle state setting device and at least one communication node; Each communication node all comprises enable signal generation module, bus-type differential transmitter and differential signal receiver, and has identical connected mode;
The transmission data-signal TxD of described enable signal generation module reception HDLC protocol processor and tranmitting data register signal TxCLK and transmission are ready to signal, handle the back and send data-signal TxD ' and transmission enable signal TxEN to described bus-type differential transmitter output; Differential signal after described bus-type differential transmitter will be handled outputs on the differential bus, and the signal that its inner receiver receives sends to the bus collision detection signal input CTS of HDLC protocol processor; Described differential signal receiver receives the signal of differential bus, sends to the reception data input pin of HDLC protocol processor after the processing; Described bus idle state setting device is connected the end of differential bus.
8, connector for multi-machine communication bus according to claim 7, it is characterized in that, described enable signal generation module comprises enable signal extraction element and MUX, described enable signal extraction element receives the transmission data-signal TxD and the tranmitting data register signal TxCLK of HDLC protocol processor, signal after handling is sent to described MUX, and will send data-signal TxD ' and send to described bus-type differential transmitter, described MUX output sends enable signal TxEN to described bus-type differential transmitter.
9, connector for multi-machine communication bus according to claim 7 is characterized in that, described MUX adopts 2 to select 1 selector.
10, connector for multi-machine communication bus according to claim 7, it is characterized in that, described enable signal generation module also comprises reverser, and the transmission that this reverser receives the HDLC protocol processor is ready to signal RTS, output is sent to the other end of described MUX.
11, connector for multi-machine communication bus according to claim 7, it is characterized in that, described bus idle state generation device is composed in series successively by first resistance R 1, second resistance R 2 and the 3rd resistance R 3, and the tie point of described first resistance R 1 and described second resistance R 2 and an end of described differential bus link; The tie point of described second resistance R 2 and described the 3rd resistance R 3 and the other end of described differential bus link; The two ends of series resistance are the power end VCC and the earth terminal GND of welding system respectively.
12, connector for multi-machine communication bus according to claim 7 is characterized in that, described bus-type differential transmitter adopts the inner differential signal transmitter that has receiver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011052171A CN1157028C (en) | 2001-04-25 | 2001-04-25 | Connector for multi-machine communication bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011052171A CN1157028C (en) | 2001-04-25 | 2001-04-25 | Connector for multi-machine communication bus |
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| Publication Number | Publication Date |
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| CN1383298A true CN1383298A (en) | 2002-12-04 |
| CN1157028C CN1157028C (en) | 2004-07-07 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB011052171A Expired - Lifetime CN1157028C (en) | 2001-04-25 | 2001-04-25 | Connector for multi-machine communication bus |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101819557A (en) * | 2009-04-14 | 2010-09-01 | 威盛电子股份有限公司 | Activation and the apparatus and method that the multi-core environment on the bus is provided |
| CN103454996A (en) * | 2013-08-23 | 2013-12-18 | 广州视睿电子科技有限公司 | Master-slave computer system and control method thereof |
| CN104135411A (en) * | 2014-07-08 | 2014-11-05 | 深圳市瑞艾特科技有限公司 | Device and method of implementing multi-node communication based on RS232 interface |
| CN114144996A (en) * | 2019-06-03 | 2022-03-04 | 罗伯特·博世有限公司 | Device for a subscriber station of a serial bus system and method for communication in a serial bus system |
-
2001
- 2001-04-25 CN CNB011052171A patent/CN1157028C/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101819557A (en) * | 2009-04-14 | 2010-09-01 | 威盛电子股份有限公司 | Activation and the apparatus and method that the multi-core environment on the bus is provided |
| CN101819557B (en) * | 2009-04-14 | 2012-07-04 | 威盛电子股份有限公司 | Device and method for enabling multi-core environment provided on bus |
| CN103454996A (en) * | 2013-08-23 | 2013-12-18 | 广州视睿电子科技有限公司 | Master-slave computer system and control method thereof |
| CN103454996B (en) * | 2013-08-23 | 2016-01-27 | 广州视睿电子科技有限公司 | Host slave system and control method thereof |
| CN104135411A (en) * | 2014-07-08 | 2014-11-05 | 深圳市瑞艾特科技有限公司 | Device and method of implementing multi-node communication based on RS232 interface |
| CN114144996A (en) * | 2019-06-03 | 2022-03-04 | 罗伯特·博世有限公司 | Device for a subscriber station of a serial bus system and method for communication in a serial bus system |
| CN114144996B (en) * | 2019-06-03 | 2023-07-28 | 罗伯特·博世有限公司 | Apparatus for subscriber station of serial bus system and method for communication in serial bus system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1157028C (en) | 2004-07-07 |
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