CN1379326A - Digitalized dynamic real-time simulator based on microcomputer for electric power system - Google Patents
Digitalized dynamic real-time simulator based on microcomputer for electric power system Download PDFInfo
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- CN1379326A CN1379326A CN 02117408 CN02117408A CN1379326A CN 1379326 A CN1379326 A CN 1379326A CN 02117408 CN02117408 CN 02117408 CN 02117408 A CN02117408 A CN 02117408A CN 1379326 A CN1379326 A CN 1379326A
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Abstract
A digital dynamic real-time simulation system based on the microcomputer for electric power system is composed of microcomputer, communication card, signal I/O device and power amplifier. The signal I/O device consists of D/A converter. I/O switching card and A/D converter. Its advantages are high function extension ability, upgradting potential, and low cost.
Description
Technical field
The present invention relates to a kind of electric power digital dynamic realtime emulation device, belong to the electric system simulation device, particularly electric system simulation research and testing of equipment based on microcomputer.
Background technology
Power system real-time simulation is mainly used in the real-time testing of control and protective device, and purpose is that whether its performance of checking meets design requirement before installing, put into operation at device.Real-time simulation is divided into physical simulation emulator (dynamic model) again and based on the Real Time Digital Simulator of digital signal processor (be called for short DSP).
The physical simulation emulator is a dynamic simulation experiment, promptly adopts scaled actual physical device simulation practical power systems, protective device and controller are inserted in this system for simulating test then, and be a kind of pure object simulating emulation.Its shortcoming is that simulation system small scale, setup time are long, the experiment cost is high, and it is huge to establish the investment of dynamic model experiment chamber.
Compare with dynamic model based on digital signal processor (be called for short DSP) Real Time Digital Simulator, have the advantage of flexible design, but the realization of its simulation process still is hardware based, and price and be not less than the investment of dynamic model experiment chamber.Along with the growth of simulation system scale, the user must corresponding increase hardware device.
Summary of the invention
The present invention is directed to the shortcoming in the prior art, propose a kind of electric power digital dynamic realtime emulation device, make the Real Time Digital Simulator software replacement hardware of PC, to reduce hardware device, cost saving based on microcomputer.
The electric power digital dynamic realtime emulation device based on microcomputer of the present invention's design comprises microcomputer, address card, signal input-output device and power amplifier, and signal input-output device wherein comprises D/A transition card, I/O transition card and A/D transition card; Described address card is connected between microcomputer and D/A transition card and the I/O transition card, described power amplifier is connected the D/A transition card and is connected between D/A transition card and device to be measured or the equipment, and described A/D transition card is connected on another loop of microcomputer and device to be measured or equipment.
Plurality of advantages such as the electric power digital dynamic realtime emulation device based on microcomputer of the present invention's design is compared with existing two kinds of real-time simulation apparatus, has good function expansibility, and the upgrading potentiality are big, easy to maintenance, and expense is cheap.
Description of drawings
Fig. 1 is based on the digital dynamic realtime emulation schematic diagram of device of microcomputer.
Fig. 2, Fig. 3 are used address card circuit theory diagrams among the embodiment of apparatus of the present invention.
Fig. 4, Fig. 5 are I/O transition card circuit theory diagrams used among the embodiment of apparatus of the present invention.
Fig. 6, Fig. 7 are D/A card circuit theory diagrams used among the embodiment of apparatus of the present invention.
Fig. 8, Fig. 9 are A/D card circuit theory diagrams used among the embodiment of apparatus of the present invention.
Embodiment
Digital dynamic realtime emulation device based on microcomputer partly is made of microcomputer, address card and signal input-output device (D/A card, I/O card, A/D card) and power amplifier etc.On microcomputer, find the solution the differential equation of describing power system network, the electric parameter digital signal that simulation calculation obtains is delivered to D/A converter and power amplifier in real time by address card and I/O card.Signal after the amplification is directly sent in the protective relaying device that needs test and the controller to carry out the real-time testing of device.Simultaneously, the relay of tested person and the response signal of controller can feed back to PC in real time through A/D converter and I/O card, thereby constitute emulation test system real-time, closed loop, referring to Fig. 1.
Address card adopts PCI technology and digital processing unit (DSP) technology.Circuit theory diagrams are seen Fig. 2 and Fig. 3, and the main chip brief introduction is as follows among the figure:
Element number | Model | Functional description |
U25 | ?PCI9052 | The interface chip of pci bus and DSP |
U29 | ?TMS320C32PCA40 | The DSP central processing unit |
U28 | ?IDT7133SA25 | Dual-ported memory is used for the mutual swap data of DSP and computing machine |
U35 | ?MAX705 | Watchdog circuit is used to make DSP to reset |
U26、U27 | ?93LC46 | E 2The prom storer is used to store the configuration information of pci interface chip |
U32 | ? | 16 driver is used for bus driver |
U33 | ? | 16 bidirectional drives are used for bus driver |
U36 | ?XC9572PQ100 | CPLD is used for address decoding etc. |
U34 | ?AT29C020 | The procedure stores device is used for the work order code of memory communicating card |
U30、U31 | ?W26020AT-25 | U5, |
The principle of work of address card is:
Be inserted in the interior address card of main frame as slave, the mutual communication of computing machine and address card is to realize by 16 dual port RAMs (IDT7133) of the 4K byte that disposes in the address card.Each has bus arbitration mechanism by computing machine and DSP control in the sheet respectively for the two sets of data address wires of IDT7133 and control line, have only when from one's own side /when the BUSY pin is high level, be described the dual port RAM free time, can visit; Otherwise/BUSY pin is a low level, means that the other side is taking dual port RAM, must must wait up to/the BUSY pin is a high level.
Working method: process of simulation, i.e. the exchange of data can be undertaken by inquiry mode.Both sides notify the other side by command word and the signal lamp in the dual port RAM position of changing oneself, at the command word and the signal lamp word of dual port RAM position, know own next step work by inquiry the other side.
Preparatory stage: after address card powers on, to external memory storage W26020AT-25, carry out from program chip AT29C020 read-in programme from the 900000h start address (/INT2 ground connection) of DSP (digital signal processor) with 8 bit parallel guidance modes.At first DSP constantly sends data to each road D/A, allows the D/A chip send 0 voltage, and simultaneously and constantly read 0x1 place main command word among the dual port RAM master block address 0x0-0x3FF, the wait PC writes herein startup command word 0xA55A from the dual port RAM other end.
Simulation stage: enter simulation stage, it is that timing cycle begins to start that the DSP internal timing interrupts with the simulation step length, regularly each road current and voltage data is delivered to corresponding D/A card, is sent to power amplifier from corresponding ports by the D/A chip again.Simultaneously, the input and output data pointer is being brought in constant renewal in the external RAM, and when mistake occurring, emulation promptly stops.Internal timing interrupts 0 closes.When communication card returned 0xA66A, error code was placed in the signal lamp address.The mistake of communication card oneself newspaper is divided 3 classes: 1 badcommand; 2 buffer zones consumption is empty; 3 read datas are made mistakes.
Deliver to the expansion bus of I/O card, A/D card, D/A card by address card, wherein data are by the 1 7,416,245 16 bit data mouths that constitute, and wherein 1,24 pin (DIR) control input and output lowly are output data, highly are the input data.A slice 7416244 is as 8 bit address lines and control input-output line.
The circuit theory diagrams of I/O transition card are seen Fig. 4 and Fig. 5, and main chip is:
Element number | Model | Functional description |
U3、U4 | ?5S5/100 | Direct current 5V-5V power module is used for insulation blocking input-output unit source |
U7 | ?ATF20V8B | Programmable logic device (PLD) is used for address decoding etc. |
U1、U2 | ?74LS273 | 8 latchs are used to latch output data |
U5、U6 | ?74LS244 | 8 driver is used for bus driver |
U9、U11、U13 U15 | ?P521-4 | Photoelectric isolating device is used for insulation blocking input-output unit circuit |
Its principle of work is:
Input: when the IO card was read in the IO operation that DSP sends, IO address and RD read signal produced input operation after GAL decoding, and the signal that the coupling of 16 road optocouplers is come is read to CPU.
Output: when the IO card was write in the IO operation that DSP sends, IO address and WR write signal produced output function through GAL decoding rear panel, and the data that DSP is sent are coupled away by 16 road optocouplers.
Two 5V power modules are respectively the input and output unit insulating power supply are provided.
The circuit theory diagrams of D/A transition card are seen Fig. 6 and Fig. 7, and main chip is:
Element number | Model | Functional description |
U21~U24 | ?DAC7744 | 16 D/A chips are used for the conversion of digital quantity to analog quantity |
U17 | ?LM336-5 | 5V voltage reference chip is used to the D/A chip that reference voltage is provided |
U20 | ?MAX813 | Watchdog circuit is used to make the D/A chip reset |
DC1 | ?SR5D15/100 | Direct current 5V provides D/A chip ± 15V source to ± 15V power module |
U18 | ?ATF22V10B | Programmable logic device (PLD) is used for address decoding |
U19 | ? | 4 operational amplifiers are used for the signal adjustment |
Its principle of work is:
The voltage reference of LM336-5 output+5V, two diode D1, D2 provide temperature compensation to LM336 ,+5V voltage through operational amplifier adjustment output+10 and-10V voltage, for DAC7744 provides ± the 10V reference voltage.The RESTSEL pin of DAC7744 connects high level, the positive and negative reference voltage of output middle scale behind the DAC7744 reset command.After the I/O operation of sending the D/A data that DSP sends, data are latching to corresponding D AC7744 chip and sheet internal channel through GAL22V10 decoding.Send the I/O operation of output D/A as DSP after, through GAL22V10 decoding, the pin LOADDACs of DAC7744 produces a rising edge level to be changed, and the data that are latched into chip are converted to correspondent voltage output.The circuit theory diagrams of A/D transition card are seen Fig. 8 and Fig. 9, and main chip is:
Element number | Model | Functional description |
U37、U38 | ?AD7891-1 | 12 A/D chips are used for the commentaries on classics of analog quantity to digital quantity |
U43 | ?XC9572 | CPLD is used for address decoding |
U39~U41 | ?AD684 | Adopt guarantor's device, be used for the sampling/maintenance of A/D chip |
U44~U47 | ? | 4 operational amplifiers are used for the signal adjustment |
Its principle of work is:
DSP comprises A/D passage, working method after sending the IO operation of software startup A/D in its data, data layout and Starting mode, and the continuous read operation of DSP then, data query position D0 is 1, waits for the A/D EOC.When AD7891 (± 5V input mode) analog to digital conversion finishes, the EOC pin produces a decline and dashes along the pulse, behind XC9572, by the output of the triple gate in the XC9572 1 to data D0 position, it is 1 that DSP reads the D0 position, reading of data at once, and by XC9572 with the D0 bit clear, the inner triple gate of XC9572 becomes high-impedance state.
Used power amplifier in apparatus of the present invention is produced by Beijing Ponovo Xinli Power System Instrument Co., Ltd., and product type is PAV20B (voltage amplifier) and PAC2000B (current amplifier).
Claims (5)
1, a kind of electric power digital dynamic realtime emulation device based on microcomputer, it is characterized in that this device comprises microcomputer, address card, signal input-output device and power amplifier, signal input-output device wherein comprises D/A transition card, I/O transition card and A/D transition card; Described address card is connected between microcomputer and D/A transition card and the I/O transition card, described power amplifier is connected the D/A transition card and is connected between D/A transition card and device to be measured or the equipment, and described A/D transition card is connected on another loop of microcomputer and device to be measured or equipment.
2, simulator as claimed in claim 1, it is characterized in that wherein said address card, the interface chip U25 that comprises pci bus and DSP, DSP central processing unit U29, the dual-ported memory U28 that is used for DSP and the mutual swap data of computing machine, be used to watchdog circuit U35 that DSP is resetted, be used to store the configuration information E of pci interface chip
2Prom storer U26, U27, the driver U32 that is used for 16 of bus driver, 16 bidirectional drive U33 that are used for bus driver, the CPLD U36 that is used for address decoding etc., the program in machine code memory device U34 that is used for the work order of memory communicating card, the U5, the U6 that are used for load module and storage emulation data form 32 external memory storage U30, U31.
3, simulator as claimed in claim 1; it is characterized in that wherein said I/O transition card comprises: the power supply direct current 5V-5V power module U3, the U4 that are used for the insulation blocking input-output unit; the programmable logic device (PLD) U7 that is used for address decoding etc.; be used to latch 8 latch U1, U2 of output data; the 8 bit driver U5, the U6 that are used for bus driver are used for photoelectric isolating device U9, U11, U13, the U15 of insulation blocking input-output unit circuit.
4, simulator as claimed in claim 1, it is characterized in that wherein said D/A transition card comprises: be used for 16 the D/A chip U21-U24s of digital quantity to the analog quantity conversion, be used to the D/A chip that the 5V voltage reference chip U17 of reference voltage is provided, be used to make the watchdog circuit U20 of D/A chip reset, the direct current 5V that D/A chip ± 15V power supply is provided is to ± 15V power module DC1, the programmable logic device (PLD) U18 that is used for address decoding is used for the 4 operational amplifier U19 that signal is adjusted.
5, simulator as claimed in claim 1, it is characterized in that wherein said A/D transition card comprises: be used for 12 A/D chip U37, the U38s of analog quantity to the digital quantity conversion, the CPLD U43 that is used for address decoding, be used for adopting of A/D chip sampling/maintenance and protect device U39-U41, be used for the 4 operational amplifier U44-U47 that signal is adjusted.
Priority Applications (1)
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CNB021174083A CN1141642C (en) | 2002-04-19 | 2002-04-19 | Digitalized dynamic real-time simulator based on microcomputer for electric power system |
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CNB021174083A CN1141642C (en) | 2002-04-19 | 2002-04-19 | Digitalized dynamic real-time simulator based on microcomputer for electric power system |
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CN1379326A true CN1379326A (en) | 2002-11-13 |
CN1141642C CN1141642C (en) | 2004-03-10 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103837776A (en) * | 2014-03-17 | 2014-06-04 | 国家电网公司 | Experimental system for voltage stability testing of AC/DC parallel power network |
CN103971557A (en) * | 2014-05-21 | 2014-08-06 | 国家电网公司 | Digital dynamic real-time simulation system for power grid |
-
2002
- 2002-04-19 CN CNB021174083A patent/CN1141642C/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103837776A (en) * | 2014-03-17 | 2014-06-04 | 国家电网公司 | Experimental system for voltage stability testing of AC/DC parallel power network |
CN103971557A (en) * | 2014-05-21 | 2014-08-06 | 国家电网公司 | Digital dynamic real-time simulation system for power grid |
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CN1141642C (en) | 2004-03-10 |
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