CN1373346A - Special integrated circuit for automatic data acquisition system of electric, water and gas meters - Google Patents
Special integrated circuit for automatic data acquisition system of electric, water and gas meters Download PDFInfo
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- CN1373346A CN1373346A CN 01104293 CN01104293A CN1373346A CN 1373346 A CN1373346 A CN 1373346A CN 01104293 CN01104293 CN 01104293 CN 01104293 A CN01104293 A CN 01104293A CN 1373346 A CN1373346 A CN 1373346A
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Abstract
A special IC for automatically acquiring the data of electric, water and gas meters is composed of the counter for recording the data of different target points, 3-state gate for connecting the output of counter to data bus, encoder for encoding the parallel data to dada bus and the parallel address data of chip into serial data for output, the decoder for encoding the serial address data into parallel data and comparing it with the parallel address data of chip, and controller for controlling 3-state gate according to compared result and the encoder.
Description
The present invention relates to a kind of special IC, relate to the special-purpose counting circuit in a kind of ammeter, water meter, the gas meter automatic data acquisition system (ADAS) or rather.
For a long time, management to the employed ammeter of user, water meter, gas meter (being called for short three tables) substantially all is the pattern that adopts manual metering, calculating, charge, not only inefficiency, charge cycle are long, and may not carry out simultaneously because of each user's three tables are checked meter, also cause bigger statistics (total amount) error.The out dated management styles of for a change manually tabling look-up from door to door, the applicant has designed a kind of " ammeter, water meter, gas meter automatic data acquisition system (ADAS) " (Chinese patent 92110485.8).This system is connected and composed by central station host, 1 to n user terminal device and power transmission line, 1 to n user terminal device is separately positioned on user's three table sides, central station host and 1 to n user terminal device all are connected across on the power transmission line, and system's employing alternating current active PLC mode is carried out the data sending and receiving between central station host and each user terminal device.This system can be by managerial personnel's requirement, and each user's three table record data in the automated collection systems are in time finished consumption statistics and charge statistics.
Central station host mainly comprises computing machine, is used to modulate the data transmit circuit that sends Host Command, the data receiver circuit and the interface circuit that is connected the transmission of computing machine and data, receiving circuit that is used for each user terminal device three table usage data of demodulate reception.
The user terminal device mainly comprise from power transmission line adopt the power circuit of electricity, supply whole user terminal device work, by the order of power transmission line receiving center station host the carrier wave receiving circuit, send the data transmit circuit of three table data recording values and write down the data recording circuit of three table use amounts by electric power transfer alignment central station host.Carrier wave receiving circuit wherein mainly comprises bandpass filter and decoding circuit, and data transmit circuit wherein mainly comprises modulator, power amplifier and wave filter, and data recording circuit wherein mainly comprises counter.
System is that 1 to n user terminal device is provided with the terminal address numbering respectively, by central station host it is carried out unified data capture management.As send the address number of certain user terminal device by central station host, and send on the power transmission line with fixing carrier frequency by data transmit circuit, each user terminal device that is connected across on the power transmission line all will receive this address number, and compare with address number that self presets, have only when both numberings identical (coincideing), the carrier wave receiving circuit of this user terminal is the output decoder signal, the data that trigger the user terminal device send, the usage data that writes down in the data recording circuit is sent to data transmit circuit and transmits by power transmission line, for the data receiver circuit reception of central station host.Central station host is the volume value of each user terminal device of acquisition and recording three tables one by one in this way, the statistics of being correlated with again etc.
When stating the patented technology scheme on the implementation, particularly during the great user terminal device of production quantity, from the existing relevant integrated chip that has become commodity, select, only one of integrated circuit finished product approximately need be with 20 for each user terminal device, add other electrical equipment, the screening of so many element, welding etc. not only cause fabrication cycle lengthening, and how, line many because of element also increased probability of malfunction, and reliability index is reduced relatively.
The objective of the invention is to design the special IC of a kind of electricity, water, gas meter automatic data acquisition system (ADAS), be exclusively used in the user terminal device of ammeter, water meter, gas meter automatic data acquisition system (ADAS).
The technical scheme that realizes the object of the invention is: the special IC of a kind of electricity, water, gas meter automatic data acquisition system (ADAS), include the supply pin and the lower margin that connect internal circuit power end and ground end, and it is characterized in that also comprising:
Counting circuit is used for timing point is carried out data recording, and the counting input end of counting circuit connects the counting input pin of special IC, and the overflow position end of counting circuit connects the counting overflow position pin of special IC;
Tri-state gate circuit is used for counting circuit output is connected to data bus;
Coding circuit, be used for and from the parallel enumeration data of data bus and will weave into serial data output by sequence from the parallel address date of chip address data terminal, the serial data output terminal of coding circuit connects the serial data output pin of special IC, and the chip address data terminal connects the address date pin of special IC;
Decoding circuit is weaved into parallel data with the address date of special IC serial data address input pin input by sequence, and compares the output compare result signal with parallel address date from the chip address data terminal;
Control circuit is used for that compare result signal to decoding circuit output responds, controls the tri-state gate circuit output count data and the control coding circuit carries out exporting after the parallel/serial conversion.
Described control circuit comprises signal transformation circuit, be used to produce the signal generator in this chip signal of control source, produce the setting circuit of the counter of control signal, count by the requirement of the setting circuit of signal generator and counter by circuit requirement counter, code translator and delay circuit; Signal transformation circuit connects the compare result signal output terminal of described decoding circuit, outer meeting resistance, electric capacity pin and the control signal output pin of special IC respectively, and oscillator signal that outer meeting resistance, electric capacity produced is formed control signal by the requirement of the setting circuit of counter; The control signal output pin also connects the setting circuit of signal generator and counter simultaneously, signal generator also connects the total data output mode indication pin of special IC, the setting circuit of counter connects first of special IC respectively, second, the set end of the 3rd data output mode indication pin sum counter, the counting end of the output terminal linkage counter of signal generator and the input end of delay circuit, the output terminal of counting end connects the input end of code translator, the output terminal of code translator connects the sheet choosing end of described triple gate, and the output terminal of delay circuit connects the coding control end of described coding circuit.
Described counter is 4 binary counters, and described code translator is the 3-8 code translator.
At described total data output mode indication pin is " 0 ", described first, second, third data output mode indication pin was respectively 001,010,011,100,101 o'clock, and the frequency multiplication amount of output signal is respectively 1,2,3,4,5 on the described control signal output pin; At described total data output mode indication pin is " 1 ", described first, second, third data output mode indication pin was respectively 001,010,011,100,101 o'clock, and the frequency multiplication amount of output signal is respectively 3,5,7,9,11 on the described control signal output pin.
Described control circuit also includes a frequency multiplier circuit, and the output frequency of frequency multiplier circuit is the reference frequency of described signal generator.
The address date pin of described special IC is provided with 12, connects described coding circuit and described decoding circuit respectively.
Described counting circuit comprises 5 independently binary one 2 digit counters, described tri-state gate circuit comprises the triple gate of 5 12 inputs, output, 5 independently binary one 2 digit counters respectively with 5 12 inputs, output the corresponding connection of triple gate, the counting input end of each binary one 2 digit counter connects a counting input pin, and the overflow position end of each binary one 2 digit counter connects an overflow position pin.
Described special IC also includes serial code incoming frequency control pin, serial code output frequency control pin and serial code input/output frequency control pin, serial code incoming frequency control pin connects described decoding circuit and is connected first outer meeting resistance, serial code output frequency control pin connects described coding circuit and is connected second outer meeting resistance, and serial code input/output frequency control pin connects the common port of described decoding circuit, described coding circuit and described first, second outer meeting resistance.
Described supply pin comprises specially to first supply pin of described counting circuit power supply with to the second source pin of the circuit supply except that counting circuit.
The special IC of a kind of electricity of the present invention, water, gas meter automatic data acquisition system (ADAS), include tri-state gate circuit, 2 counting circuits of binary one, coding circuit, control and sequential circuit that decoding circuit is relevant with some, up to the present, it is also invisible to contain the commercialization integrated chip of above-mentioned functions circuit.Special IC of the present invention, the tri-state gate circuit of 12 designed control outputs, binary one 2 bit strip overflow positions and the counting circuit that energy is controlled and negative edge triggers, the parallel data of 12 bit address and data bit is converted into coding/decoding circuit of serial data etc., altogether integrated 18 logic function devices, counter in the alternative user terminal device and address setting circuit etc., and strengthened original function, as original 4 bit data that can only transmit are changed into and present can once transmit 12 bit data at every turn, make transfer rate improve more than 3 times, and reliability increases greatly, simultaneously the volume and the cost of user's terminal organ product is reduced significantly.The enforcement of this special IC makes the making of user's terminal organ become simple and make product quality that technique guarantee arranged, and will help the popularization and the use of electricity, water, gas meter automatic data acquisition system (ADAS).
Further specify technical scheme of the present invention below in conjunction with embodiment and accompanying drawing.
Fig. 1 is the building-block of logic of special integrated chip of the present invention.
Fig. 2 is a kind of use circuit diagram of special integrated chip of the present invention.
Referring to Fig. 1, special integrated chip of the present invention is the integration module of one 36 pin.Comprise address date end A0～A11, counting input end CP1～CP5 (negative edge triggering), the counting overflow position end Q1～Q4 (low level effective) corresponding, counter power source special end V with the counter of CP1～CP5
DD, serial data input end D
IN, serial data output terminal D
OUT, serial code incoming frequency control end I
SC, serial code output frequency control end O
SC, the public control end SC of serial code input/output frequency, the waveform width control end T of the identical indicator signal in address
ER, T
EC, total data output mode indication end T, first, second, third data output mode indication end (frequency multiplication indication end) T
1～T
3, control signal (frequency multiplication) output terminal F and power supply, hold V
CC, GND.
Be integrated with 19 integrated devices in the special integrated chip of the present invention, comprise 2 counting circuit J1～J5 of 5 binary ones, 5 tri-state gate circuit T1～T5,1 block encoding circuit BM, 1 decoding circuit JM, 1 delay circuit YS, one Block decoder YMQ, 14 binary counter circuit JS, 1 block signal shaping circuit ZX, 1 block count setting circuit JSZW, 1 block signal generator XHFS and a frequency multiplier circuit BP.
The parallel input end of coding circuit BM and the input end of decoding circuit JM of connecting of address date end A0～A11, insert station address numbering by outer meeting resistance, switch, when from the station address numbering data of central station host with identical frequency from serial data input end D
INAfter the input, compare through decoding circuit JM decoding and with the address date of A0～A11, when both are inequality, by decoding circuit JM to not reaction of the signal between signal transformation circuit ZX, when both identical unanimities, being jumped to the signal between signal transformation circuit ZX by decoding circuit JM is high level.
Counting input pin CP1～CP5 connects the counting input end of 2 counting circuit J1～J5 of 5 binary ones respectively, the normality of its incoming level is 5V～9V, the counting level is 0V, each 12 output terminal of 2 counting circuit J1～J5 of 5 binary ones connect each 12 input end of 5 tri-state gate circuit T1～T5 respectively, and promptly 5 tri-state gate circuit T1～T5 have constituted 2 counting circuit J1～J5 of 5 binary ones and export tri-state gate circuit between data bus to.Counting input end CP1～CP5 can be used for 5 timing points are carried out count recording, as with water meter, ammeter, gas meter (or counting range shelves) in the mechanical shift of the counting mechanism that will reflect power consumption, water consumption, the air consumption various kinds of sensors that is converted to electric signal directly be connected, as photoelectrical coupler, hall device etc.The overflow position of counting overflow position end Q1～respectively corresponding 4 counter J～J4 of Q4, its output level should be 0V～5V, can enlarge the counting range with being connected in series of CP end by the Q end.V
DDAccess aims at the power supply of 2 counting circuit J1～J5 of 5 binary ones, thereby only segment count is worked.The sheet choosing end of 5 tri-state gate circuit T1～T5 connects the output terminal of code translator YMQ respectively, can be sent each timing point data of each counter records by code translator YMQ control.
Serial code incoming frequency control end ISC is connected with the input end of decoding circuit JM respectively with the public control end S of serial code input/output frequency C, serial code output frequency control end O
SCBe connected I with the input end of coding circuit BM
SCEnd and O
SCEnd is outer meeting resistance R1, R0 respectively, the SC end then connects the common port of resistance R 1, R0, regulate the resistance of R1, R0, being respectively applied for and adjusting serial code is the incoming frequency (from central station host) of address code data and the output frequency that serial code is address date, enumeration data (sending to central station host).
The waveform width control end T that the address coincide and indicates
ER, T
ECConnect signal transformation circuit ZX, T
ER, T
ECThe difference outer meeting resistance, electric capacity, outer meeting resistance, the common port of electric capacity is ground connection then, regulate outer meeting resistance, electric capacity, with outer meeting resistance, the oscillator signal that electric capacity produced forms exportable control signal F by the requirement of count digit set chain JSZW, may command ZX output is the output waveform width (waveform and dutycycle are carried out shaping) of control signal (frequency multiplication) output terminal F pin, the width of employed pulse when control signal F that is to say the output of chip one secondary data, when the address date of numbering data and A0～A11 from the station address of central station host, through decoding circuit JM relatively after the unanimity, decoding circuit JM exports high level, but trigger pip shaping circuit ZX, trigger signal generator XHFS and count digit set chain JSZW simultaneously.By outer meeting resistance through O
SCWith the oscillation frequency of SC formation frequency multiplier circuit BP, be the reference frequency of XHFS.
Total data output mode indication end T and first, second, third data output mode indication end (frequency multiplication) indication end T
1～T
3In conjunction with, the output mode of control data, this data output mode is: the address whenever coincide and once promptly exports whole enumeration datas automatically; The address whenever coincide and once promptly exports one group of data.As: when the T=1, every reception is once from the address date of central station host and with after this address is more consistent, and one group of data of a timing point of control output only can be successively finish the enumeration data output of each timing point; When T=0, every reception is once from the address date of central station host and with after this address is more consistent, and the enumeration data of the whole timing points of control output successively automatically is until finishing.When T=1, T
1～T
3In conjunction with the frequency multiplication amount that constitutes F, when the frequency multiplication amount reaches the time that sets, count digit set chain JSZW produces a signal, to 4 binary counter circuit JS zero clearing and startup delay circuit YS, 4 binary counter circuit JS zero clearing can (J1～J5) set again, the signal generator XHFS of this moment be the signalling channel of a F to the data timing point.When T=0, T
1～T
3In conjunction with what form is that (J1～J5), the signal generator XHFS of this moment be one and produce the oscillatory signal generator by F (by waveform and the dutycycle of TER, TEC external capacitor, resistance control F), and by T for the data of exporting how many timing points successively
1～T
3Control its number of oscillation.T and T
1～T
3Truth table as follows:
| ????T | ??????????T 1～T 3 | The F multiple | ||
| ????T 3 | ????T 2 | ????T 1 | ||
| ????0 | ????0 | ????0 | ????1 | ????1 |
| ????0 | ????1 | ????0 | ????2 | |
| ????0 | ????1 | ????1 | ????3 | |
| ????1 | ????0 | ????0 | ????4 | |
| ????1 | ????0 | ????1 | ????5 | |
| ????1 | ????0 | ????0 | ????1 | ????3 |
| ????0 | ????1 | ????0 | ????5 | |
| ????0 | ????1 | ????1 | ????7 | |
| ????1 | ????0 | ????0 | ????9 | |
| ????1 | ????0 | ????1 | ????11 | |
From the address date of central station host through D
INBehind this chip of end input, decoding circuit JM decodes to the address date of this serial and compares with the geocoding of the last setting of chip address end A0～A11, when more inequality, this chip is ignored, when more identical, decoding circuit JM output confirms that selected signal is to signal transformation circuit ZX, controlling this chip then sends enumeration data, coding circuit BM (effect of time-delay be make the carrier current channel of serial data and chip exterior synchronous) under the control of delay circuit YS output signal, with the address date of enumeration data and this chip together compile into serial code by D
OUTEnd sends.During transmission, confirm selected signal and after signal transformation circuit ZX shaping output, be connected to signal generator XHFS and count digit set chain JSZW that when decoding circuit JM output signal generator XHFS and count digit set chain JSZW are at T and T
1～T
3Control under, form count pulse to 4 binary counter circuit JS, the output of 4 binary counter circuit JS is sent to code translator YMQ, forms the chip selection signal of tri-state gate circuit T1～T5, thereby has determined the sensing of timing point output data.
Referring to Fig. 2, when integrated chip of the present invention being assembled in the user terminal device of electricity, water, gas meter automatic data acquisition system (ADAS), its periphery comprises: Sensor section 21, provide being connected between the counting input end CP1～CP5 with chip, with counting overflow position end Q1～Q4 between be connected with three table counting mechanisms in being connected of displacement transducer, as directly being connected with light, fulgurite and hall device, but, shake ability when preventing incoming signal level for it is had preferably adopts trigger to insert; Data I/O part 22, provide being connected between serial I/O end DIN, the DOUT with chip, with chip frequency multiplication output terminal F between be connected with modulator-demodular unit (MODRE) between be connected, be used for follow-up half-duplex circuit is controlled and utilized power transmission line to transmit data; The geocoding of chip is provided with part 23, and A0～A11 connects DIP switch and pull-up resistor respectively, is used to set the address of this chip; The data input/output frequency part 24 is set, TSC, OSC, SC end connect resistance R 0, R1, are used for the frequency of setting data I/O; The control signal of chip is provided with part 25, by regulating resistance, the electric capacity on chip TER, the TEC end, changes signal transformation circuit ZX output waveform, dutycycle in the chip; Function setting part 26 is to output mode indication end T and the frequency multiplication indication end T1～T3 reset or set respectively of chip, to change the pattern of chip output data.
Special integrated chip of the present invention reaches purposes according to actual needs and designs, the device that is equivalent to VD5028, LJ9384, VD5026 is synthetic, because the mode that adopts the address code loopback and transmit 12 enumeration datas is simultaneously worked, once transmit 24 bit data, therefore 12 bit data that are higher than former device have revised VD5028 and VD5026 simultaneously.In addition, the counting circuit of this special integrated chip has also adopted the pattern of automatically reseting that powers on.
Claims (9)
1. the special IC of an electricity, water, gas meter automatic data acquisition system (ADAS) includes the supply pin and the lower margin that connect internal circuit power end and ground end, it is characterized in that also comprising:
Counting circuit is used for timing point is carried out data recording, and the counting input end of counting circuit connects the counting input pin of special IC, and the overflow position end of counting circuit connects the counting overflow position pin of special IC;
Tri-state gate circuit is used for counting circuit output is connected to data bus;
Coding circuit, be used for and from the parallel enumeration data of data bus and will weave into serial data output by sequence from the parallel address date of chip address data terminal, the serial data output terminal of coding circuit connects the serial data output pin of special IC, and the chip address data terminal connects the address date pin of special IC;
Decoding circuit is weaved into parallel data with the address date of special IC serial data address input pin input by sequence, and compares the output compare result signal with parallel address date from the chip address data terminal;
Control circuit is used for that compare result signal to decoding circuit output responds, controls the tri-state gate circuit output count data and the control coding circuit carries out exporting after the parallel/serial conversion.
2. the special IC of a kind of electricity according to claim 1, water, gas meter automatic data acquisition system (ADAS) is characterized in that: counter, code translator and delay circuit that described control circuit comprises signal transformation circuit, be used to produce the signal generator in this chip signal of control source, produce the setting circuit of the counter of control signal, count by the requirement of the setting circuit of signal generator and counter by circuit requirement; Signal transformation circuit connects the compare result signal output terminal of described decoding circuit, outer meeting resistance, electric capacity pin and the control signal output pin of special IC respectively, and oscillator signal that outer meeting resistance, electric capacity produced is formed control signal by the requirement of the setting circuit of counter; The control signal output pin also connects the setting circuit of signal generator and counter simultaneously, signal generator also connects the total data output mode indication pin of special IC, the setting circuit of counter connects first of special IC respectively, second, the set end of the 3rd data output mode indication pin sum counter, the counting end of the output terminal linkage counter of signal generator and the input end of delay circuit, the output terminal of counting end connects the input end of code translator, the output terminal of code translator connects the sheet choosing end of described triple gate, and the output terminal of delay circuit connects the coding control end of described coding circuit.
3. the special IC of a kind of electricity according to claim 2, water, gas meter automatic data acquisition system (ADAS) is characterized in that: described counter is 4 binary counters, and described code translator is the 3-8 code translator.
4. the special IC of a kind of electricity according to claim 2, water, gas meter automatic data acquisition system (ADAS), it is characterized in that: be " 0 " at described total data output mode indication pin, described first, second, third data output mode indication pin was respectively 001,010,011,100,101 o'clock, and the frequency multiplication amount of output signal is respectively 1,2,3,4,5 on the described control signal output pin; At described total data output mode indication pin is " 1 ", described first, second, third data output mode indication pin was respectively 001,010,011,100,101 o'clock, and the frequency multiplication amount of output signal is respectively 3,5,7,9,11 on the described control signal output pin.
5. the special IC of a kind of electricity according to claim 2, water, gas meter automatic data acquisition system (ADAS), it is characterized in that: described control circuit also includes a frequency multiplier circuit, and the output frequency of frequency multiplier circuit is the reference frequency of described signal generator.
6. the special IC of a kind of electricity according to claim 1, water, gas meter automatic data acquisition system (ADAS), it is characterized in that: the address date pin of described special IC is provided with 12, connects described coding circuit and described decoding circuit respectively.
7. the special IC of a kind of electricity according to claim 1, water, gas meter automatic data acquisition system (ADAS), it is characterized in that: described counting circuit comprises 5 independently binary one 2 digit counters, described tri-state gate circuit comprises the triple gate of 5 12 inputs, output, 5 independently binary one 2 digit counters respectively with 5 12 inputs, output the corresponding connection of triple gate, the counting input end of each binary one 2 digit counter connects a counting input pin, and the overflow position end of each binary one 2 digit counter connects an overflow position pin.
8. according to claim 1 a kind of, water, the special IC of gas meter automatic data acquisition system (ADAS), it is characterized in that: described special IC also includes serial code incoming frequency control pin, serial code output frequency control pin and serial code input/output frequency control pin, serial code incoming frequency control pin connects described decoding circuit and is connected first outer meeting resistance, serial code output frequency control pin connects described coding circuit and is connected second outer meeting resistance, and serial code input/output frequency control pin connects described decoding circuit, described coding circuit and described first, the common port of second outer meeting resistance.
9. the special IC of a kind of electricity according to claim 1, water, gas meter automatic data acquisition system (ADAS) is characterized in that: described supply pin comprises specially to first supply pin of described counting circuit power supply with to the second source pin of the circuit supply except that counting circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011042931A CN1143122C (en) | 2001-03-05 | 2001-03-05 | Special integrated circuit for automatic data acquisition system of electric, water and gas meters |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011042931A CN1143122C (en) | 2001-03-05 | 2001-03-05 | Special integrated circuit for automatic data acquisition system of electric, water and gas meters |
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| Publication Number | Publication Date |
|---|---|
| CN1373346A true CN1373346A (en) | 2002-10-09 |
| CN1143122C CN1143122C (en) | 2004-03-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB011042931A Expired - Fee Related CN1143122C (en) | 2001-03-05 | 2001-03-05 | Special integrated circuit for automatic data acquisition system of electric, water and gas meters |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105572481A (en) * | 2015-12-25 | 2016-05-11 | 哈尔滨工业大学 | Guided ammunition multipath sequential state signal measuring circuit and measuring method |
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2001
- 2001-03-05 CN CNB011042931A patent/CN1143122C/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105572481A (en) * | 2015-12-25 | 2016-05-11 | 哈尔滨工业大学 | Guided ammunition multipath sequential state signal measuring circuit and measuring method |
| CN105572481B (en) * | 2015-12-25 | 2018-08-17 | 哈尔滨工业大学 | Guided munition multichannel time sequence status circuitry for signal measurement and its measurement method |
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|---|---|
| CN1143122C (en) | 2004-03-24 |
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