CN1350354A - Minimum time controller with controllable serial capacitor compensation and its control method - Google Patents
Minimum time controller with controllable serial capacitor compensation and its control method Download PDFInfo
- Publication number
- CN1350354A CN1350354A CN 01134863 CN01134863A CN1350354A CN 1350354 A CN1350354 A CN 1350354A CN 01134863 CN01134863 CN 01134863 CN 01134863 A CN01134863 A CN 01134863A CN 1350354 A CN1350354 A CN 1350354A
- Authority
- CN
- China
- Prior art keywords
- trigger angle
- controller
- value
- alpha
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 11
- 239000003990 capacitor Substances 0.000 title claims description 12
- 230000009977 dual effect Effects 0.000 claims abstract description 7
- 230000001360 synchronised effect Effects 0.000 claims abstract description 7
- 238000006467 substitution reaction Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 6
- 230000001052 transient effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000004590 computer program Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000013016 damping Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 230000000452 restraining effect Effects 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/30—Reactive power compensation
Landscapes
- Control Of Electrical Variables (AREA)
Abstract
A minimum time controller for the compensation of controllable series capacity features as using upper level controller of upper position target trigger angle in operation control computer as the input, using synchronous signal generating circuit of linear current as the input, using synchronuos signal generating circuit of linear current as the input, using the linear current synchronous signal coming separately from actual trigger angle of upper level controllor and from synchronous signal generating circuit as the input and using the pulse generator of thyristor trigger pulse as the output. The upper level controllor includes the controller being connected with operation control computer, the dual entrance RAM and bus buffer being connected each to controllor, the digital signal processor with EERPOM and SRAM to be connected with dual entrance RAM, bus buffer and A/D digital collecting card separately. The iterative method has been applied for the control caculation of actual trigger angle in thyristor correspondingly. The present invention only has the active state responding time of loms as almost near the extreme for the system going to the stable state immediately after the saltus.
Description
Technical field
Minimum time controller with controllable serial capacitor compensation and control method thereof belong to flexible AC transmitting system controllable silicon series capacitor compensation technology field.
Background technology
The schematic diagram of thyristor controlled series capacitor technology is seen Fig. 1, L is an inductance, C is an electric capacity, Th1, Th2 are thyristors, it is for economy operation of power grid, big grid network, long distance powedr transmission and to alleviate electrical network significant to environment damage, and bottom Pulse-trigger control technology is the core technology that the actual motion to the controlled series compensation device plays a decisive role, and the minimum time bottom controller (hereinafter to be referred as the minimum time controller) that development can be dwindled controlled series compensation bottom control dynamic response time as much as possible has extremely important theory and practical significance.Because dwindle dynamic response time to bringing into play the controlled series compensation technology to greatest extent increasing system damping, improve transient stability, improving on the power line transmission power has significant role.
The essence of dwindling dynamic response time makes the silicon controlled conduction angle reach desired value as early as possible exactly.The minimum response time of at present known controlled series compensation bottom control is 30-40ms.Fig. 2 is the bottom control block diagram of GE Utilities Electric Co., when the bottom control template is promptly finely tuned after controller 1 receives the control command of upper strata controller, is I according to instantaneous capacitance voltage 2, the line current 3 of actual measurement
LineWith the charge value 4 of the thyristor branch road of flowing through, obtain to satisfy the triggering time-delay angle that control requires by searching a countermeasure bivariate table of working out in advance and be stored in to trigger in the algoritic module, be I with line current 3
LineFor synchronizing signal is implemented Pulse-trigger control.Fig. 3 is the bottom control block diagram of ABB Utilities Electric Co., SVR controller (synchronizing voltage upset controller) the 5th, its bottom control module, it with line current 3 as synchronizing signal, order according to the upper strata controller, instantaneous capacitance voltage 2 and line current 3 to actual measurement calculate actual thyristor trigger angle, but the SVR control algolithm is to be based upon on the less basis of the angle of flow, and when the angle of flow was big, there was bigger error in this control mode.Their common drawback is: except will also needing to gather other system's electric weight with line current 3 as the synchronizing signal, restraining factors are more, and algorithm is with regard to more complicated, and the speed that implements can be not fast yet, thereby influenced the minimizing of dynamic response time.
Summary of the invention
The object of the present invention is to provide a kind of except will not needing to gather again the minimum time controller with controllable serial capacitor compensation and the control corresponding algorithm of other system's electric weight with line current 3 as the synchronizing signal.
The invention is characterized in that it contains: the upper strata controller that input links to each other with upper industrial computer target trigger angle output, input signal is the synchronous signal generating circuit of line current, and input signal is respectively from the actual trigger angle signal of upper strata controller with from the line current synchronizing signal of synchronous signal generating circuit and output signal is the pulse generator of thyristor trigger impulse; Wherein, the upper strata controller contains: through the PCI9080 controller of pci bus and the interconnection of upper industrial computer, separately with the dual port RAM and the bus buffer of PCI9080 controller interconnection, have EEPROM and SRAM and respectively with dual port RAM, the digital signal processor DSP of bus buffer interconnection is through the A/D data collecting card of bus interface 3XBUS and digital signal processor DSP interconnection; Described line current is from bus interface 3XBUS, described actual trigger angle through serial ports from digital signal processor DSP.The designed control method of upper strata controller in the described minimum time controller with controllable serial capacitor compensation is that the control algolithm of actual trigger angle is characterized in that it contains following steps successively:
(1) after the initialization, in digital signal processor DSP, sets: original trigger angle α according to the instruction of upper industrial computer
1, target trigger angle α
2, value and the relational expression of controlled series compensation parameter inductance L, capacitor C and ε: initial conduction angle
1=π-α
2
(2) instruction according to upper industrial computer deposits following algorithm routine code in EEPROM:
C
2=cosα
1?tan(k(π-α
1))+ksinα
1;
(3) according to upper industrial computer instruction, original trigger angle α
1With target trigger angle α
2Value substitution C
1, C
2Calculating formula, draw constant C
1, C
2
(4) value of calculating intermediate variable σ;
(5) obtain θ according to the value of σ
2Value;
(6) judge θ
1-θ
2<ε?, the very little value of ε for setting,
If θ
1-θ
2〉=ε then makes θ
1=θ
2And return execution in step (4),
If θ
1-θ
2<ε then carries out next step;
(7) calculate actual trigger angle α=π-θ
1Value;
(8) digital signal processor DSP sends thyristor triggering signal to pulse generator by actual trigger angle α through serial ports, i.e. the bottom control signal;
(9) return reset condition.
Use proof: the designed minimum time controller of the present invention can narrow down to 10-20ms with the dynamic response time of controlled series compensation bottom control.
Description of drawings
Fig. 1: controlled series compensation schematic diagram.
Fig. 2: the bottom control theory diagram of GE Utilities Electric Co..
Fig. 3: the bottom control theory diagram of ABB Utilities Electric Co..
Fig. 4: bottom control theory diagram of the present invention.
Fig. 5: the circuit block diagram of upper strata of the present invention controller and and the annexation figure of upper industrial computer, pulse generator thereof.
Fig. 6: the waveform key diagram of bottom control algorithm of the present invention.
Fig. 7: upper strata of the present invention controller is in order to the computer program FB(flow block) of explanation control algolithm.
Fig. 8: the calculated examples process that is used for key diagram 7 computer program flow charts.
Fig. 9: the process exploded view that is used to illustrate the stable state → transient process → stable state waveform of effect of the present invention.
Embodiment
Ask for an interview Fig. 4 and Fig. 5, the annexation of its each square frame is as above-mentioned.Digital signal processor DSP adopts chip TMS320C32, the A/D data collecting card adopts chip AD7874X2, EEPROM adopts chip SST29010, SRAM adopts chip I SSI128K*8, dual port RAM adopts chip id T133*2, and logic controller adopts chip Altera max7196, and bus buffer adopts chip 16245*2, serial ports adopts RS232, and the method for attachment between its pin and the pin is the conventional method of regulation during chip uses.Key wherein is: except will with data collecting card A/D from collection in worksite again through bus interface 3XBUS transmit and the line current expressed with digital quantity 3 as synchronizing signal, data collecting card A/D needn't gather other system's electric weight again, only need calculate and get final product the parameter of controlled series compensation self, thereby algorithm is simple, speed is fast, has shortened dynamic response time.
Ask for an interview Fig. 6, it is used to illustrate initial angle of flow rule.When the thyristor trigger angle was constant, the capacitance voltage zero crossing was constantly constant; When the thyristor triggering moved forward constantly, the capacitance voltage zero crossing also can correspondingly move forward constantly.The basic principle that the present invention proposes based on the constant predictive control algorithm of capacitance voltage peak value be exactly value by providing a thyristor trigger angle more less relatively than target trigger angle be actual trigger angle, make the capacitance voltage peak value of next half period can reach desired value soon, then as long as periodically send trigger impulse according to the null value of line current 3 and the value of target trigger angle, just can make the capacitance voltage peak value maintain desired value, thereby make system enter stable state rapidly.This can be as seen from Figure 9: by adjusting the value of trigger angle in advance, can make system enter stable state rapidly, the transit time that between two stable states of system, only has half period (10ms), the bottom control time that this means controlled series compensation has been shortened widely, and 10ms has been the minimum value of controlled series compensation bottom control time in fact.Generally speaking between 30-40ms, wherein, the 6th, stable state, the 7th, transient process.
Goodbye Fig. 7, its calculated examples is seen Fig. 8.It is original trigger angle α according to self parameter of controlled series compensation only
1, target trigger angle α
2And inductance L, the just available iterative approximation of capacitor C obtain the actual trigger angle α of thyristor, uses line current 3 as synchronizing signal again, makes pulse generator provide trigger impulse constantly based on the zero passage of line current 3, just can make system enter stable state rapidly.Wherein, the code storage of this control algolithm is in EEPROM, and the execution of algorithm is realized by data signal processor DSP.
Claims (2)
1, a kind of minimum time controller with controllable serial capacitor compensation, contain the upper strata controller, it is characterized in that it contains: the upper strata controller that input links to each other with upper industrial computer target trigger angle output, input signal is the synchronous signal generating circuit of line current, and input signal is respectively from the actual trigger angle signal of upper strata controller with from the line current synchronizing signal of synchronous signal generating circuit and output signal is the pulse generator of thyristor trigger impulse; Wherein, the upper strata controller contains: through the PCI9080 controller of pci bus and the interconnection of upper industrial computer, separately with the dual port RAM and the bus buffer of PCI9080 controller interconnection, have EEPROM and SRAM and respectively with dual port RAM, the digital signal processor DSP of bus buffer interconnection is through the A/D data collecting card of bus interface 3XBUS and digital signal processor DSP interconnection; Described line current is from bus interface 3XBUS, described actual trigger angle through serial ports from digital signal processor DSP.
2, the designed control method of upper strata controller in the minimum time controller with controllable serial capacitor compensation according to claim 1 is that the control algolithm of actual trigger angle is characterized in that it contains following steps successively:
(1) after the initialization, in digital signal processor DSP, sets: original trigger angle α according to the instruction of upper industrial computer
1, target trigger angle α
2, value and the relational expression of controlled series compensation parameter inductance L, capacitor C and ε: initial conduction angle
1=π-α
2
(2) instruction according to upper industrial computer deposits following algorithm routine code in EEPROM:
C
2=cosα
1?tan(k(π-α
1))+ksinα
1;
Wherein,
σ is an intermediate variable;
(3) according to upper industrial computer instruction, original trigger angle α
1With target trigger angle α
2Value substitution C
1, C
2Calculating formula, draw constant C
1, C
2
(4) value of calculating intermediate variable σ;
(5) obtain θ according to the value of σ
2Value;
(6) judge θ
1-θ
2<ε?, the very little value of ε for setting,
If θ
1-θ
2〉=ε then makes θ
1=θ
2And return execution in step (4),
If θ
1-θ
2<ε then carries out next step;
(7) calculate actual trigger angle α=π-θ
1Value;
(8) digital signal processor DSP sends thyristor triggering signal to pulse generator by actual trigger angle α through serial ports, i.e. the bottom control signal;
(9) return reset condition.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB011348631A CN1172414C (en) | 2001-11-16 | 2001-11-16 | Minimum time controller with controllable serial capacitor compensation and its control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB011348631A CN1172414C (en) | 2001-11-16 | 2001-11-16 | Minimum time controller with controllable serial capacitor compensation and its control method |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1350354A true CN1350354A (en) | 2002-05-22 |
CN1172414C CN1172414C (en) | 2004-10-20 |
Family
ID=4672804
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB011348631A Expired - Fee Related CN1172414C (en) | 2001-11-16 | 2001-11-16 | Minimum time controller with controllable serial capacitor compensation and its control method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1172414C (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110989649A (en) * | 2019-12-26 | 2020-04-10 | 中国航空工业集团公司沈阳飞机设计研究所 | Flight action control device and training method for high-maneuvering fixed wing unmanned aerial vehicle |
-
2001
- 2001-11-16 CN CNB011348631A patent/CN1172414C/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110989649A (en) * | 2019-12-26 | 2020-04-10 | 中国航空工业集团公司沈阳飞机设计研究所 | Flight action control device and training method for high-maneuvering fixed wing unmanned aerial vehicle |
CN110989649B (en) * | 2019-12-26 | 2023-07-25 | 中国航空工业集团公司沈阳飞机设计研究所 | Flight action control device for high-maneuver fixed-wing unmanned aerial vehicle and training method |
Also Published As
Publication number | Publication date |
---|---|
CN1172414C (en) | 2004-10-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103269176B (en) | Inverter control method based on fractional order PI forecasting function | |
CN100536314C (en) | Micro fuel engine power generation excitation control and protection device and method based on DSP | |
Jie et al. | Research on the MPPT algorithms of photovoltaic system based on PV neural network | |
CN103532459A (en) | Linear servo motor control method for numerically-controlled machine tool driving | |
CN106647921B (en) | Mitigate the improvement MPPT algorithm that local shades influence on photovoltaic system | |
CN102291072A (en) | Simple and highly-efficient hybrid stepper motor driving device | |
CN113193755B (en) | Multi-port converter based on topology integration, control method and system | |
CN1350354A (en) | Minimum time controller with controllable serial capacitor compensation and its control method | |
CN1127188C (en) | Dynamic analog device of controllable serial capacitors compensation | |
CN206807297U (en) | A kind of wide range input converting means grid-connected for distributed power source | |
CN112003271B (en) | Converter access alternating current micro-grid stability analysis method based on distributed impedance criterion | |
CN112510710B (en) | Constant value conversion method and system for injection voltage mode of distributed power flow controller | |
CN106549393B (en) | Static Var Compensator DC bus capacitor capacitance and average voltage choosing method | |
Ibbini et al. | A simscape based design of a global maximum power point tracker under partial shading condition | |
Li et al. | A novel simulation method for power electronics: Discrete state event driven method | |
CN102868174B (en) | Photovoltaic grid-connected system for restraining chaos based on DSP (Digital Signal Processor) as well as working method thereof | |
CN200950233Y (en) | DSP-based dynamic voltage compensator control device | |
CN106787772A (en) | A kind of doubleway output DC DC changer systems and its control method | |
Diaz et al. | Implementation of Nonlinear power flow controllers to control a VSC | |
CN103560658B (en) | The cyclic swing suppressing method of photovoltaic power generation system current in direct-current grid | |
Mates | A new power flow method for radial networks | |
CN106849127A (en) | A kind of static reactive controller based on DSP and FPGA | |
Choorakuzhiyil et al. | Comparative analysis of maximum power point tracking techniques for photovoltaic systems | |
CN2594490Y (en) | Programmable speed-adjusting of step-by-step water turbine | |
Xing et al. | ANALYSIS ON ERROR TEST OF PV MODEL BASED ON DC-DC CONVERTER |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |