CN1347062A - Gigabit IP network card - Google Patents

Abstract

A gigabit IP network card (layer-3) as a main interface of IP network is characterized by that the novel logic control module and software driver are developed to directly exchange or transmit the IP packets on the third layer, so eliminating the second layer subnetwork, the IP over optics technique is used, and the IP over WDM is compatible.

Description

Gigabit IP network card

One, technical field the present invention relates to a kind of computer network communication interface.

Two, background technology

Present networks, they typically use low layer " subnet " technology and finish corresponding data transmission when carrying out IP communication.These subnetwork techniques, existing LAN subnet (for example, Ethernet, Token Ring, FDDI etc.), also have the WAN subnet (for example, static and dynamic point-to-point link, X.25, FA, ATM, multi-megabit data, services of exchange (SMDS) or the like).Each subnet in these subnets all has home address form and frame format separately.Existing field of some subnetwork techniques also has the tail field, and some only encapsulates IP with a stature.Every kind of technology all operates on single speed or the speed collection.

Ultimate principle in when transmission is: must at first by network interface card its frame format according to subnet be encapsulated transmission when sending the IP bag, receiving end such as seals off again at processing.That is, the IP bag that is in the 3rd layer (network layer) is delivered to the transmission of subnet layer earlier, goes up the 3rd layer at receiving end by the subnet layer again and handles, and in bag (frame) form, adopts the form that encapsulates and seal off packet header.This process is handled loaded down with trivial details, causes very big waste, comprises the control of various subnet layers, management etc., and, influence the network transmission efficiency because redundant information is many, do not meet communication idea effectively reliably.Because the systematic comparison complexity, its operating cost is also than higher.

In the high-speed transfer field, two kinds of IP tranmission techniques are arranged at present, IP over SDH and IP over ATM.These two kinds of technology all respectively have its limitation.So-called on SDH, transmit IP, be actually by IP being encapsulated into PPP(Point-to-Point Protocol) frame, and then mapping advances in the SDH frame to transmit.This method infrastructure is complete, operating cost is low, network is simple, but its efficient is not very high, and transmission speed also is restricted.Transmitting IP on ATM is a kind of more effective transfer approach, and this method has good quality of service to guarantee and good multimedia communication ability usually, but this system is generally comparatively complicated and operating cost is also higher.

Three, summary of the invention

Gigabit IP network card (the 3rd layer) belongs to the computer networking interfacing equipment, and it provides optical fiber gigabit rate interface as the Standard PC I equipment of PC, realizes the direct transmission of packet at network layer (the 3rd layer).

Technical matters to be solved by this invention: overcome the IP data envelope and dress up the disadvantage that the subnet frame is brought, realize the IP bag directly and is at high speed transmitted (the 3rd layer).The technical scheme of Cai Yonging is to design to be used for the IP network card that PC (or router) is gone up communication interface for this reason, it is characterized in that, it mainly comprises: pci interface chip, data buffering, additional busses transceiver module, photosignal modular converter, Logic control module, they are electrically connected mutually, and corresponding software driver; Use ANSI X3T11 optical channel standard, the IP packet is placed directly on the optical fiber transmits; When receiving data, the data light signal is come in from the photosignal modular converter, convert electric signal to, arrive the additional busses transceiver module again, carry out partial decoding of h (asynchronous system) and string and conversion by this module, arrive the data buffering module again, processing speed with the coupling receiver, pass through pci interface chip again, pci interface chip is used for handling the pci bus agreement, data stream is sent to pci bus then, and process of transmitting is then opposite, and Logic control module plays coordination control action and the part encoding and decoding work between each module simultaneously; Software driver adopts self-defining Handshake Protocol, controls the communication between two network interface cards.

The advantage of this invention: gigabit IP network card is as the main interfacing equipment of IP network, entire I P bag do not taken apart to be placed directly on the optical fiber transmit.This is not traditional IP over LAN, and is based on a kind of direct, following IP network.Its concrete advantage is as follows:

1. owing to saved the package of the second layer and separated packet procedures, saved the time of Computer Processing.Particularly for the data of high-speed transfer, its effect is more obvious.

2. removed the redundant information of the second layer.Such as Ethernet, each frame data can save the redundant data (802.3) of 26 bytes, has improved transfer efficiency so greatly.

3. the complicacy of realization is significantly reduced.As everyone knows, have tens kinds of host-host protocols at the second layer of network, as Ethernet, FDDI, token-ring network, X.25, ATM, ARP, PPP or the like.Not only will realize these agreements, also will increase the management and the control function of various subnet layers, this has increased the complicacy of programming, has therefore also caused the instability of system.And the IP packet is directly transmitted, and by the change driver, making it to adapt to various links, then various subnets all can save, so its realization also will be simplified greatly.

4. can combine with existing IP switching technology and IP over WDM, realize real IP exchange transmission and all-optical network.

5. be the main interfacing equipment of following pure IP network.

Gigabit IP network card has many applications, is mainly used in the function that the P networking directly connects or realize by the change driver gigabit ethernet card.It more lays particular emphasis on the important interface equipment as following pure IP network (various subnet disappearance).

Four, description of drawings

Fig. 1 gigabit IP network card typical case effect figure

Fig. 2 gigabit IP network card hardware module figure

Fig. 3 gigabit IP network card driver flow process

Five, specific embodiments

This PCI-Express mainly comprises: hardware network interface card and corresponding software driver, the technical scheme of being finished is to use ANSI X3T11 optical channel standard, the IP packet is placed directly on the optical fiber transmits, data stream is according to the photosignal modular converter, and------flow process of data buffering---pci interface chip---pci bus flows the additional busses transceiver module, and Logic control module plays the coordination control action between each module simultaneously; Software driver adopts self-defining Handshake Protocol, controls the communication between two network interface cards, and can realize the function of gigabit ethernet card.This network interface card can be with the speed rates of 1Gbps.Its typical case uses as accompanying drawing 1, in this pure IP network, gigabit IP network card is adopted in connection between the network equipment port, finish the function that directly and at high speed transmits the IP bag at the 3rd layer, switch or router use IP exchange or IP overWDM technology, in addition, this network provides the interface that connects other traditional subnets.So not only can support existing miscellaneous service, and simplify network widely and realized and operating cost.

Physical layer can have following selection: 1000BASE-CX (short distance copper cash), 1000BASE-LX (long wavelength light, can longer Distance Transmission when using preferably single mode light), 1000BASE-SX (short-wavelength light, use the short wavelength laser transceiver, operate on the multimode optical fiber, distance is short).

A. gigabit IP network card hardware is realized

Module such as accompanying drawing 2, this card hardware mainly comprises: pci interface chip, data buffering, additional busses transceiver module, photosignal modular converter, Logic control module, they are electrically connected mutually.Use ANSI X3T11 optical channel standard, the IP packet is placed directly on the optical fiber transmits.When receiving data, the data light signal is come in from the photosignal modular converter, convert electric signal to, arrive the additional busses transceiver module again, carry out partial decoding of h (asynchronous system) and string and conversion, arrive the data buffering module again by this module, processing speed with the coupling receiver, by pci interface chip, pci interface chip is used for handling the pci bus agreement again, and data stream is sent to pci bus then.Process of transmitting is then opposite.Logic control module plays coordination control action and the part encoding and decoding work between each module simultaneously.Below each module is described

Pci bus interface chip: be responsible for communicating by letter, finish the conversion and the coupling of bus signals, generate the additional busses interface (Add-On Bus) that the user can oneself develop simultaneously with each protocol signal of pci bus.This network interface card uses AMCC S5933 chip, also can use the alternative chip of similar functions.

NVRAM (non-volatile RAM): the responsible configuration space information that provides the PCI agreement to need to the pci bus interface chip.This network interface card uses the AT24C02 chip, also can use the alternative chip of similar functions.

Data buffering FIFO: accept and send buffering, realize FIFO two ends data rate.This network interface card uses the IDT72V273L10PF chip, also can use the alternative chip of similar functions.

Logic control module: mainly be responsible for the communication between each chip, utilize independently developed agreement to control various transmission logics, provide the programming Control interface for hardware circuit and upper layer drivers simultaneously.This network interface card uses EPM7128AELC84-7 (being used for low speed) and EPM7032AELC44-4 (being used at a high speed) chip, also can use the alternative chip of similar functions.

Additional busses transceiver module: divide to send and receive two aspects: when sending data, be responsible for the data of coming from data buffer FIFO are carried out code conversion and parallel/serial conversion, make it to be adapted to the physical transfer characteristic; When accepting data, accept the serial bit stream of the gigabit level that the physics modular converter sends, finish coding and serial/parallel conversion, deliver to FIFO, and synchronous clock is provided.This network interface card uses AMCC S2061 chip, also can use the alternative chip of similar functions.

Photosignal modular converter: adopt optical transceiver, be responsible for light and electric mutual conversion.

B. Logic control module

Logic control module adopts the online erasable chip of CPLD.This part is the core of whole hardware circuit, also is the core of this technology specific implementation.This module adopts two logic control chips, and high-speed programmable chip CPLD_H is used to control sequential logic between additional busses transceiver module, photosignal modular converter and the data buffering, send and interrupt and instruction and synchronous coding such as enable; Low speed programmable chip CPLD_L is used to control the sequential logic between pci interface chip, data buffering and the additional busses transceiver module and sends and enables and instruction such as stop.

Use the VHDL hardware description language to programme, utilize fever writes then the burned CPLD of program.Below respectively to its explanation:

(1.CPLD_H being used for high speed logic control)

1.1 flag information

Packet header: utilize K28.5 to realize the opening flag of data or message bag

Bell idles: utilize K28.3 to fill in the process of transmitting, FIFO is read the filling of data on the circuit under the empty situation.

End-of-packet: utilize K28.1 to realize the end mark of data or message bag

1.2 logic event

1.2.1 process of transmitting

CPLD_H is according to input signal PTBURST#, PTWR, and fast signal, the spacing wave of expiring that sends FIFO, generates following control signal: KGEN, TK0, TK1, FRAME, HS_REN# operates:

Start to send the affairs condition: when PTBURST# rising edge and PTWR be with effect (==1); Or when FIFO expires soon.Attention: whether first kind of triggering is carried out and will be seen and whether be in transmit status, sends affairs if not then carry out, on the contrary then not action.

Send the affairs behavior: after triggering the transmission condition and satisfying, at first send if 10 K28.3 synchronization characters are right after and send a package K character (K28.5), and open send FIFO read to enable HS_REN#==0, make next clock begin to send data; Enter the spacing wave of checking FIFO.When detecting the FIFO sky, send package termination character (K28.1) immediately, it is invalid to read to enable HS_REN#, finishes this transmission.

1.2.2 receiving course

CPLD_H generates following control signal according to input signal RBC1, RBC0, FP, LOCKDET, KFLAG, BYTEER, RK0, RK1: receive frequency RBC1, RBC0, HR_WEN#, CONNECTION_1, CONNECTION_2, HR_RST# operate:

Start the condition that receives affairs: under LOCKDET (1), BYTERR (0) normal condition, when detecting a bag beginning flag K28.5

The time, start the reception affairs.

Receive the affairs behavior: after the triggering condition of acceptance satisfies, empty and receive FIFO (HR_RST#==0), open the write-enable signal (HR_WEN#==0) that receives FIFO, guarantee to write reception FIFO at next clock, put CONNECTION==1 CONNECTION==0 simultaneously, the expression data arrive.When detecting the end-of-packet sign, close write-enable signal (HR_WEN#==1), put CONNECTION=0CONNECTION=1 simultaneously, the expression Data Receiving finishes.

(2.CPLD_L being used for LSL control)

2.1 initialization is provided with limb

2.2 transmission affairs

According to the variation of PCI_addon limb PTBURST#, PTATN#, PTWR, produce write-enable LS_RST#, the LS_WEN# signal of control information: S_FIFO.

The generation of LS_RST#: detect limb PTBURST# (negative edge), the PTWR (1 writes) of PCI_addon, then empty S_FIFO (negative edge of LS_RST#)

The generation of LS_WEN#: when PTWR (1), PTBURST# (0), PTATN# (0), LS_WEN#==0 is set, promptly opens and write.

2.3 reception affairs

PTBURST#, PTATN#, PTWR according to empty sign of the LR_EF/OR# that receives FIFO and PCI produce interrupt request, and R_FIFO read enable signal LR_REN#.

Interrupt to produce:, submit an interrupt notification (write the OUT_Mail_boxl of ADD_ON end, i.e. ADR[6_2]==00100) to the upper strata according to the spacing wave (EF/OR# is non-by space-variant) that receives FIFO

The generation of LR_REN#: when PTWR (0), PTBURST# (0), PTATN# (0), LR_REN#==0 is set, promptly opens and read.

2.4 interrupt notification

Use the BYTEO of the OUT_MAILBOXO of PCI_ADDON to produce the PCI end and interrupt ADR[6:2] be chosen as 00100, BE[3:0] value is 1110.

3. part truth table

FP	?RK1	?RK0	?KFLAG	?STATE
						?1	?0	?0	?1	The K28.5 free time	COMMA
?0	?O	?1	?1	The K28.1 request	COMMA
						?0	?1	?0	?1	K28.3 confirms
?0	?1	?1	?1	K28.7 makes mistakes	COMMA
						?0	?0	?0	?0	The Data data

C. software is realized

1. general description: use LINUX operating system.Characteristics: this software driver uses handshake to the big buffer zone of system's application (32K) twice before sending or receiving, and inserts control character to data stream in the transmission, and leaves the software interface module of gigabit ethernet card function.Driver process flow diagram such as accompanying drawing 3, program step:

(1) during loading procedure, the original state variable is set

(2) process of transmitting sends solicited message to the other side, and the receiving course of opposite end sends confirmation after receiving solicited message.

(3) process of transmitting is got ready, and receives from application program after the data and inserts control character to data stream, information such as initial, the end of this control character identification data packet, burst.Meanwhile, the opposite end receiving course is prepared to receive to the big buffer zone of system's application (32K).Leave the functional interface module of finishing gigabit ethernet card in this process,, then call the routine of encapsulation or dismounting Ethernet frame head if that is: carry out the Ethernet card function, and the routine that has various Ethernet frame heads to analyze, can be made as muddy pattern.

(4) process of transmitting sends data, when receiving course arrives in data, promptly produces and interrupts, and call the reception routine simultaneously.Receive routine according to control character information, receive packet, and remove control character.

(5) process of transmitting wait acknowledge if do not receive confirmation at the fixed time then overtime, returns error message.Overtime as if not having, it is correct to judge whether from confirmation that then the opposite end receives.If not, returned for the 3rd step.Receiving end is subjected to successfully receiving, and sends confirmation, discharges resource then, waits for new task.Otherwise its request transmitting terminal is retransmitted.

(6) transmitting terminal discharges resource, waits for new task

2. basic function explanation:

(1) loads

Function name: int init_module (void)

Function: the system manager loads driver in calling the insmod process with modular form, init_module call the back guiding, function such as open and seek equipment, device registration resource, and activating.

(2) unloading

Function name: void cleanup_module (void)

Function: the system manager unloads driver in calling the rmmod process with modular form, and cleanup_module calls kernel function releasing arrangement resource (interruption, equipment)

(3) leader A

Function name: ip2k_pci_probe ()

Function; Utilize function pci_find_class () to seek devices needed, utilize the PCI device parameter that the DEVICE structure is set, utilize leader B, i.e. ip2k_pci_probel (), and ip2k_pci_open (), registration IO address, interrupt resources, and activate.

(4) leader B

Function name: static struct device ^*Ip2k_pci_probel (struct device ^*Dev, long ioaddr, int irq)

Function: according to the DEVICE structure of the equipment that searches out among the leader A, and the IO that reads, IRQ distribution structure be to these resources of system registry, and the parameter type among the relevant DEVICE is set.

(5) open

Function name: int ip2k_pci_open (struct device ^*Dev)

Function: registration interrupt, be provided with this card the self structure parameter, open the handshake state base (no task) of time, this card, agreement duty (not being in a hurry), be ready to, and interrupt empty, module addend, and physical equipment resets.

(6) close

Function name: int ip2k_pci_close (struct device ^*Dev)

Function; Discharge the self structure parameter of interrupting, this card being set, the handshake state base (free time) of opening time, this card, agreement duty (not being in a hurry), unripe, module subtrahend.

(7) send

Function name: static int ip2k_pci_output (struct sk_buff ^*Skb, struct device ^*Dev)

Function: the packet (IP) from protocol stack acceptance will send, carry out necessary processing (formation frame), application sends, enter and interrupt intercepting, after regulation obtains confirmation in the time limit, start the PT burst mode and send data, enter wait acknowledge, finish this transmission at last.In addition, send the transmission Information Statistics that are necessary in the function.

(8) receive

Function name: static int ip2k_pci_input (struct device ^*Dev)

Function; Start by interrupt call, be responsible for read data packet (IP) from the physical equipment, do necessary error check after, send confirmation of receipt information, or request repeat information (reality do not carry out this step, has directly sent confirmation).To receive bag and put into the skb structure, and fill in relevant information, and call kernel function and give the upper-layer protocol stack.

(9) interrupt service routine

Function name: static void ip2k_interrupt (int irq, void ^*Dev_id, struct pt_regs ^*Regs)

Function: be responsible for Interrupt Process, finish control messages and send, data transmit-receive and have off status to coordinate.

(10) configuration

Finish the PCI configuration information, write EEPROM.This work can be transferred to the function program that AMCC carries and finish, and also can finish by writing the IO programming.

(11) reconstruct header

Do-nothing function.Only finish the filling of device data structure, do not finish actual functional capability.(it is to consider the needs of making other protocol communication card from now on that this function still is set herein)

3. important data structures

The IP phonecard chain structure:

Struct ip2k_pci_card{ struct ip2k_pci_card * next;＜!--SIPO＜DP n=" 5 "〉--〉＜dp n=" d5 "/struct device * dev; Struct pci_dev * pci_dev; ; Static struct ip2k_pci_card * ip2k_card_list=NULL; Struct net_local{struct net_device_stats stats; Long open_time; / * Useless example local info.*/unsigned short task; / * recording status */}; Self-defined structure; Struct ip2k_head{unsigned int len; / * 4bytes comprises IP bag additional length */unsigned short protocol; / * 2bytes*/unsigned char append; / * lbytes*/unsigned char mess; / * lbytes*/};

Write down skb-＞len (4) respectively, skb-＞protocol (2), byte of padding length (1), message (1)

4. control command is stipulated

The whole signal macro definition of sequence number value

1 idle IP2K_IDLE 0 * 0F

2 requests send IP2K_REQ 0 * F0

3 confirm to send IP2K_ACK 0 * C3

4 data send beginning IP2K_DATA_STAR 0 * 3C

T

IP2K_DATA_SEND 0 * AA during 5 data send

6 correct affirmation IP2K_OK 0 * 33

7 request repeat IP2KR_T 0 * 99

8 prepare to receive IP2K_DATA_RECE 0 * 66

Claims (3)

1. gigabit IP network card is characterized in that it mainly comprises: pci interface chip, data buffering, additional busses transceiver module, photosignal modular converter, Logic control module, and they are electrically connected mutually, and corresponding software driver; Use ANSI X3T11 optical channel standard, the IP packet is placed directly on the optical fiber transmits; When receiving data, the data light signal is come in from the photosignal modular converter, convert electric signal to, arrive the additional busses transceiver module again, carry out partial decoding of h (asynchronous system) and string and conversion by this module, arrive the data buffering module again, processing speed with the coupling receiver, pass through pci interface chip again, pci interface chip is used for handling the pci bus agreement, data stream is sent to pci bus then, and process of transmitting is then opposite, and Logic control module plays coordination control action and the part encoding and decoding work between each module simultaneously; Software driver adopts self-defining Handshake Protocol, controls the communication between two network interface cards.

2. gigabit IP network card according to claim 1, it is characterized in that: Logic control module adopts two logic control chips, high-speed programmable chip CPLD_H to be used to control sequential logic between additional busses transceiver module, photosignal modular converter and the data buffering, to send and interrupt and instruction and synchronous coding such as enable; Low speed programmable chip CPLD_L is used to control the sequential logic between pci interface chip, data buffering and the additional busses transceiver module and sends and enables and instruction such as stop.

3. gigabit IP network card according to claim 1, it is characterized in that: software driver is taked the following step:

(1) during loading procedure, the original state variable is set;

(2) process of transmitting sends solicited message to the other side, and the receiving course of opposite end sends confirmation after receiving solicited message;

(3) process of transmitting is got ready, from application program, receive after the data and insert control character to data stream, information such as initial, the end of this control character identification data packet, burst, meanwhile, the opposite end receiving course is prepared to receive to the big buffer zone of system's application (32K);

(4) process of transmitting sends data, when receiving course arrives in data, promptly produces and interrupts, and call the reception routine simultaneously, receives routine according to control character information, receives packet, and removes control character;

(5) process of transmitting wait acknowledge, if do not receive confirmation at the fixed time then overtime, return error message, if do not have overtime, it is correct to judge whether from confirmation that then the opposite end receives, if not, returned for the 3rd step, receiving end is after successfully receiving, send confirmation, discharges resource then, wait for new task, otherwise its request transmitting terminal is retransmitted:

(6) transmitting terminal discharges resource, waits for new task.

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