CN1329986C - Static discharge protection element for integrated circuit input - Google Patents
Static discharge protection element for integrated circuit input Download PDFInfo
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- CN1329986C CN1329986C CNB021526508A CN02152650A CN1329986C CN 1329986 C CN1329986 C CN 1329986C CN B021526508 A CNB021526508 A CN B021526508A CN 02152650 A CN02152650 A CN 02152650A CN 1329986 C CN1329986 C CN 1329986C
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- static discharge
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- discharge protector
- electric static
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Abstract
The present invention provides an electrostatic discharge protecting element. As an electrostatic discharge protecting element of an integrated circuit with an input connecting pad, the present invention comprises a pull-up device, such as a metal oxide semiconductor (MOS) transistor which is used for controlling the electrostatic discharge modes of ND and PD and is connected between the working voltage and the grounding voltage of the integrated circuit, and a protecting device, such as a field oxygen element which comprises an input terminal connected to the input connecting pad and an output terminal connected to the grounding voltage, wherein the protecting device shares an output terminal positioned in a substrate with the pull-up device, and the output terminal is used for passing electrostatic discharge (ESD) current to he pull-up device from the input connecting pad when the grounding voltage is in a floating state.
Description
(1) technical field
The relevant a kind of integrated circuit component of the present invention is particularly relevant for protecting integrated circuit, avoiding it to be subjected to the element of the infringement of the static discharge that imports into from input.
(2) background technology
For semiconductor integrated circuit, the problem of Cun Zaiing is for a long time, is subjected to by arbitrary outside destruction that static discharge caused that pin imports into that connects.For the common solution of this problem is that on end points connection pad (terminal pad), to earth terminal, the unlikely internal circuit that flows to damages with current steering when static discharge is invaded chip component.
One of conventional in layout of path as shown in Figure 1 like this.One pull-up (pull-up) transistor 105 has an input to be connected to the connection pad (pad) 101 of integrated circuit, and two other input is connected to the operating voltage V of chip
DDOne disconnects (pull-down) transistor 106 has an input to be connected to connection pad 101, and two other input is connected to the earthed voltage Vss of chip.Resistance 107 1 ends are connected to pull-up transistor 105, connection pad 101, disconnect transistor 106, and the other end then is connected to the input stage (input stage) of integrated circuit.And a second level transistor 103 has an input to be connected to input stage, and other two inputs then are connected to the earthed voltage Vss of chip.
Another conventional in layout is particularly for high voltage device, as shown in Figure 2.Oxygen element (Field OxideDevice, FOD) 102 have an input to be connected to the connection pad (pad) 101 of integrated circuit, and the another one input is connected to the earthed voltage Vss of chip.Resistance 104 1 ends are connected to a connection pad 101 and an oxygen element 102, and the other end then is connected to the input stage of integrated circuit.And a second level transistor 103 has an input to be connected to input stage, and other two inputs then are connected to the earthed voltage Vss of chip.Under the situation of considering electrostatic discharge (ESD) protection usefulness, the required layout area of the electrostatic discharging element of FOD pattern is less than the electrostatic discharging element of metal-oxide semiconductor (MOS) (MOS) pattern.
Yet also there are some shortcomings in the electrostatic discharging element of FOD pattern.At first, FOD needs long-channel avoiding the anxiety of the electric leakage under the normal manipulation mode, but the long-channel design can cause under the static discharge pattern toggle speed slow excessively, and then causes the inefficacy of static discharge.Secondly, when the protection mechanism of FOD is connect face collapse (junction breakdown) and driven by n+/p, connect face (cylindrical junction) at its cylinder and understand a large amount of heat of generation, can reduce the protective capability (level) of static discharge like this.The 3rd, utilize the usefulness of the formed FOD of LOCOS processing procedure formed good by shallow channel isolation (STI) (Shallow Trench Isolation) processing procedure.Unfortunately, STI is widely used in time micron or the deep-sub-micrometer technology, and so, the usefulness of FOD certainly will descend.In addition; when in electric static discharge protector, utilizing FOD; can not correspond to the pull-up electric static discharge protector of MOS pattern protection component, so, just can't effectively utilize FOD pattern protection component execution ND pattern and (make negative static discharge to V by input
DDEnd, V during test
DDEnd ground connection) (make positive static discharge to V with the PD pattern by input
DDEnd, V during test
DDEnd ground connection) electrostatic discharge testing.
(3) summary of the invention
In above-mentioned background of invention, one of purpose of the present invention is to provide a kind of protection component of integrated circuit; Utilize a structure to set up effectively and the shortest circuit pathways, make that the not good ND and the performance of PD electrostatic discharge testing pattern of electrostatic discharging element of FOD pattern is improved originally.
Another object of the present invention is to provide a kind of protection component, take into account and strengthen ND and PD static discharge pattern and less layout area.
A further object of the present invention is to provide a kind of protection component of FOD pattern; it utilizes and to increase the polysilicon box structure increase and connect the face effective area on the FOD element, these a little polysilicon box structures and can further avoid the face that connects overheated with avoid bad startup usefulness.
According to above-described purpose, the invention provides in a ground, have a kind of static discharge (Electro-Static Discharge of an integrated circuit of an input connection pad (pad), ESD) protection component, comprise: a pull-up (pull-up) device, a MOS transistor for example, for ND and PD static discharge pattern, and be connected between the operating voltage and an earthed voltage of integrated circuit; One protective device; oxygen element for example; having an input is connected to input connection pad and an output and is connected to earthed voltage; the wherein output that is arranged in ground of protective device and pull-up device shared (share); and in order to when the earthed voltage suspension joint when (floating), from the input connection pad by a static discharge current to the pull-up device.
(4) description of drawings
Fig. 1 is the schematic equivalent circuit of conventional electrostatic discharge prevention element.
Fig. 2 is another schematic equivalent circuit of conventional electrostatic discharge prevention element.
Fig. 3 is an equivalent circuit diagram, in order to the electric static discharge protector of FOD pattern of the present invention to be described.
Fig. 4 is the plane figure schematic diagram according to the electric static discharge protector embodiment of a FOD pattern of the present invention.
Fig. 5 is the plane figure schematic diagram according to another embodiment of electric static discharge protector of a FOD pattern of the present invention.
(5) embodiment
When the present invention describes in detail with following embodiment, be familiar with the personage in this field should cognitive to some extent the present invention in not breaking away from the claim request that is proposed, be to allow some correction and replacement.Use the structure that discloses or method and not only be confined to specific protection component, also comprise the semiconductor protective elements that other are equal, and diagram also is to be used for being illustrated preferred embodiment, but not the limit scope of the invention in addition.
The different piece of semiconductor protective elements of the present invention is not drawn according to size.Some yardstick is compared with other scale dependents and is exaggerated, so that clearer description and understanding of the present invention to be provided.In addition,, should be well understood to very much the some that shown zone is a protection component here, wherein may comprise many elements of in three dimensions, arranging though the embodiment of Huaing shows in the two dimension of different phase to have the width and the degree of depth.Relatively, when making actual element, illustrated zone has three-dimensional length, width and height.
The invention provides a kind of static discharge (Electro-Static Discharge of an integrated circuit that in a ground, has an input connection pad (pad); ESD) protection component; comprise that an oxygen element has an input and is connected to the input connection pad, be connected to an earthed voltage of integrated circuit with an output.Semiconductor element, a MOS transistor for example, have one first end and be connected to an operating voltage, in ground, be connected to earthed voltage with one second end with the output of field oxygen element shared (share), when using when the earthed voltage suspension joint (floating), from the input connection pad via field oxygen element by a static discharge current through this semiconductor element.
Fig. 3 is an equivalent circuit diagram, in order to the electric static discharge protector of FOD pattern of the present invention to be described.Oxygen element (Field Oxide Device, FOD) 2 have an input, and a collector terminal for example is connected to the connection pad (pad) 1 of integrated circuit, and the another one input, and an emitter terminal for example is connected to the earthed voltage Vss of chip.The field oxygen element 2 of serving as first protection component can utilize LOCOS or STI processing procedure to make.In addition, in the present invention, the collector terminal of an oxygen element 2 is used as pin (pin) protection of high pressure input, and it has high breakdown voltage and connects face.Resistance 5 one ends are connected to a connection pad 1 and an oxygen element 2, and the other end then is connected to the input stage of integrated circuit.And a second level transistor 4, for example a n type MOS has an input, and for example a collector terminal is connected to input stage, two inputs in addition, for example an emitter terminal and is controlled base stage, then is connected to the earthed voltage Vss of chip.In a preferred embodiment, second level transistor 4 is applied to the high voltage device of integrated circuit, and its passage length approximates a passage length of oxygen element 2.
One of key of the present invention, a nMOS transistor 3 has an end, and for example a collector terminal is connected with an operating voltage VDD, two inputs in addition, for example an emitter terminal is controlled base stage with one, then is connected to the earthed voltage Vss of chip.In this preferred embodiment, the passage length of nMOS transistor 3 is less than the second level transistor 4 or the passage length of an oxygen element 2.In addition, the base oxide layer of nMOS transistor 3 is thin than the base oxide layer of second level transistor 4.The adding of nMOS transistor 3 has many advantages.At first, nMOS transistor 3 connects operating voltage VDD and earthed voltage Vss, can be considered an embedding system (clamping) transistor, and so, the PD of the electric static discharge protector of FOD pattern and ND static discharge pattern can be improved.Moreover, owing to a nMOS transistor 3 and oxygen element 2 a shared emitter region (showing on the figure), saved the layout area of the electric static discharge protector of FOD pattern.
Fig. 4 is the plane figure schematic diagram according to the electric static discharge protector embodiment of a FOD pattern of the present invention.Field oxygen element has an oxygen district 20 and a collector area 14 in a ground, and has some contact holes (contact) 10 to be distributed on the collector area 14.15 of emitter regions in ground are shared by field oxygen element and nMOS transistor of the present invention institute.The transistorized polysilicon base 12 of nMOS is between emitter region 15 and collector area 16.On emitter region 15 and collector area 16, also there are some contact holes 10 arranging.One of key of the present invention is that nMOS transistor AND gate field oxygen element can share shared emitter region 15, makes under the consideration of strengthening PD and ND static discharge pattern, still can save the layout area of integral body.
Fig. 5 is the plane figure schematic diagram according to another embodiment of electric static discharge protector of a FOD pattern of the present invention.Identical with Fig. 4, except adding the nMOS transistor, some polysilicon box structures 17 are arranged in the active area on collector area 14,16 and the emitter region 15, and polysilicon box structure 17 has many advantages for the electric static discharge protector of FOD pattern.At first, polysilicon box structure 17 be formed at collector area and emitter region before; So the formation of collector area 14,16 and emitter region 15, and is finished to aim at processing procedure voluntarily as injecting mask with polysilicon box structure 17.So, can form many extra faces that connect with polysilicon box structure 17 as injecting mask.The face that connects that these are extra can improve the bad starting characteristic that discontinuity caused because of STI.In addition, identical with the embodiment of Fig. 4 is that nMOS transistor AND gate field oxygen element is shared shared emitter region 15, can save layout area, strengthens PD and ND static discharge pattern simultaneously.
Secondly, the extra face that connects can effectively disperse static discharge current with three-dimensional, makes under any static discharge pattern, can avoid the overheated phenomenon of the face that connects in FOD corner.The extra face that connects can be the static discharge current increase and connects the face area.In addition, the extra face that connects can increase input resistance, and then reduces the phenomenon of the static discharge current vibration of mechanical mode static discharge.In the present invention, the size and shape shown in the size of polysilicon box structure 17 and geometry are not limited on Fig. 5.
The above is preferred embodiment of the present invention only, is not in order to limit claim of the present invention; All other do not break away from the equivalence of being finished under the disclosed spirit and changes or replacement, all should be included in the following claim institute restricted portion.
Claims (15)
1. electric static discharge protector is used to have an integrated circuit of an input connection pad, it is characterized in that, comprising:
One first semiconductor element is connected between the operating voltage and an earthed voltage of this integrated circuit, and this first semiconductor element comprises that at least a Metal-oxide-semicondutor element has the one source pole zone;
An oxygen element has an input and is connected to this input connection pad, and has an output and be connected to this earthed voltage, and is wherein shared in this source region of this output of this oxygen element and this first semiconductor element; And
One second semiconductor element has the first grid oxide layer on this ground, than one second gate oxidation bed thickness of this Metal-oxide-semicondutor element, this semiconductor element has that one first end is connected to this input connection pad and one second end is connected to this earthed voltage.
2. electric static discharge protector as claimed in claim 1 is characterized in that, described Metal-oxide-semicondutor element has a collector region and is connected to this operating voltage, is connected to this earthed voltage with a base terminal.
3. electric static discharge protector as claimed in claim 1 is characterized in that, described oxygen element have a collector region as this input and an emitter region as this output.
4. electric static discharge protector as claimed in claim 3 is characterized in that, described oxygen element comprises that a plurality of polysilicon structures are distributed on this ground, and is positioned at this emitter region and top, this collector region.
5. electric static discharge protector is used for having at a ground integrated circuit of an input connection pad, it is characterized in that, comprising:
An oxygen element has an input and is connected to this input connection pad, is connected to an earthed voltage of this integrated circuit with an output;
One first semiconductor element has one first end and is connected to an operating voltage, and it is shared with this output of this oxygen element in this ground to have one second end; And
One second semiconductor element is connected to this input connection pad and this earthed voltage, and wherein to have a gate oxide on this ground thin than the gate oxide of this second semiconductor element for this first semiconductor element.
6. electric static discharge protector as claimed in claim 5 is characterized in that, a plurality of polysilicon structures are distributing on described this ground of first semiconductor element.
7. electric static discharge protector as claimed in claim 6 is characterized in that, described first end is one to aim at shade voluntarily with this polysilicon structure, injects that ion finishes in this ground.
8. electric static discharge protector as claimed in claim 5 is characterized in that, described second end has an emitter region in this ground, is distributed on this emitter region with a plurality of polysilicon structures.
9. electric static discharge protector as claimed in claim 5 is characterized in that, described oxygen element comprises in the active area of a plurality of polysilicon structures on this ground at least.
10. electric static discharge protector as claimed in claim 9 is characterized in that, described input is that mask injection is finished in this active area below with this polysilicon structure.
11. electric static discharge protector as claimed in claim 9 is characterized in that, described output is that mask injection is finished in this active area below with this polysilicon structure.
12. in a ground, have a kind of the oxygen element pattern electric static discharge protector of an integrated circuit of an input connection pad, it is characterized in that, comprising:
An oxygen zone has a plurality of isolated components on this ground;
One first base region and is connected to an earthed voltage of this integrated circuit on this ground;
One second base region is on this ground in the outside of this first base region, and this second base region has the gate oxidation bed thickness of a gate oxide than this first base region;
In this ground between this oxygen zone and this first base region of territory, one first place, and be connected to this earthed voltage;
Territory, one second place is in this ground in the outside in this oxygen zone, and this territory, second place is connected to this input connection pad; And
Territory, one the 3rd place is in this ground in the outside of this first base region, and territory, the 3rd place is connected to an operating voltage.
13. as claimed in claim 12 oxygen element pattern electric static discharge protector is characterized in that, territory, described first place comprises the emitter part in this oxygen zone and the emitter part of this first base region at least.
14. as claimed in claim 12 oxygen element pattern electric static discharge protector is characterized in that described second base region is connected to this earthed voltage.
15. as claimed in claim 12 oxygen element pattern electric static discharge protector is characterized in that, has a plurality of conduction contacts and is positioned on this territory, first place, this territory, second place and the territory, the 3rd place.
Priority Applications (1)
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CNB021526508A CN1329986C (en) | 2002-11-28 | 2002-11-28 | Static discharge protection element for integrated circuit input |
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CNB021526508A CN1329986C (en) | 2002-11-28 | 2002-11-28 | Static discharge protection element for integrated circuit input |
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CN1505143A CN1505143A (en) | 2004-06-16 |
CN1329986C true CN1329986C (en) | 2007-08-01 |
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CNB021526508A Expired - Fee Related CN1329986C (en) | 2002-11-28 | 2002-11-28 | Static discharge protection element for integrated circuit input |
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CN102983130A (en) * | 2011-09-05 | 2013-03-20 | 中芯国际集成电路制造(上海)有限公司 | An electro-static discharge protection circuit for an integrated circuit and a manufacturing method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6222710B1 (en) * | 1997-09-12 | 2001-04-24 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
US20020153570A1 (en) * | 2001-04-24 | 2002-10-24 | Geeng-Lih Lin | Two-stage ESD protection circuit with a secondary ESD protection circuit having a quicker trigger-on rate |
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2002
- 2002-11-28 CN CNB021526508A patent/CN1329986C/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6222710B1 (en) * | 1997-09-12 | 2001-04-24 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
US20020153570A1 (en) * | 2001-04-24 | 2002-10-24 | Geeng-Lih Lin | Two-stage ESD protection circuit with a secondary ESD protection circuit having a quicker trigger-on rate |
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