CN1316698A - Software interface method for datal link layer in generalized asynchronous serial communication protocol. - Google Patents
Software interface method for datal link layer in generalized asynchronous serial communication protocol. Download PDFInfo
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Abstract
A generalized software interface method for the data link layer of asynchronous serial communication protocol includes such steps as making serial communication controller work in synchronous mode, receiving a frame of message, bit stream serial-to-parallel conversion by 8 bits as length unit, CPU reading each byte from said controller, sending the error frames of data stream to decode software, decoding to generate the data able to be recognized by CPU, and generating the data with special format requirement in the encode software module. Its advantage is simple, flexible and convenient.
Description
The present invention relates to the communication of power system field, relate more specifically to the communication means of asynchronous serial communication protocol data link layer in the communicating by letter of a kind of main website in power communication system and main website, main website and substation.
In serial communication, the mode that data link layer adopts has only following several usually:
(1) asynchronous system;
(2) the byte-oriented method of synchronization is as the double byte method of synchronization (Bisync) of IBM;
(3) towards the bit synchronization mode, as High-Level Data Link Control (HDLC) or synchronous data-link control (SDLC).Just expressed a kind of special data link form as Fig. 1, Fig. 2.
But but exist and the different data link layer mode of above-mentioned three kinds of modes in actual applications, just expressed a kind of special data link form as Fig. 1, Fig. 2.For example a kind of special data link form is all arranged at the message encapsulation format of generalized asynchronous serial communication and the general message encapsulation format of generalized asynchronous serial communication.The conditioned signal of every frame heading, tail and marking signal are to be used for the control signal of switch modulation detuner audio frequency.Every frame message is that unit organizes with message block, can contain one or more message block.The 1st message block is the heading that reply main website inquiry or substation, constitute by 4 bit synchronization sign indicating numbers, 4 station addresses, 8 bit function sign indicating numbers, 8 order of the bit/status word, 8 bit lengths, 8 Cyclic Redundancy Codes, message block afterwards is data block, is made up of function code, data and Cyclic Redundancy Code.Pay particular attention to be in each message block head, tail respectively has a start bit and position of rest, these width is identical with the pulse width of the inner data bit of message block, then be continuous, gapless between each byte of the inside of each message block, without any start bit and position of rest.Obviously, this special data link mode is between the byte-oriented method of synchronization and asynchronous system, the inventor is according to each information build, tail respectively has a start bit and these characteristics of position of rest to be referred to as generalized asynchronous serial communication protocol, the data link form of generalized asynchronous serial communication protocol is more special, the multiple serial communication controller SCC chip that semiconductor manufacturer produces, although function is more and more stronger, can be also more and more by the function of user program control, but do not have a kind of SCC chip can directly support the data link form of generalized asynchronous serial communication protocol.
The existing implementation method of existing generalized asynchronous serial communication protocol as shown in Figure 3, be that the general serial communication controler adds the common formation of programmable logic device (PLD), just on the general data link form that the general serial communication controler is supported, utilize programmable logic device (PLD) to remake particular processing, formed the specific link form of generalized asynchronous serial communication protocol at last.
The standard data format that serial communication controller sends through conversion process, makes its special format that becomes link layer in generalized asynchronous serial communication protocol in programmable logic device (PLD), issue channel again.Receiving course with send on the contrary, the data of coming from channel are introduced into programmable logic device (PLD), become through conversion process and are sent to serial communication controller behind the common format and do common reception and handle.
As can be seen from the above analysis, existing implementation has used serial communication controller to add the disposal route of the two-layer hardware of programmable logic device (PLD), and the inventor is called this method the hardware implementation method of generalized asynchronous serial communication protocol.
The objective of the invention is to propose a kind of software interface method of link layer in generalized asynchronous serial communication protocol, make existing communication equipment not make any hardware and change, rely on this software approach just can realize the data link form that generalized asynchronous serial communication protocol is special.
Method of the present invention realizes that by the following technical solutions the method comprising the steps of:
The serial communication controller support is same, asynchronous communication means, and serial communication controller is operated under the method for synchronization, and a frame message is all taken in;
Because head, the tail of each message block have inserted start bit and position of rest in the message, under the method for synchronization, serial communication controller is string and the conversion that unit carries out bit stream with 8 bit lengths;
CPU reads each byte from serial communication controller, produce the data stream of wrong frame phenomenon;
The data stream of wrong frame phenomenon is sent into the software decode module carry out decoding process, message block start bit and position of rest end to end removed, the wrong frame condition in the byte is corrected come, produce the discernible data of CPU;
When CPU will send frame data, the message data of the normal format that will send is sent into the software coding module earlier, carry out the coding flow process, in the software coding module, according to the start bit of information build, tail and the rule of position of rest insertion, each byte data in one frame data is handled by turn, be created in the data that met the specific (special) requirements of link layer in generalized asynchronous serial communication protocol on the form;
CPU is byte-by-byte as to write serial communication controller with data processed, and serial communication controller sends data with the method for synchronization.
Method of the present invention is to do any change to the existing communication device hardware, just can realize the interface of link layer in generalized asynchronous serial communication protocol by software approach, and it is simpler, convenient than existing hardware approach, flexibly to utilize software approach to realize.
Further describe method of the present invention below in conjunction with accompanying drawing.
Fig. 1 is the message encapsulation format synoptic diagram of generalized asynchronous serial communication;
Fig. 2 is the general message form synoptic diagram of generalized asynchronous serial communication;
Fig. 3 is the hardware implementation mode synoptic diagram of link layer in generalized asynchronous serial communication protocol;
Fig. 4 is the synoptic diagram of wrong frame phenomenon in the method for the present invention;
Fig. 5 is the software decode module workflow synoptic diagram of method of the present invention;
Fig. 6 is the software coding module workflow synoptic diagram of method of the present invention.
As prior art of the present invention described, Fig. 1,2 and 3 all be the explanation prior art of the present invention figure.
The inventor has broken away from the constraint that each physics byte of each frame message in the serial communication must have clear and definite this traditional concept of logic implication, temporarily abandons the logic implication, starts with from the pulse train characteristics of physical layer data and deals with problems.Serial communication controller externally sends a frame message, from upper-layer protocol in logic, can think that it is the message of certain character, each byte has certain special implication, but observe from Physical layer, this frame message is exactly a pulse train in fact, and it is exactly to send a series of necessarily required pulse trains that conform with in fact that serial communication controller externally sends message.Based on this viewpoint, the inventor has proposed following software implementation method, and method of the present invention realizes by the following technical solutions.
Fig. 4 is the synoptic diagram of wrong frame phenomenon in the method for the present invention.Receiving data is finished by serial communication controller.The serial communication controller support is same, asynchronous communication means, and serial communication controller is operated under the method for synchronization in this programme, and a frame message is all taken in.Because head, the tail of each message block have inserted start bit and position of rest in the message, serial communication controller is to be string and the conversion that unit carries out bit stream with 8 bit lengths under the method for synchronization, so the wrong frame phenomenon (position that originally belongs to previous byte has all appearred in each byte of the data that CPU reads from serial communication controller, be judged as at the position of a back byte by serial communication controller), as shown in Figure 4.Obviously, this method just guarantees frame data of generalized asynchronous serial communication are all received, because wrong frame phenomenon, such data still can't be used by CPU.For this reason, the rule that the inventor inserts according to information build, tail start bit and position of rest, designed the software decode module, each byte in the frame data that CPU executive software decoder module is received serial communication controller is handled by turn, message block start bit and position of rest end to end removed, the wrong frame condition in the byte is corrected come.Just become the discernible normal data of CPU through the software decode data processed.
Similar with receiving course, the inventor has designed the software coding module.When CPU will send frame data, the message data of the normal format that will send was sent into the software coding module and is handled earlier.In the software coding module, according to the start bit of information build, tail and the rule of position of rest insertion, each byte data in one frame data is handled by turn, handle data afterwards through software coding and on form, met the specific (special) requirements of link layer in generalized asynchronous serial communication protocol, CPU is byte-by-byte as to write serial communication controller with data processed then, and serial communication controller sends data with the method for synchronization.
Software decoding process has a difficult point technically, that is exactly that serial communication controller is write outgoing data with bus mode all is unit with the byte to CPU, that is to say it to be 8*N position (N is a byte number), owing to inserted start bit and position of rest when software coding, total bit is 8 integral multiple not necessarily just.For example, when only having inserted a pair of start bit and position of rest, total bit is the 8*N+2 position.In this case, for last 2 bit data, CPU can't write serial communication controller by bus.Anatomize the frame structure of generalized asynchronous serial communication protocol, discovery is a marking signal after every frame data, therefore can be " 1 " that last 2 bit data are filled 6 bits, make it consistent with marking signal, form a complete byte, CPU writes serial communication controller with this byte, and serial communication controller sends it, and artificial 6 " 1 " of mending are thought the side of being received marking signal and can not produced any misunderstanding.
Fig. 5 is the software decode module workflow synoptic diagram of method of the present invention.This flow process enters step S502 then and calculates decoded message length from step S501.Then, enter step S503 and calculate decoded message block number.Then, enter the clear byte counter of step S504.Then, enter step S505, judge by compare byte counter and message length whether decode procedure is finished, if finish, then enter step S512, whole flow process finishes; If do not finish, then enter step S506, judge whether processed data are the first byte of message block, if then enter the start bit " 0 " that step S507 removes first byte; Otherwise, enter step S508.In step S508, judge whether processed data are the end byte of message block, if enter the position of rest " 1 " that step S509 removes end byte; Otherwise, enter step S510, from decoded data stream, take out 8 bit data, handle by turn, form a decoded byte.Enter step S511 then, the byte register is added 1.Enter step S505, so circulation finishes until whole flow process.
Fig. 6 is the software coding module workflow synoptic diagram of method of the present invention.This flow process enters step S602 calculating message length, message block number and total bit and enters step S603 then from step S601.In step S603, clear position subscript and byte register enter step S604 then.In step S604,, enter step S605 then for first message block behind the coding adds start bit " 0 ".In step S605, judge by compare byte counter and message length whether cataloged procedure is finished, if finish, then enter step S612, the remaining bit of last byte of the back data of will encoding in S612 all is changed to position of rest " 1 ", enter step S613 then, whole cataloged procedure finishes; If do not finish, then enter step S606, from the data that are encoded, fetch data, handle by turn, form a byte after encoding.Enter step S607 then, judge whether start byte into message block, if, then enter step S608, in coded data, increase a start bit " 0 "; Otherwise, enter step S609, judge whether end byte into message block, if, then enter step S610, in coded data, increase a position of rest " 1 ", add 1 otherwise enter step S611 byte register, enter step S605 then, so circulation finishes until whole flow process.
The method according to this invention has realized successfully that the CSC2000 electric substation automation system adopts communicating by letter of 8890 communication protocols and U.S. Siemens SCADA/EMS system interface.
Claims (3)
1, a kind of software interface method for datal link layer in generalized asynchronous serial communication protocol is characterized in that: described method comprises the steps:
The serial communication controller support is same, asynchronous communication means, and serial communication controller is operated under the method for synchronization, and a frame message is all taken in;
Because head, the tail of each message block have inserted start bit and position of rest in the message, under the method for synchronization, serial communication controller is string and the conversion that unit carries out bit stream with 8 bit lengths;
CPU reads each byte from serial communication controller, produce the data stream of wrong frame phenomenon;
The data stream of wrong frame phenomenon is sent into the software decode module carry out decoding process, message block start bit and position of rest end to end removed, the wrong frame condition in the byte is corrected come, produce the discernible data of CPU;
When CPU will send frame data, the message data of the normal format that will send is sent into the software coding module earlier, the software coding module is carried out the coding flow process, in the software coding module, according to the start bit of information build, tail and the rule of position of rest insertion, each byte data in one frame data is handled by turn, be created in the data that met the specific (special) requirements of link layer in generalized asynchronous serial communication protocol on the form;
CPU is byte-by-byte as to write serial communication controller with data processed, and serial communication controller sends data with the method for synchronization.
2, method according to claim 1, it is characterized in that: described software decode module is carried out decoding process and is comprised: calculate decoded message length, calculate decoded message block number, clear byte counter, compare byte counter and message length, judge processed data whether be message block first byte, judge whether processed data are the end byte of message block, taking-up 8 bit data from decoded data stream, handle by turn, form the step of a decoded byte.
3, method according to claim 1, it is characterized in that: described software coding module is carried out the coding flow process and is comprised: calculate message length, message block number and total bit, clear position subscript and byte register, for first message block behind the coding adds start bit " 0 ", judge by compare byte counter and message length whether cataloged procedure is finished, the remaining bit of last byte of data behind the coding all is changed to position of rest " 1 ", from the data that are encoded, fetch data, handle by turn, form a byte after encoding, judge whether start byte for message block, in coded data, increase a start bit " 0 ",, judge whether end byte into message block, in coded data, increase a position of rest " 1 ", the byte register adds 1 step.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1593040A1 (en) * | 2003-02-11 | 2005-11-09 | Thomson Licensing | Asynchronous communications technique |
| CN100342358C (en) * | 2004-12-12 | 2007-10-10 | 华为技术有限公司 | Method for controlling operation of communicational interface |
| CN100383770C (en) * | 2005-04-26 | 2008-04-23 | 华为技术有限公司 | Master node link-layer optimization based on master-slave telecommunication mode |
| CN100432974C (en) * | 2005-03-24 | 2008-11-12 | 精工爱普生株式会社 | Data transfer control device and electronic instrument |
| CN101534259B (en) * | 2009-04-15 | 2013-04-10 | 兰州大成科技股份有限公司 | An asynchronous communication controller and its control method |
| CN103136145A (en) * | 2011-11-29 | 2013-06-05 | 中国航空工业集团公司第六三一研究所 | Interconnected chip and data transmission method between chips |
| CN105871383A (en) * | 2016-03-29 | 2016-08-17 | 上海斐讯数据通信技术有限公司 | Data cut-off bit extraction circuit, series-parallel conversion circuit and serial lighting circuit |
| CN109902055A (en) * | 2019-01-16 | 2019-06-18 | 北京左江科技股份有限公司 | A kind of SLIP encoded data stream transmission method being applicable in narrow band data network |
-
2001
- 2001-06-01 CN CN 01118554 patent/CN1131482C/en not_active Expired - Lifetime
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8631176B2 (en) | 2003-02-11 | 2014-01-14 | Gvbb Holdings S.A.R.L. | Asynchronous communications technique |
| EP1593040A4 (en) * | 2003-02-11 | 2007-02-28 | Thomson Licensing | Asynchronous communications technique |
| CN1774696B (en) * | 2003-02-11 | 2010-04-28 | 汤姆森特许公司 | Method and system for asynchronous serial communications between equipments through main processor |
| EP1593040A1 (en) * | 2003-02-11 | 2005-11-09 | Thomson Licensing | Asynchronous communications technique |
| CN100342358C (en) * | 2004-12-12 | 2007-10-10 | 华为技术有限公司 | Method for controlling operation of communicational interface |
| CN100432974C (en) * | 2005-03-24 | 2008-11-12 | 精工爱普生株式会社 | Data transfer control device and electronic instrument |
| CN100383770C (en) * | 2005-04-26 | 2008-04-23 | 华为技术有限公司 | Master node link-layer optimization based on master-slave telecommunication mode |
| CN101534259B (en) * | 2009-04-15 | 2013-04-10 | 兰州大成科技股份有限公司 | An asynchronous communication controller and its control method |
| CN103136145A (en) * | 2011-11-29 | 2013-06-05 | 中国航空工业集团公司第六三一研究所 | Interconnected chip and data transmission method between chips |
| CN105871383A (en) * | 2016-03-29 | 2016-08-17 | 上海斐讯数据通信技术有限公司 | Data cut-off bit extraction circuit, series-parallel conversion circuit and serial lighting circuit |
| CN105871383B (en) * | 2016-03-29 | 2020-02-11 | 上海斐讯数据通信技术有限公司 | Data cut-off bit extraction circuit, serial-parallel conversion circuit, and serial lighting circuit |
| CN109902055A (en) * | 2019-01-16 | 2019-06-18 | 北京左江科技股份有限公司 | A kind of SLIP encoded data stream transmission method being applicable in narrow band data network |
| CN109902055B (en) * | 2019-01-16 | 2023-01-10 | 北京左江科技股份有限公司 | SLIP coding data stream transmission method suitable for narrow-band data network |
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Owner name: BEIJING SIFANG JIBAO AUTOMATION CO., LTD. Free format text: FORMER OWNER: SIFANG TONGCHUANG PROTECTION AND CONTROL EQUIPMENT CO., LTD., BEIJING Effective date: 20040611 |
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Effective date of registration: 20040611 Address after: 100085, No. four, nine street, information industry base, Haidian District, Beijing Patentee after: Beijing Sifang Jibao Automation Co., Ltd. Address before: 100085, No. four, nine street, information industry base, Haidian District, Beijing Patentee before: Sifang Tongchuang Protection and Control Equipment Co., Ltd. |
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Effective date of registration: 20190401 Address after: 100085 9, four street, Shang Di information industry base, Haidian District, Beijing. Co-patentee after: Beijing Sifang Jibao Engineering Technology Co., Ltd. Patentee after: Beijing Sifang Jibao Automation Co., Ltd. Address before: 100085, No. four, nine street, information industry base, Haidian District, Beijing Patentee before: Beijing Sifang Jibao Automation Co., Ltd. |
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