CN1310498C - Digital video-audio decoder - Google Patents
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- CN1310498C CN1310498C CNB2004100702049A CN200410070204A CN1310498C CN 1310498 C CN1310498 C CN 1310498C CN B2004100702049 A CNB2004100702049 A CN B2004100702049A CN 200410070204 A CN200410070204 A CN 200410070204A CN 1310498 C CN1310498 C CN 1310498C
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Abstract
The present invention discloses a digital video-audio decoder. The present invention is composed of a transmission stream processor, a video decoder, an audio decoder, a memory controller and an external interface, wherein a compressed video buffering region is arranged between the transmission stream processor and the video decoder, a compressed audio buffering region is arranged between the transmission stream processor and the audio decoder, and a decoded video buffering region is arranged at the output end of the video decoder. In the entire decoding process, the digital video-audio decoder can effectively regulate the data flow connection between any two links, which ensures the smooth transmission of data streams in the decoding process, makes basically the speed and flow rate of data flow keep stable and makes the entire decoding efficiency effectively displayed; the cost of the decoder is relatively reduced, and the cost performance ratio of the decoder is relatively better than that of the prior art.
Description
Technical field
The present invention relates to a kind of digital video-audio decoder, be meant that especially a kind of data flow that can regulate effectively between each link is connected in decode procedure, guarantee the defeated and compatible multiple device of looking audio standard of the smooth saequential transmission of data in the decode procedure.
Background technology
Along with the development of digital television techniques, the technology of decoding for video-voice frequency flow emerges in an endless stream; Chinese patent 96116754.8: " video data decoder and coding/decoding method thereof ", 98126137.X: " digital information source decoding device of video decode ", 98125272.9: " digital information source decoding device ", the Video Decoder technology of several MPEG2 of being applicable to has been described respectively.But these technology only are applicable to the decoding of MPEG2 code stream, there is no versatility.And, and these existing decoding techniques are not considered: in whole decode procedure, on each link of decoding, the data flow of how to regulate effectively between each link is connected, make decoded data in whole decode procedure, neither can can't mate and cause loss of data or accumulation, also can not handle the phenomenon that causes back grade wait prime slowly because of the prime link because of level after too fast causing of prime link processing.Therefore, above-mentioned technology is used for the high definition transmission code stream is carried out real-time decoding, can cause the cost of decoder very high.
Chinese patent 98103215.X discloses a kind of " adopting the HDTV Video Decoder and the coding/decoding method thereof of SDTV decode ASIC ", and this method has disclosed a kind of employing SDTV decode ASIC and realized the video decode to DHTV.The method only is applicable to the code stream of MPEG2, owing to use a plurality of this decoders just can reach the requirement of high definition decoding, so the restriction physically of this decoder there is no reasonability on versatility and the cost to general high definition code stream.
Summary of the invention
Technical problem underlying to be solved by this invention provides a kind of digital video-audio decoder, and its data flow that can regulate effectively in decode procedure between each link is connected, and guarantees the defeated digital video-audio decoder of the smooth saequential transmission of data in the decode procedure.
Another technical problem to be solved by this invention provides a kind of digital video-audio decoder, and this is decoded, and it can adapt to the standard that this transport stream is deferred to automatically when receiving transport stream, realizes the decoding to multiple video/audio.
The present invention solves the problems of the technologies described above by the following technical solutions:
In order to solve first technical problem of this law invention, concrete technical scheme is as follows:
A kind of digital video-audio decoder is made up of transport stream processor, Video Decoder, audio decoder, Memory Controller Hub and external interface; Wherein, transport stream processor with the transport stream that receives be decomposed into video-frequency basic flow, audio frequency flows substantially, again video-frequency basic flow, the basic flow point supplementary biography of audio frequency are defeated by described Video Decoder, audio decoder, further be decoded as looking of to play, audio signal respectively, and be transferred to display terminal and loud speaker by described external interface by Video Decoder, audio decoder; Memory Controller Hub is used for distributing, manage and control corresponding internal storage according to the decode operation of transport stream processor, Video Decoder, audio decoder; In order to be implemented in the whole decode procedure, data in each link can be handled swimmingly in a kind of mode of flowing water in each unit, make the situation that data " obstruction " promptly can not take place in the decode procedure, the data situation of " intermittently " can not take place again, between described transport stream processor and Video Decoder, be provided with the compressed video buffer area, between transport stream processor and audio decoder, be provided with the compressed audio buffer area, and be provided with the decoded video buffer area at the output of Video Decoder; Described transport stream processor is stored in described compressed video buffer area and compressed audio buffer area respectively after described transport stream is decomposed into video-frequency basic flow, audio frequency and flows substantially; Read video-frequency basic flow at described Video Decoder from described compressed video buffer area, it is decoded, and decoded video data is stored in the decoded video buffer area; Described audio decoder reads audio frequency from described compressed audio buffer area and flows substantially, and it is decoded after external interface output.
In order to solve another technical problem of the present invention, adopted following technical scheme:
In the transport stream processor of described digital video-audio decoder, more than one PID filter element further is set, be used for adapting to automatically different transport stream of looking audio standard.When this digital video-audio decoder receives when meeting the various criterion transport stream, video-frequency basic flow is sent to the corresponding video decoding device according to different standards by different PID filter elements.
The present invention also further provides the technical scheme of utilizing described digital video-audio decoder to constitute the digital video-audio playing device, and specific as follows: described digital video-audio playing device is made of above-mentioned digital video-audio decoder, primary processor, tuner, video playback module and audio playing module; Digital video-audio decoder and primary processor carry out alternately, under the control of primary processor, the transport stream via tuning unit demodulates is resolved, is decoded, and with decoded video data and voice data be sent to the video playback module respectively, audio playing module is broadcasted.
Digital video-audio decoder of the present invention is in whole decode procedure, the data flow that can regulate effectively between each link is connected, guaranteed that the smooth saequential transmission of data is defeated in the decode procedure, flowing of data keeps the stable of speed and flow basically, the whole decoding efficiency that makes is brought into play effectively, the cost of decoder is also relatively low, and the ratio of performance to price of decoder is more excellent than prior art.
Since adopted more than one PID filter element and and the corresponding more than one Video Decoder of these filter elements, when this digital video-audio decoder receives when meeting the various criterion transport stream, by different PID filter elements video-frequency basic flow is sent to the corresponding video decoding device according to different standards, make decoder of the present invention go for the multiple audio standard of looking.
Digital video-audio playing device of the present invention has provided an instantiation that adopts digital video-audio decoder of the present invention, utilize the characteristic of above-mentioned decoder, this playing device can the compatible multiple audio standard of looking, simultaneously when playing audiovisual information, the Signal Processing smoothness, efficient.
Description of drawings
Fig. 1 is the structural principle schematic diagram of digital video-audio decoder of the present invention;
Fig. 2 is the principle schematic of pushup storage in the digital video-audio decoder of the present invention;
Fig. 3 is the structural representation of digital video-audio decoder one embodiment shown in Figure 1;
Fig. 4 is the structural representation of Video Decoder in the digital video-audio decoder of the present invention;
Fig. 5 is the flow chart of the processing procedure of digital video-audio decoder shown in Figure 4;
Fig. 6 is the structural representation of digital video-audio decoder sound intermediate frequency decoder of the present invention;
Fig. 7 is the structural representation of digital video-audio playing device of the present invention.
Embodiment
The present invention is described in further detail below in conjunction with accompanying drawing and specific embodiment:
Referring to Fig. 1, digital video-audio decoder of the present invention is made up of transport stream processor, Video Decoder, audio decoder, Memory Controller Hub and external interface substantially; Wherein, transport stream processor with the transport stream that receives be decomposed into video-frequency basic flow, audio frequency flows substantially, again video-frequency basic flow, the basic flow point supplementary biography of audio frequency are defeated by described Video Decoder, audio decoder, further be decoded as looking of to play, audio signal respectively, and be transferred to display terminal and loud speaker by described external interface by Video Decoder, audio decoder; Memory Controller Hub is used for distributing, manage and control corresponding internal storage according to the decode operation of transport stream processor, Video Decoder, audio decoder.
Referring to Fig. 2, a key character of the present invention is that some pushup storages (hereinafter to be referred as FIFO) are set in above-mentioned decoder.These FIFO are set at the prime of each above-mentioned processing unit, become the preposition FIFO of each processing unit.The purpose that this FIFO is set is: each processing unit reads from its preposition FIFO when handling related data, after processing finishes, with the deposit data handled well among the preposition FIFO of next processing unit thereafter.Before the data that processing units at different levels are sent its prime processing unit are handled, at first will detect: whether the preposition FIFO of level processing unit has vacant memory space thereafter, is used to deposit the data after the processing; If there is not clearance spaces, then suspend the operation of reading of data and processing from its preposition FIFO, restart when in the preposition FIFO of level processing unit thereafter, having free space and continue operation.Then in a single day the level processing unit detects among the preposition FIFO data is arranged, and just handles at full speed.Like this, whole handling process just can guarantee unobstructed, the data phenomenon of blocking can not take place.
Referring to Fig. 3, based on above-mentioned principle, in digital video-audio decoder of the present invention, between transport stream processor and Video Decoder, be provided with compressed video buffer area CPB, between transport stream processor and audio decoder, be provided with compressed audio buffer area CAB, and be provided with decoded video buffer area DPB at the output of Video Decoder; These buffer areas all are made of FIFO, and transport stream processor is stored in described compressed video buffer area CPB and compressed audio buffer area CAB respectively after described transport stream is decomposed into video-frequency basic flow, audio frequency and flows substantially; Video Decoder reads video-frequency basic flow from described compressed video buffer area CPB, it is decoded, and decoded video data is stored among the decoded video buffer area DPB; And audio decoder reads audio frequency from described compressed audio buffer area and flows substantially, and it is decoded after external interface output.
Referring to Fig. 4, the structure of the processing unit described in Fig. 2, in Video Decoder, adopt equally, therefore, Video Decoder of the present invention is linked in sequence and is constituted by decoding length changeable code device, inverse quantization unit, inverse transformation unit, intraprediction unit, deblocking effect unit, frame memory cell, control microprocessor is connected with all processing units, is used for providing the decoding control signal of whole decode procedure; Between decoding length changeable code device and intraprediction unit, also be provided with motion compensation units in addition.Before all processing units of back, decoding length changeable code unit, all be provided with FIFO, like this, and in whole decode procedure, according to design philosophy of the present invention, the structure that processing units at different levels are coordinated mutually before and after constituting, it is smooth and easy to make that processed data flow.
Wherein, the decoding length changeable code device all variable length code in the video flowing of can decoding/resolve, it and control microprocessor combine, and realize the parsing fully of bit stream syntax; Control microprocessor is the central control unit of Video Decoder, and it provides all control signals that need in the decoder; Inverse quantization unit, inverse transformation unit, motion compensation units, intraprediction unit, frame memory cell, deblocking effect unit are carried out the processing operation in the decode procedure separately, the standard that these operating basis are different and being provided with.
As central control unit, control microprocessor is carried out following task:
1, the initialization of soft, the hardware of video;
2, commander's decoding length changeable code device is carried out the analysis operation of code stream, up to the head part of macro block;
3, handle the above task of all macro blocks, comprise the management of error handling processing, reference frame and display frame, the parsing of sequence head/image head/slice header;
4, when macro block is decoded, commander's decoding length changeable code device is resolved the macro block header, and this header will be used to all processing units as common information;
5, control decoding length changeable code device is resolved the syntactic element of every other macro-block level, and carries out corresponding operation by decoding length changeable code device other processing units of control that send control information.All macro-block level algorithm related task will be finished separately by each processing unit.Each processing unit is returned their state and error message to control microprocessor after handling macro block.
Except the decoding length changeable code device, every other processing unit is only carried out the following operation of macro block.
Described decoding length changeable code device is carried out following operation:
Externally live when source code flow directly enter the decoding length changeable code device under the guiding of controller after, the decoding length changeable code device extracts the syntactic element of all video PES streams, and all syntactic elements are decoded, the syntactic element of having resolved is sent to other downstream unit then and is further processed; Control microprocessor is directly controlled the syntax parsing of decoding length changeable code device.Control command and parameter that the decoding length changeable code device is resolved all piece coefficients and produced to other processing unit transmitting control microprocessor softwares.Decoding length changeable code device and control microprocessor can be passed through coprocessor port exchange message.
Other processing unit is according to the corresponding decode operation of execution of the function regulation of video decode.For example: inverse quantization unit is carried out inverse quantization operation to the piece coefficient.It should be noted that: all processing units must be finished corresponding operating corresponding to the processing macro block at a macro block in the time, to guarantee the unobstructed of whole streamline.In order to guarantee the unobstructed of streamline, the preposition FIFO of all processing units is to receive the data input by the prime processing unit; In case detect preposition FIFO data are arranged, this processing unit is then handled these data at full speed.An important techniques feature of the present invention is exactly: all data necessary and control information all obtain from the preposition FIFO of processing unit.
A processing unit need be provided with a plurality of preposition FIFO, is to be determined by the processing units quantity of its prime.For example, intra-framed prediction module just has four preposition FIFO: order FIFO (from the decoding length changeable code device), intra prediction mode (coming from the decoding length changeable code device), macro block data FIFO (coming from inverse transform block) and inter prediction data FIFO (coming from motion compensating module).
If a processing unit has a plurality of preposition FIFO, this processing unit also needs the data of synchronous these FIFO to obtain, and used rule is: order FIFO has the highest control, control data second (as intra prediction mode), and the data of coming from the upstream are last.
When the preposition FIFO of back level processing unit did not have remaining space, the prime processing unit can not continue to handle new data.So a processing unit not only will detect the preposition FIFO of himself, also will detecting thereafter, whether the preposition FIFO of level processing unit has enough spaces to admit the data that send.
Based on above-mentioned scheme, each processing unit of the present invention all is provided with preposition FIFO, and the processing speed of each processing unit satisfies corresponding processing speed requirement.As long as the degree of depth of the preposition FIFO of each processing unit is suitable, they all can be in busy condition and can not stop.
Above-mentioned rate request is: each processing unit must be finished respective handling to a macro block at macro block in the time.Like this, macro block data just can freely flow through whole flowing structure and not have any obstruction.
Control information is also the same with macro block information flows through whole flowing structure.
In normal operation, control microprocessor detects the full state of sky of the preposition order of other module FIFO to send order and control information to these FIFO by the decoding length changeable code device.
Referring to Fig. 5, described motion compensation units is connected and composed by motion vector prediction unit, reference frame reading unit, 1/4 pixel value difference sequence of unit, all be provided with preposition FIFO before each processing unit, its effect is identical with the effect of above-mentioned each FIFO, to satisfy the needs on the flowing water performance.The preposition FIFO of each processing unit must be provided with suitable for to allow flowing water can move smoothness, does not block.Common regulation is: the preposition FIFO of each module must be able to hold the data of two macro blocks.A processing unit must have the preposition FIFO capacity setting that is complementary in its all input path.
Referring to Fig. 6, audio decoder can adopt a general dsp (Digital SignalProcessor, digital signal processor) or microprocessor to realize the basic function of its decoding, for example, all Audio Processing are finished by the software of its inside solidification of dsp operation.The same with above-mentioned Video Decoder, be provided with the input and output that FIFO is used for auxiliary audio stream in the audio decoder equally, input-buffer wherein, output buffers unit all are to be made of FIFO, audio stream is input to earlier in the input-buffer unit, read and decode by DSP, the code that intermediate object program that produces in decode procedure and DSP are used to carry out leaves among the memory SRAM.The decoded data of DSP output is stored among the output buffers unit, mixes through the voice data with the generation of PCM unit, outputs to outside playback equipment.
Described transport stream processor is used to realize the decomposition of transport stream, and this transport stream processor is decomposed into transport stream that video-frequency basic flow, audio frequency flow substantially, data flow substantially, supports the decomposition of private data joint simultaneously.The filtration, PCR that this transport stream processor can comprise a plurality of program numbers (Program ID, be called for short PID) filter element and a plurality of data section (Section) synchronously, audio-visual synchronization, descrambling/processing modules such as condition reception.For example, when being provided with the filter element of a plurality of PID in the transport stream processor, also need to be provided with accordingly same number of video or audio decoder, to realize decomposition and decoding to the transport stream that meets various criterion.In addition, for the transport stream of encrypting, also need to be undertaken carrying out follow-up resolution process again after descrambling or the deciphering by the descrambling/Conditional Access Module that is arranged in the transport stream processor earlier.
Digital video-audio decoder of the present invention has a plurality of processing unit requests simultaneously the external common internal memory is carried out read-write operation, therefore, need Memory Controller Hub to various memory devices, for example: (DDR SDRAM) such as static memory (SRAM), single data rate Synchronous dynamic RAM (SDR SDRAM), double data rate (DDR) Synchronous dynamic RAMs, control and manage.Therefore, described Memory Controller Hub is used for carrying out following task:
1) according to priority all requestors is ranked;
2) data set with read and write is made into the flowing water form to make full use of the bandwidth of rambus;
3) produce the needed signal sequence of actual physics internal memory and insert latching of necessary other task of this internal memory such as initialization, refresh cycle and reading of data.
All above-mentioned FIFO are distributed into the storage organization of annular, fixed size by Memory Controller Hub.
Referring to Fig. 7, it is for using the digital video-audio playing device of digital video-audio decoder of the present invention, and this playing device is made of above-mentioned digital video-audio decoder, primary processor, tuner, video playback module and audio playing module; Primary processor and digital video-audio decoder carry out alternately, under the control of primary processor, digital video-audio decoder is resolved, is decoded the transport stream from tuner input, and with decoded video data and voice data be sent to the video playback module respectively, audio playing module is broadcasted.
Video playback module of the present invention is made of display controller, graphics accelerator and video D/A conversion unit; Display controller reads decoded video data from the decoded video buffer area of described Video Decoder, and will receive the graphics process signal that graphics accelerator produces, described decoded video data is handled, and the processed video data are sent to the video D/A conversion unit; Described video D/A conversion unit is converted to the video simulation output signal with described video data, sends to outside video playback apparatus.
Audio playing module is made of Audio mixer, pulse code modulated (Pulse Code Modulation is called for short PCM) audio frequency generating unit and audio frequency D/A conversion unit; Audio mixer reads decoded voice data from the output state of described audio decoder, and the audio signal that itself and pcm audio generating unit are produced is carried out mixed processing, and the voice data after will handling sends to the audio frequency D/A conversion unit; Described audio frequency D/A conversion unit is converted to analog output signal with the voice data that Audio mixer sends over, and sends to outside audio-frequence player device.
The digital video-audio playing device also further is provided with external apparatus interface, is used for the video data and the voice data of described Video Decoder, audio decoder output are exported according to corresponding host-host protocol.These external apparatus interfaces are smart card device interface, keyboard equipment interface, infrared transmission interface, I
2The combination of one of C input/output interface, universal asynchronous receiving-transmitting device (Universal Asynchronous ReceiverTransmitter is called for short UART) interface or its any interface.
Transport stream processor provides high-rise control for Video Decoder and audio decoder.Outside master microprocessor is directly opened this systematic code stream handle, and the latter opens video and audio decoder more in order then.Transport stream after the demodulation at first enters transport stream processor and handles and be broken down into video-frequency basic flow, audio frequency and flow substantially and data section.These data are stored in the buffer memory separately of external memory, for example: data section buffer area, compressed audio buffer area (CAB), compressed video buffer area (CPB) etc.Video Decoder reads the video-frequency basic flow of compressed video buffer area, it is decoded, and the video data behind the decompress(ion) is write the decoded video buffer area.Then, display controller reads out the decoded video buffer area, is shown on the display terminal according to suitable sequential.
Data behind basic stream after the employed compressed bit stream of above-mentioned decoder, the decomposition and data section, the decompress(ion) can be stored in the public external cache, and are controlled and managed by Memory Controller Hub.
Equally, the audio frequency that audio decoder reads the compressed audio buffer area flows substantially, it is carried out decompress(ion) also directly output in the external loudspeaker, and no longer write back in the decoder memory.The private data joint also will be read to do further processing with suitable manner by ppu.
Above-mentioned digital video-audio decoder uses four kinds of external interfaces, wherein,
The system flow input adopts serial or parallel industrial quarters transmission code stream general-purpose interface as the transport stream input interface;
The microprocessor external bus interface is used for read-write, interruption of initialization, register to digital audio/video decoder etc.;
Video output interface is used for decoded video Data Transmission is arrived other functional modules to show.This interface can use CCIR656 (a kind of international standard of digital video transmission form) form (or any other is applicable to the form of SD video) transmission SD vision signal, SMPTE-274M (a kind of international standard of digital video transmission form) or SMPTE-296M (a kind of international standard of digital video transmission form) transmission high-definition video signal (or any other is applicable to the form of HD video);
Audio output interface is used for audio signal that output decoder finishes to other audio playing units; This interface can use I
2S (a kind of Digital Audio Transmission form) or SPDIF form (a kind of Digital Audio Transmission form) also can be supported multiple sampling digit rate.
It should be noted that at last: above embodiment only in order to the explanation the present invention and and unrestricted technical scheme described in the invention; Therefore, although this specification has been described in detail the present invention with reference to each above-mentioned embodiment,, those of ordinary skill in the art should be appreciated that still and can make amendment or be equal to replacement the present invention; And all do not break away from the technical scheme and the improvement thereof of the spirit and scope of the present invention, and it all should be encompassed in the middle of the claim scope of the present invention.
Claims (11)
1, a kind of digital video-audio decoder is made up of transport stream processor, Video Decoder, audio decoder, Memory Controller Hub and external interface; Wherein, transport stream processor with the transport stream that receives be decomposed into video-frequency basic flow, audio frequency flows substantially, again video-frequency basic flow, the basic flow point supplementary biography of audio frequency are defeated by described Video Decoder, audio decoder, further be decoded as looking of to play, audio signal respectively, and be transferred to display terminal and loud speaker by described external interface by Video Decoder, audio decoder; Memory Controller Hub is used for distributing, manage and control corresponding internal storage according to the decode operation of transport stream processor, Video Decoder, audio decoder; It is characterized in that:
Be provided with the compressed video buffer area between described transport stream processor and the Video Decoder, between transport stream processor and audio decoder, be provided with the compressed audio buffer area, and be provided with the decoded video buffer area at the output of Video Decoder;
Described transport stream processor is stored in described compressed video buffer area and compressed audio buffer area respectively after described transport stream is decomposed into video-frequency basic flow, audio frequency and flows substantially; And be provided with more than one PID filter element, be used for adapting to automatically different transport stream of looking audio standard; Correspondingly, described Video Decoder or audio decoder are more than one, and corresponding with described PID filter element, are used to receive elementary video stream, audio stream and the corresponding data that described PID filter element sends;
Described Video Decoder reads video-frequency basic flow from described compressed video buffer area, it is decoded, and decoded video data is stored in the decoded video buffer area;
Described audio decoder reads audio frequency from described compressed audio buffer area and flows substantially, and it is decoded after external interface output.
2, digital video-audio decoder according to claim 1 is characterized in that: described compressed video buffer area, compressed audio buffer area and decoded video buffer area are made of pushup storage respectively.
3, digital video-audio decoder according to claim 1 is characterized in that: described Video Decoder is made up of decoding length changeable code device, inverse quantization unit, inverse transformation unit, intraprediction unit, deblocking effect unit, frame memory cell, control microprocessor, motion compensation units; Wherein,
Decoding length changeable code device, inverse quantization unit, inverse transformation unit, intraprediction unit, deblocking effect unit, frame memory cell are linked in sequence; Motion compensation units is connected between decoding length changeable code device and the intraprediction unit; And be equipped with preposition pushup storage before each unit after the decoding length changeable code device; This preposition pushup storage is used for the data of buffer memory prime cell processing.
4, digital video-audio decoder according to claim 3, it is characterized in that: described motion compensation units is connected and composed by motion vector prediction unit, reference frame reading unit and 1/4 pixel value difference sequence of unit, before reference frame reading unit and 1/4 pixel value difference unit, be provided with preposition pushup storage, after 1/4 pixel value difference unit, be provided with and be used for the pushup storage that this 1/4 pixel value difference unit of buffer memory outputs to the data of intraprediction unit.
5, digital video-audio decoder according to claim 1 is characterized in that: described audio decoder connects PCM by DSP and constitutes, and is provided with output state between described DSP and PCM, is used for the voice data of DSP decoding is carried out output buffers.
6, digital video-audio decoder according to claim 1 is characterized in that: described transport stream processor further is provided with descrambling/Conditional Access Module, is used for the enciphered data of transport stream is decrypted.
7, a kind of digital video-audio playing device is characterized in that: described playing device is made of the described arbitrary digital video-audio decoder of claim 1-6, primary processor, tuner, video playback module and audio playing module; Wherein,
Described digital video-audio decoder and primary processor carry out alternately, under the control of primary processor, the transport stream via tuning unit demodulates is resolved, is decoded, and with decoded video data and voice data be sent to the video playback module respectively, audio playing module is broadcasted.
8, digital video-audio playing device according to claim 7 is characterized in that: described video playback module is made of display controller, graphics accelerator and video frequency mould converting unit; Display controller reads decoded video data from the decoded video buffer area of described Video Decoder, and will receive the graphics process signal that graphics accelerator produces, described decoded video data is handled, and the processed video data are sent to the video D/A conversion unit; Described video D/A conversion unit is converted to the video simulation output signal with described video data, sends to outside video playback apparatus.
9, digital video-audio playing device according to claim 7 is characterized in that: described audio playing module is made of Audio mixer, pcm audio generating unit and audio frequency D/A conversion unit; Audio mixer reads decoded voice data from the output state of described audio decoder, and the audio signal that itself and pcm audio generating unit are produced is carried out mixed processing, and the voice data after will handling sends to the audio frequency D/A conversion unit; Described audio frequency D/A conversion unit is converted to analog output signal with the voice data that Audio mixer sends over, and sends to outside audio-frequence player device.
10, digital video-audio playing device according to claim 7, it is characterized in that: described digital video-audio playing device also further is provided with external apparatus interface, is used for the video data and the voice data of described Video Decoder, audio decoder output are exported according to corresponding host-host protocol.
11, digital video-audio playing device according to claim 10 is characterized in that: described external apparatus interface is the combination of one of smart card device interface, keyboard equipment interface, infrared transmission interface, I2C input/output interface, UART interface or its any interface.
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| CN100437801C (en) * | 2006-05-22 | 2008-11-26 | 炬力集成电路设计有限公司 | Automatic regulating method of Mips number operated during decoder decoding process |
| CN102118645B (en) * | 2009-12-31 | 2014-12-10 | 康佳集团股份有限公司 | System and control method for playing MP3 arranged on set top box |
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