CN1310430C - Phase locked pool circuit - Google Patents

Phase locked pool circuit Download PDF

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Publication number
CN1310430C
CN1310430C CNB2004100617313A CN200410061731A CN1310430C CN 1310430 C CN1310430 C CN 1310430C CN B2004100617313 A CNB2004100617313 A CN B2004100617313A CN 200410061731 A CN200410061731 A CN 200410061731A CN 1310430 C CN1310430 C CN 1310430C
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coupled
phase
input
charge pump
output
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CN1588803A (en
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谢义滨
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Via Technologies Inc
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Via Technologies Inc
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Abstract

The present invention relates to a phase-locked loop circuit which comprises a loop filter with a first input terminal and a second input terminal, a first capacitor connected to the first input terminal, a resistor whose one end is connected to the first input terminal, a second capacitor connected to the second input terminal, a source follower whose input terminal is connected to the second input terminal and whose output terminal is connected to the other terminal of the resistor, a first charge pump connected to the first input terminal so as to output a first current, and a second charge pump connected to the second input terminal so as to output a second current, wherein the first current is B times heavier than the second electric current (B>1).

Description

Phase-locked loop circuit
Technical field
The present invention is particularly to a kind of phase-locked loop circuit that is applied among transceiver or the CD/DVD relevant for a kind of phase-locked loop circuit.
Background technology
Fig. 1 represents a traditional phase-locked loop circuit 1, formed by a frequency divider 10, a phase-frequency detector 11, a charge pump 12, a loop filter 13, a voltage controlled oscillator 14 and a frequency divider 15, wherein, R1, C1 and C2 constitute loop filter 13, because the bandwidth (loop bandwidth) in loop need keep the loop stable much smaller than frequency and the needs of reference frequency Fref, so C1 can be very big, hundreds of approximately PF are to thousands of PF for its size, and its relative area occupied is also quite big.Wherein, the transfer function of loop filter (1) is
Vc = I ( S + 1 R 1 C 1 ) SC 2 ( S + C 1 + C 2 R 1 C 2 C 1 ) ≈ I ( S + 1 R 1 C 1 ) SC 2 ( S + 1 R 1 C 2 ) , If C2<<C1;
I is the operating current of charge pump 120.
For addressing the above problem, another conventional phase locked loops 1 ' as shown in Figure 2 provides dual charge pump 120,121 to reduce the area of its electric capacity, wherein the operating current of charge pump 120 is I1, the operating current of charge pump 121 is I2, I1=B*I2 wherein, and B>1, the transfer function of the loop filter of Fig. 2 (2) is
Vc = I 1 ( S + 1 BR 1 C 3 + C 2 BC 3 S ) SC 2 ( S + 1 R 1 C 2 ) ≈ I 1 ( s + 1 BR 1 C 3 ) SC 2 ( S + 1 R 1 C 3 ) , If C2<<BC3.
By transfer function (2) as can be known, utilize this phase-locked loop circuit, can make the area of capacitor C 3 be reduced into Fig. 1 capacitor C 1 1/B doubly, but because capacitor C 3 is a suspension joint electric capacity, can't the bigger field-effect transistor electric capacity of applying unit area capacitance, can only the applying unit area capacitance less polysilicon is to polysilicon (polyto poly) electric capacity, or metal to metal (Metal-to-Metal; MIM) electric capacity, Gu that its area reduces is still limited, and it needs an amplifier 130 and an adder 131, increases the complexity and the area of circuit design, also increases the noise of circuit.
Summary of the invention
In view of this, main purpose of the present invention is to provide the phase-locked loop circuit of less circuit area of a tool and reduction circuit noise.
For reaching aforementioned purpose, the invention provides a kind of phase-locked loop circuit, it comprises: loop filter, have a first input end and one second input, comprising: one first electric capacity is coupled between this first input end and the ground; One resistance, an end couples this first input end; One second electric capacity, be coupled to this second input and should ground between; One source pole follower, this source follower have a drain electrode and are coupled to a fixed voltage source, and a grid couples this second input, and one source pole is coupled to the other end of this resistance; One first charge pump is coupled to this first input end, to export one first electric current; One second charge pump is coupled to this second input, to export one second electric current; One voltage controlled oscillator is coupled to the output of this loop filter; One first frequency divider is coupled to the output of this voltage controlled oscillator, to export a feedback signal; And phase detectors, two inputs of these phase detectors are coupled to respectively on the output and one second frequency divider of this second frequency divider, and two outputs then are connected with this first charge pump and this second charge pump respectively; Wherein this first electric current B that is this second electric current doubly, B>1 wherein.
The present invention also provides a kind of loop filter, and being used for a phase-locked loop circuit has a first input end and one second input, and this loop filter comprises:
One first electric capacity is coupled between this first input end and the ground;
One resistance, an end couples this first input end;
One second electric capacity, be coupled to this second input and should ground between; And
The one source pole follower, this source follower has a drain electrode, is coupled to a fixed voltage source, and a grid couples this second input, and one source pole is coupled to the other end of this resistance;
Wherein this phase-locked loop circuit also comprises one first charge pump, is coupled to this first input end, to export one first electric current and one second charge pump, be coupled to this second input, exporting one second electric current, this first electric current be for the B of this second electric current doubly, B>1 wherein.
For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 represents the circuit diagram of a conventional phase-lock loop circuit;
Fig. 2 represents the circuit diagram of another conventional phase-lock loop circuit;
Fig. 3 represents the circuit diagram of phase-locked loop circuit one preferred embodiment of the present invention
The related symbol explanation:
Phase-frequency detector~11 charge pumps~12 loop filters~13 voltage controlled oscillators~14 frequency dividers~15 charge pumps~120,121 phase-locked loops~1 ' electric capacity~C3 phase-locked loop circuit~2 loop filters~20 first charge pumps~21 second charge pumps~22 voltage controlled oscillators~23 frequency dividers~24 phase-frequency detectors~25 frequency dividers~26 first input ends, 200~the second inputs~201 resistance~R1 second electric capacity~C4 source follower~M1
Embodiment
Fig. 3 represents the circuit diagram of phase-locked loop circuit one preferred embodiment of the present invention, and this phase-locked loop circuit 2 comprises a loop filter 20, one first charge pump 21, one second charge pump 22, a voltage controlled oscillator 23, a frequency divider 24, a phase-frequency detector 25 and a frequency divider 26.
Loop filter 20 has a first input end 200 and one second input 201, comprising: one first capacitor C 2 is connected on this first input end 200; One resistance R, 1, one end is connected to this first input end 200; One second capacitor C 4 is connected to this second input 201; One source pole follower (sourcefollower) M1, it for example is a PMOS transistor, also can use nmos pass transistor, its drain electrode (for example: ground connection GND) is connected to a fixed voltage source, have a grid and be used as input and be connected to this second input 201, one source pole is used as the other end that output is connected to this resistance R 1; One current source Ib1 is connected to the output of this source follower M1.First charge pump 21 is connected to this first input end 200, to export one first electric current I P1; Second charge pump 22 is connected to this second input 201, to export one second electric current I P2; Wherein, this first electric current I P1 is B a times of this second electric current I P2, B>1.Voltage controlled oscillator 23 is connected to this loop filter 20 to receive by the signal of loop filter 20 outputs and according to the corresponding frequency of its magnitude of voltage conversion.
The frequency division multiple of frequency divider 24 is N, and the output that is connected to this voltage controlled oscillator 23 is with frequency division, and exports a feedback signal.Phase-frequency detector 25, it is the feedback signal of Fvco_fb that tool two inputs are connected respectively on the output of a frequency divider 24 and another frequency divider 26 to receive signal and the frequency that a frequency is Fref, and two outputs are connected to this first charge pump 21 and this second charge pump 22.
Utilize the loop filter 2 of present embodiment, suppose IP1=B*IP2, B>1, the voltage amplification factor of source follower M1 is an ideal value 1, then
Vc = IP 1 × 1 1 R 1 + SC 2 + V C 1 × 1 S C 2 R 1 + 1 SC 2 .... formula (1)
V C 1 = I P 2 SC 4 = I P 1 SB C 4 .... formula (2)
Simplified formula (1) obtains: Vc = I P 1 R 1 1 + SR 1 C 2 + V C 1 1 + SR 1 C 2 = I P 1 R 1 + VC 1 1 + SR 1 C 2 .. formula (3)
V C1Substitution formula (3)
V C = I P 1 R 1 + I P 1 SBC 4 1 + SR 1 C 2 = I P 1 ( R 1 + 1 SBC 4 ) 1 + SR 1 C 2 = I P 1 ( R 1 + 1 SBC 4 ) 1 + SR 1 C 2
= I P 1 R 1 S ( S + 1 BR 1 C 4 ) R 1 C 2 ( S + 1 R 1 C 2 ) = I P 1 ( S + 1 BR 1 C 4 ) SC 2 ( S + 1 R 1 C 2 ) .... transfer function (3)
By transfer function (3) and transfer function (1) more as can be known, but the present invention BC4=C1, C4=C1/B, make B that the area of capacitor C 4 is reduced to conventional capacitor C 1 doubly, and capacitor C 4 is a ground capacity, but the field-effect transistor electric capacity that the applying unit area is bigger (MOS CAP), in addition, owing to only use the one source pole follower, so circuit noise is less, and can reduce the influence of phase noise (phase noise) and time jitter (timingjitter), in addition, because voltage VC1 begins charging by threshold voltage vt h, arrive the needed time of preset frequency so can quicken phase-locked loop.
In sum; though the present invention with a preferred embodiment openly as above; right its is not in order to limit the present invention; any those skilled in the art; under the situation that does not break away from the spirit and scope of the present invention; can carry out various changes and modification, so protection scope of the present invention is as the criterion when looking the claim restricted portion that is proposed.

Claims (7)

1. a phase-locked loop circuit comprises:
Loop filter has a first input end and one second input, comprising:
One first electric capacity is coupled between this first input end and the ground;
One resistance, an end couples this first input end;
One second electric capacity, be coupled to this second input and should ground between;
One source pole follower, this source follower have a drain electrode and are coupled to a fixed voltage source, and a grid couples this second input, and one source pole is coupled to the other end of this resistance;
One first charge pump is coupled to this first input end, to export one first electric current;
One second charge pump is coupled to this second input, to export one second electric current;
One voltage controlled oscillator is coupled to the output of this loop filter;
One first frequency divider is coupled to the output of this voltage controlled oscillator, to export a feedback signal; And
One phase detectors, two inputs of these phase detectors are coupled to respectively on the output and one second frequency divider of this second frequency divider, and two outputs then are connected with this first charge pump and this second charge pump respectively;
Wherein this first electric current be for the B of this second electric current doubly, B>1 wherein.
2. phase-locked loop circuit as claimed in claim 1 comprises that also a current source is connected to the output of this source follower.
3. a loop filter, being used for a phase-locked loop circuit has a first input end and one second input, and this loop filter comprises:
One first electric capacity is coupled between this first input end and the ground;
One resistance, an end couples this first input end;
One second electric capacity, be coupled to this second input and should ground between; And
The one source pole follower, this source follower has a drain electrode, is coupled to a fixed voltage source, and a grid couples this second input, and one source pole is coupled to the other end of this resistance;
Wherein this phase-locked loop circuit also comprises one first charge pump, is coupled to this first input end, to export one first electric current and one second charge pump, be coupled to this second input, exporting one second electric current, this first electric current be for the B of this second electric current doubly, B>1 wherein.
4. loop filter as claimed in claim 3 also comprises a current source, is coupled to the output of this source follower.
5. loop filter as claimed in claim 3, wherein this phase-locked loop circuit also comprises a voltage controlled oscillator, is coupled to the output of this loop filter.
6. loop filter as claimed in claim 5, wherein this phase-locked loop circuit also comprises one first frequency divider, is coupled to the output of this voltage controlled oscillator, to export a feedback signal.
7. loop filter as claimed in claim 6, wherein this phase-locked loop circuit also comprises phase detectors, two inputs of these phase detectors are coupled to respectively on the output and one second frequency divider of this second frequency divider, and two outputs then are connected with this first charge pump and this second charge pump respectively.
CNB2004100617313A 2004-07-01 2004-07-01 Phase locked pool circuit Expired - Lifetime CN1310430C (en)

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CN1310430C true CN1310430C (en) 2007-04-11

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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100342652C (en) * 2005-04-11 2007-10-10 威盛电子股份有限公司 High-speed double power-supply phase-lock loop
US7629854B2 (en) * 2005-12-01 2009-12-08 Realtek Semiconductor Corp. Switch-capacitor loop filter for phase lock loops
US7706767B2 (en) * 2006-03-28 2010-04-27 Qualcomm, Incorporated Dual path loop filter for phase lock loop
JP4683088B2 (en) * 2008-07-31 2011-05-11 ソニー株式会社 Phase synchronization circuit, recording / reproducing apparatus, and electronic apparatus
KR101203370B1 (en) * 2009-07-24 2012-11-21 쟈인 에레쿠토로닉스 가부시키가이샤 Clock data restoration device
JP2011078054A (en) * 2009-10-02 2011-04-14 Sony Corp Current source, electronic apparatus, and integrated circuit
CN105634475B (en) * 2015-12-24 2018-10-30 西安电子科技大学 A kind of charge pump ring-oscillating phase-locking ring

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0779159A (en) * 1993-09-07 1995-03-20 Nec Corp Charge pump type phase locked loop
WO1997035382A1 (en) * 1996-03-21 1997-09-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Phase-locked loop switchable between a high and a low bandwidth
CN1490935A (en) * 2002-10-14 2004-04-21 联发科技股份有限公司 Return filter and compensating current adjustable method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0779159A (en) * 1993-09-07 1995-03-20 Nec Corp Charge pump type phase locked loop
WO1997035382A1 (en) * 1996-03-21 1997-09-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Phase-locked loop switchable between a high and a low bandwidth
CN1490935A (en) * 2002-10-14 2004-04-21 联发科技股份有限公司 Return filter and compensating current adjustable method

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