CN1307837C - Video playing system capable of generating line by line scanning and interlaced scanning visual signal together - Google Patents
Video playing system capable of generating line by line scanning and interlaced scanning visual signal together Download PDFInfo
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- CN1307837C CN1307837C CNB031436099A CN03143609A CN1307837C CN 1307837 C CN1307837 C CN 1307837C CN B031436099 A CNB031436099 A CN B031436099A CN 03143609 A CN03143609 A CN 03143609A CN 1307837 C CN1307837 C CN 1307837C
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Abstract
The present invention relates to an image playing system which comprises a main picture processor, an interleaved signal reestablishing module and a video encoding module, wherein the main picture processor generates a corresponding progressive main picture according to the image signals transmitted by an image memory, and a signal of the progressive main picture subsequently generates a progressive format signal by a preset image processing program; the interleaved signal reestablishing module receives a progressive format signal, and selectively stores the progressive format signal in an odd-even staggered temporary storage mode to obtain an interleaved format signal; the video encoding module respectively encodes the progressive format signal and the interlaced format signal to a progressive video signal and an interlaced video signal which accord with an image displaying device according to a video specification of the image displaying device. Thus, the image playing system can provide the progressive video signal and an interlaced video signal for the corresponding image displaying device to display images.
Description
Technical field
The present invention relates to a kind ofly can produce the image playing system of lining by line scan together with the interlacing scan video signal.
Background technology
Known dynamic image is to play, utilize the persistence of vision of human eye continuously by picture one by one and produce the effect of dynamic image.The broadcast of each picture is a starting point by the upper left side of picture then, laterally depicts a horizontal line to the right, begins next bar horizontal line again, and this is " scan line ".For example known NTSC specification promptly constitutes a picture with 525 scan lines, and wherein the effective scanning number of picture is 483.
During image display playing videos such as television set, projector or computer screen, can be divided into two kinds of scan modes usually, a kind ofly be the technology of interlacing scan (interlace scan), another kind then is the technology of line by line scan (progressive scan).Horizontal-interlace technique development for a long time, also the most normal being used, mostly most on the market at present television set is to come playing video in interleaved mode.Yet the also increase day by day of demand to line by line scan playing video, so some display unit in recent years also designs and can utilize the mode playing video of lining by line scan.
Interlacing scan is after having scanned the 1st line, is right after and what come is not the 2nd line of scanning, but scans with the order of the 3rd, 5,7 line, until the 525th line, to finish first picture, is called (field).And then get back to the second line, scan with the order of the 4th, 6,8 line, to finish second field.Therefore obtained to seem the picture of smoothness with interlacing scan, the scan mode that is actually with oem character set is constituted.
Lining by line scan is doubling interleaved sweep speed, with the 1st, 2,3,,, the order of 524,525 lines, scan line by line.The picture of lining by line scan is called frame (frame), also so more interleaved picture more careful, but line by line scan the data volume of video signal also normally more than the twice of interlacing scan video signal data volume.
See also Fig. 1, Fig. 1 is the calcspar of known image playing system 10.Known image playing system 10 designs in an one chip usually.Known image playing system 10 is to carry out image processing for the signal of video signal of being imported by the shadow memory 20 of an outside 22, can be for the interlacing scan video signal 11 of display unit broadcast to export one.Image playing system 10 comprises an interlaced format picture processor 12 and a video information coder 14.Interlaced format picture processor 12 is from shadow memory 20, in the mode that meets alternate-line scanning signal of video signal 22 is read, and be sent among the video information coder 14, carry out the processing that low-pass filtering, brightness adjustment, colourity adjustment and contrast adjustment etc. are adjusted with convenient image, and this interlaced format signal encoding is become to meet the interlacing video signal 11 of the video signal specification of this image display.
See also Fig. 2, Fig. 2 is for being converted to the schematic diagram of video signal 31 line by line by the interlacing video signal 11 of Fig. 1.Desire to make the display unit that can line by line scan to present image with progressive scan mode, then Shu Ru video signal need be corresponding video signal line by line 31.In the known image playing system 10, converting interlacing video signal 11 to the method for video signal 31 line by line is to utilize an interlacing that is arranged on image playing system 10 outsides converter ic 13 line by line, to mend into a scanning linear signal in the mode of interpolation or emulation between two adjacent in the interlacing video signal 11 scanning linear signals, promptly utilizing interpolation or simulated mode is frame (frame) signal with field (field) conversion of signals, interlacing video signal 11 can be converted to video signal 31 line by line in this way.Because interlacing change-over circuit 13 line by line need design on another chip outside the image playing system 10, manufacturing cost is quite high, thereby this kind method is subjected to the restriction of cost in practical application.
See also Fig. 3, Fig. 3 for another known image playing system 30 in order to produce the calcspar of video signal 31 line by line.Known image playing system 30 is in order to produce video signal 31 line by line.Known image playing system 30 also can design on an one chip.
The known image playing system 30 of this kind further can meet the image processing that scans line by line according to signal of video signal 22 except having the identical functions with corresponding image Play System 10.This is owing to the function that has interpolation or emulation in the picture processor 32, can produce to meet the frame signal of lining by line scan when reading signal of video signal 22.In addition, video information coder 34 further can will become to meet the video signal line by line 31 of the video signal specification of this image display from the signal encoding of picture processor 32.
See also Fig. 4, Fig. 4 is the calcspar of the image playing system 30 of Fig. 3 in order to generation interlacing video signal 11.What deserves to be mentioned is that image playing system 30 has and image playing system 10 identical functions, also can export alternate-line scanning video signal 11 separately.When image playing system 30 when producing interlacing scan video signal 11, picture processor 32 does not use the function of interpolation or emulation, reads signal of video signal 22 in the mode identical with the picture processor 12 of Fig. 1.In other words, the picture processor 12 of this image playing system 30 has two kinds of patterns: pattern and interlaced mode line by line, so image playing system 30 visual demands are exported video signal 31 or alternate-line scanning video signal 11 line by line respectively.
The image playing system 30 of comparison diagram 3 and Fig. 4 can be learnt with the embodiment of the image playing system 10 of Fig. 2, need to form when lining by line scan video signal 31, image playing system 30 does not need to use outside interlacing change-over circuit 13 line by line, thereby can reduce manufacturing cost, but image playing system 30 optionally to play line by line scan video signal 31 or interlacing scan video signal 11, but can't make both play together only.
Summary of the invention
The purpose of this invention is to provide the image playing system of one chip design, simple and cost less expensive, and can export together and line by line scan and two kinds of video signals of interlacing scan, use for various image displays such as television set, projectors.
The present invention is a kind of image playing system (video playback system), and video signal and an interlacing video signal give at least one image display line by line to be used for producing simultaneously one.This image playing system includes a key frame processor, an interlace signal generation module and a video coding module, and wherein this interlace signal generation module comprises a brightness (luminance) row buffer, at least one colourity (chroma) row buffer and a control circuit.The signal of video signal (video signals) that this key frame processor (main picture processor) is transmitted according to shadow memory (memory), and produce corresponding main screen signal line by line.Main screen signal can be in follow-up via a predetermined image processing program line by line for this, generation progressive signal stream.This interlace signal generation module can receive this progressive signal stream, and use the temporary mode of an oem character set optionally this progressive signal stream to be stored in the row buffer, to rebuild interlace signal stream.This video coding module can be according to the video signal specification of this image display, and this that this progressive signal stream and this interlace signal flow point is not encoded into the video signal specification that meets this image display be video signal and this interlacing video signal line by line.By this this image playing system can with this line by line video signal export with this interlacing video signal show so that corresponding image display carries out image.
The present invention is under the image playing system framework of known one chip design, the design that adds an interlace signal generation module, make image playing system of the present invention need not using under the situation of an external circuit, still reach and export the purpose of lining by line scan together with the interlacing scan video signal.Because of having avoided the use of external circuit, the present invention can make manufacturing cost decline to a great extent.Adopt the image player of image playing system of the present invention, for example: digital laser video disk machine (DVD Player), can export the video signal of lining by line scan simultaneously in the most cost-effective mode, and interlacing scan video signal, therefore (for example: television set) need simultaneously external first image display of only accepting the interlacing scan video signal when this digital laser video disk machine, and second image display of the video signal of can accepting to line by line scan (for example: projector, or during the high-order television set), two image displays can bring into play simultaneously all that it is the most high-effect.
Can be about the advantages and spirit of the present invention by following detailed Description Of The Invention and appended graphic being further understood.
Description of drawings
Fig. 1 is the schematic diagram of known image playing system 10;
Fig. 2 is that the interlacing video signal 11 by Fig. 1 forms the device schematic diagram of video signal 31 line by line;
Fig. 3 is the schematic diagram of known image playing system 30;
Fig. 4 is that the known image playing system 30 of Fig. 3 is in order to produce the schematic diagram of interlacing video signal 11;
Fig. 5 is the schematic diagram of image playing system 50 of the present invention;
Fig. 6 is the schematic diagram that the image playing system 50 of Fig. 5 is exported interlacing video signal 11 separately;
Fig. 7 is the schematic diagram of another embodiment of the present invention image playing system 90;
Fig. 8 is the temporary mode schematic diagram of the oem character set that uses of the interlace signal rebuilding module 60 of Fig. 5.
Fig. 9 is interlace signal rebuilding module 60 schematic diagrames of the present invention; With
Figure 10 uses an outside progressive signal to flow 86 schematic diagrames for the image playing system 50 of Fig. 5.
The drawing reference numeral explanation
10,30: known image playing system 11: interlacing video signal
13: interlacing is change-over circuit 14,34 line by line: video information coder
20: shadow memory 22: signal of video signal
32: picture processor 50,90: image playing system
52: key frame processor 54: the auxiliary image processor
56: blender 58,96,98: preceding level processor
60,92: interlace signal generation module 61: brightness row buffer
62: video coding module 63: video coding module line by line
64: 65: the first colourity row of interlacing video coding module buffer
66: 67: the second colourity row of sprite decoder buffer
68: look control display menu processor 69: control circuit
72: low pass filter 74: the brightness adjuster
76: colourity adjuster 78: the contrast adjuster
80: main screen signal 81 line by line: the interlacing main screen signal
82: the sprite signal 83 line by line: interlacing sprite signal
84: osd signal 85 line by line: the interlacing osd signal
86,93: progressive signal stream 88,94: interlace signal stream
97: interlacing video signal co-generator line by line
Embodiment
See also Fig. 5, Fig. 5 is the calcspar of image playing system 50 of the present invention.Image playing system 50 comprises a key frame processor 52, an auxiliary image processor 54, a blender 56, one preceding level processor 58, an interlace signal generation module 60 and a video coding module 62.Auxiliary image processor 54 comprises a sprite decoder 66 and and looks control display menu processor 68.Preceding level processor 58 comprises a low pass filter 72, a brightness adjuster 74, a colourity adjuster 76 and a contrast adjuster 78.
Image playing system 50, be used for producing together one line by line video signal 31 and an interlacing video signal 11 give at least one image display, show to carry out image.
As shown in Figure 5, key frame processor 52, the signal of video signal 22 that can be transmitted according to shadow memory 20, and produce corresponding main screen signal line by line 80.If signal of video signal 20 interlacing forms, then key frame processor 52 carries out interpolation between adjacent scanning lines or simulation with signal of video signal 22 and produces main screen signal 80 line by line.If signal of video signal 22 is form line by line, then do not need the program of this interpolation or emulation, and can produce main screen signal 80 line by line by key frame processor 52.Main screen signal 80 includes the image data of the key frame of desiring playing video line by line.Main screen signal 80 produces progressive signal stream 86 through a predetermined image processing program line by line.
Should predetermined image processing program be carried out via auxiliary image processor 54, blender 56 and prime treatment circuit 58.
As shown in Figure 5, prime treatment circuit 58 comprises a low pass filter (lowpass filter) 72, one brightness adjuster (brightness adjuster) 74, one colourity adjuster (color adjuster) 76 and one contrast adjuster (contrast adjuster) 78.Main screen signal 80 further can carry out the adjustment of low-pass filtering, image brilliance, colourity and contrast by prime treatment circuit 58 after the mixing of signal line by line, and produces progressive signal stream 86.
Interlace signal generation module 60 can receive progressive signal stream 86, and uses the temporary mode of an oem character set optionally this progressive format signal to be stored in the inner row buffer, to rebuild interlace signal stream 88.Please refer to Fig. 9, Fig. 9 is interlace signal generation module 60 schematic diagrames of the present invention.Present embodiment is the color representation form that adopts brightness (Luminance), colourity (Chrominance), and Y represents brightness value, and C represents chromatic value (C comprises CB and CR, represents first and second chromatic value respectively).Therefore interlace signal generation module 60 inside have comprised brightness row buffer 61 with temporary monochrome information; The first colourity row buffer 65, the second colourity row buffer 67 are with temporary chrominance information; And one control circuit 69 with the access of control brightness, chrominance information.Defined three kinds of sampling forms among the MPEG-2, be respectively 4: 2: 0 sampling forms, 4: 2: 2 sampling forms, and 4: 4: 4 sample formats, represented three kinds of different chroma sampling frequencies respectively, this is that the people in the industry is known.Therefore can be provided with one or two colourity row buffer in the interlace signal generation module 60 and keep in chrominance information.
As shown in Figure 5, video coding module 62 includes a video coding module 63 and an interlacing video coding module 64 line by line.Video coding module 63 and interlacing video coding module 64 can flow progressive signal 86 and be encoded into the video signal line by line 31 and interlacing video signal 11 of the video signal specification that meets this image display respectively with interlace signal stream 88 line by line.
This image playing system can be with video signal 31 line by line with 11 outputs of interlacing video signal by this, show so that corresponding one or a plurality of image display can carry out image.
At this of particular note, the present invention so-called " (together) together " considers to cause transfer process between signal line by line video signal 31 is not that " (simultaneous) simultaneously " produces with interlacing video signal 11.In other words, no matter line by line whether the time point that produced of video signal 31 and interlacing video signal 11 is identical, can produce " together " line by line scan video signal 31 and interlacing scan video signal 11 and give image display and carry out the image playing system that image displays the play and all should be covered by in the category of claim of the present invention.In the image playing system 50 shown in Figure 5, key frame processor 52, sprite decoder 66 and look control display menu processor 68 threes and operate to meet the mode of lining by line scan.Only with output optionally line by line scan video signal 31 or interlacing scan video signal 11, both are play compared to Fig. 3 and known image playing system 30 shown in Figure 4 together.Image playing system 50 of the present invention uses the temporary mode of an oem character set with an interlace signal rebuilding module 60, and finally can make the video signal 31 of lining by line scan with 11 outputs of interlacing scan video signal.
See also Fig. 6, Fig. 6 is the calcspar that the image playing system 50 of Fig. 5 is exported interlacing video signal 11 separately.Image playing system 50 of the present invention also can be exported interlacing video signal 11 separately except making line by line video signal 31 with 11 outputs of interlacing video signal.When utilizing image playing system 50 separately during output interlacing video signal 11, key frame processor 52 does not carry out the interpolation between adjacent scanning lines or the processing of simulation.Key frame processor 52, sprite decoder 66 and look control display menu processor 68 and operate to meet interleaved mode respectively, according to signal of video signal 22, produce an interlacing main screen signal 81, an interlacing sprite signal 83 and an interlacing osd signal 85.This embodiment is same as the known technology of Fig. 4.Under this embodiment, interlace signal generation module 60 and line by line video coding module 63 there is no effect.
See also Fig. 7, Fig. 7 is the calcspar of another embodiment of the present invention image playing system 90.The image playing system 90 of Fig. 7 and the image playing system 50 main difference of Fig. 5 are the configuration of interlace signal generation module 92 circuit positions.Interlace signal generation module 92 uses the storing mode of an oem character set optionally this progressive format signal to be stored the progressive signal stream 93 that blender 56 is transmitted, to draw interlace signal stream 94.
As shown in Figure 7, progressive signal stream 93 carries out the adjustment of low-pass filtering, image brilliance, colourity and contrast via preceding level processor 96 with preceding level processor 98 respectively with interlace signal stream 94.And then progressive signal stream 93 and interlace signal stream 94 are encoded into the video signal line by line 31 and interlacing video signal 11 of the video signal specification that meets this image display respectively by video coding module line by line 63 and interlacing video coding module 64.
The embodiment of comparison diagram 5 and Fig. 7, the embodiment of Fig. 5 had carried out the adjustment of low-pass filtering, image brilliance, colourity and contrast earlier before using interlace signal generation module 60 generation interlace signal streams 88 as can be known, therefore can reduce the use of a prime treatment circuit.And only partly designed 64 liang of covers of video coding module 63 and interlacing video coding module circuit line by line respectively for the video coding that must handle respectively.
See also Figure 10, Figure 10 uses an outside progressive signal to flow 86 schematic diagrames for the image playing system 50 of Fig. 5.In the foregoing embodiments, image playing system 50 is in order to play as stored image data in the image Storage Medias such as VCD, DVD.As shown in figure 10, image playing system 50 of the present invention further can utilize the progressive signal stream 86 of an outside, to produce a video signal 31 and an interlacing video signal 11 line by line together.Generally speaking from the wired or wireless TV signal of high-order, for example, some sports casts adopt the bigger interlace signal stream 86 of data volume to outside progressive signal stream 86 when playing, in the hope of the quality of image quality in the motion.In addition, many cities change to the form of lining by line scan with the specification that country is also just planning wireless television signal, to meet the display unit with the function of lining by line scan.In the present embodiment, the interlace signal generation module 60 of image playing system 50 and video coding module 62 can be regarded as an interlacing video signal co-generator 97 line by line, with in the process that reads progressive signal stream 86, utilize interlace signal generation module 60 to produce interlace signal stream 88, and utilize video coding module 62 that two kinds of signal flows are encoded into interlacing video signal 31 and video signal 11 line by line.
See also Fig. 8, Fig. 8 is the temporary mode schematic diagram of the oem character set that uses of the interlace signal generation module 60 of Fig. 5.P1 is for constituting the progressive-scan signal of a picture.The odd number bar scanning-line signal of P1 (P1L1, P1L3, P1L5, ,) is kept, even number bar scanning-line signal (P1L2, P1L4, P1L6, ,) give up.The signal that keeps is stored to the one or more row buffers in the interlace signal generation module 60.And, therefore make data that interlace signal generation module 60 stores with half frequency output of P1 to produce an interleaved signal I1 because the speed of lining by line scan is interleaved twice.This is the conversion of the data of a picture.And the even number bar scanning-line signal (P2L1, P2L3, P2L5, ,) that will constitute the progressive-scan signal P2 of next picture keeps, odd number bar scanning-line signal (P2L2, P2L4, P2L6, ,) give up.And the signal that keeps is stored to one or more row buffers in the interlace signal generation module 60.Make data that interlace signal generation module 60 stores with half frequency output of P2 to produce the interleaved signal I2 that constitutes this picture.Next again picture then replaces again odd number bar scanning-line signal (P3L1, P3L3, P3L5, ,) is kept, and even number bar scanning-line signal (P3L2, P3L4, P3L6, ,) is given up.This is interlace signal generation module 60 of the present invention and uses the temporary mode of an oem character set optionally this progressive format signal to be stored, to rebuild the method for an interlaced format signal.Root can be converted to interlaced format signal 88 with progressive format signal 86 accordingly.Comprehensive the above, the present invention is under the framework of the image playing system of a known one chip design, the design that adds an interlace signal rebuilding module, make image playing system of the present invention need not using under the situation of an external circuit, still reach and export the purpose of lining by line scan simultaneously with the interlacing scan video signal.Because of having avoided the use of external circuit, the present invention can make manufacturing cost decline to a great extent.
By the above detailed description of preferred embodiments, hope can be known description feature of the present invention and spirit more, and is not to come category of the present invention is limited with above-mentioned disclosed preferred embodiment.On the contrary, its objective is that hope can contain in the category that is arranged in claim of the present invention of various changes and tool equality.
Claims (20)
1. image playing system, be used for producing together one line by line video signal and an interlacing video signal give at least one image display, this image playing system includes:
One key frame processor is used for the signal of video signal that transmitted according to a shadow memory, and produces corresponding one main screen signal line by line, this line by line main screen signal can produce progressive signal stream in follow-up via a predetermined image processing program;
One interlace signal generation module wherein comprises at least one row buffer, can receive this progressive signal stream, and use the temporary mode of an oem character set optionally this progressive signal stream to be stored, to produce interlace signal stream; And
One video coding module can be according to the video signal specification of this image display, and this that this progressive signal stream and this interlace signal flow point is not encoded into the video signal specification that meets this image display be video signal and this interlacing video signal line by line;
By this this image playing system can with this line by line video signal provide with this interlacing video signal and give this image display and show to carry out image.
2. image playing system as claimed in claim 1, wherein this image playing system also comprises an auxiliary image processor and a blender, and this auxiliary image processor comprises:
A picture decoder is according to the signal of video signal of this shadow memory, to be decoded into the corresponding signal of subframe line by line; And
One looks control display menu processor, according to the signal of video signal of this shadow memory, to produce the corresponding control display menu signal of looking line by line;
Wherein this blender can with this line by line subframe signal and this look line by line control display menu signal with this line by line main screen signal carry out mixing of signal.
3. image playing system as claimed in claim 1, wherein this image playing system also comprises a prime treatment circuit, carry out the processing and the adjustment of image with the signal that will be imported, this prime treatment circuit comprises a low pass filter, a brightness adjuster, a colourity adjuster and a contrast adjuster.
4. image playing system as claimed in claim 3, wherein should predetermined image processing program be with this line by line main screen signal mix via this blender, and via this prime processing circuit processes and adjustment.
5. image playing system as claimed in claim 1, wherein this video coding module comprises a video coding module and an interlacing video coding module line by line.
6. image playing system as claimed in claim 5, wherein this interlacing video coding module is read and is produced this interlace signal stream in the follow-up frequency that stored signal is flowed half with this progressive signal.
7. image playing system as claimed in claim 1, wherein this progressive signal stream is made up of a plurality of frame signal, and described frame signal is made up of multi-strip scanning line signal.
8. image playing system as claimed in claim 7, wherein the temporary mode of this oem character set is meant that this interlace signal generation module carries out following signal processing for the one first and one second adjacent frame signal that is received:
Only store wherein odd number bar scanning-line signal for this first frame signal, and only store wherein even number bar scanning-line signal for this second frame signal.
9. image playing system as claimed in claim 7, wherein the temporary mode of this oem character set is meant that this interlace signal generation module carries out following signal processing for the one first and one second adjacent frame signal that is received:
Only store wherein even number bar scanning-line signal for this first frame signal, and only store wherein odd number bar scanning-line signal for this second frame signal.
10. image playing system as claimed in claim 1, wherein this image playing system can be connected to two different image displays, and this image playing system produced this video signal and this interlacing video signal can send above-mentioned two image displays respectively to and show to carry out image line by line.
11. image playing system as claimed in claim 1, wherein the described row buffer in this interlace signal generation module is to be a brightness row buffer and at least one colourity row buffer; The quantity of this colourity row buffer is to look the chroma sampling frequency to determine with the different of brightness sampling frequency ratio.
12. an interlacing video signal co-generator line by line, produce together to flow to according to a progressive signal one line by line video signal and an interlacing video signal give at least one image display, this line by line interlacing video signal co-generator include:
One interlace signal generation module wherein comprises at least one row buffer, can receive progressive signal stream, and use the temporary mode of an oem character set optionally this progressive signal stream to be stored, to produce interlace signal stream; And
One video coding module can be according to the video signal specification of this image display, and this that this progressive signal stream and this interlace signal flow point is not encoded into the video signal specification that meets this image display be video signal and this interlacing video signal line by line;
By this this image playing system can with this line by line video signal provide with this interlacing video signal and give this image display and show to carry out image.
13. one kind utilize an interlace signal generation module and make an image playing system can produce one together video signal and an interlacing video signal give the method for at least one image display line by line, this image playing system includes the interlace signal generation module with at least one row buffer, and this video coding module of video signal and this interlacing video signal line by line that can one a progressive signal stream and an interlace signal flow point be encoded into the video signal specification that meets this image display according to the video signal specification of this image display;
This method comprises the following step:
Before this progressive signal stream is not encoded via this video coding module as yet, this progressive signal fluently optionally is stored in this interlace signal generation module with the temporary mode of an oem character set, to produce this interlace signal stream; And
This progressive signal stream is not encoded into this video signal and this interlacing video signal line by line with this interlace signal flow point;
This image playing system can produce this together video signal and this interlacing video signal give this image display and show to carry out image line by line by this.
14. method as claimed in claim 13, wherein this image playing system via a predetermined image processing program, and produces this progressive signal stream according to the signal of video signal that shadow memory transmitted of an outside.
15. method as claimed in claim 13, wherein this video coding module comprises a video coding module and an interlacing video coding module line by line.
16. method as claimed in claim 15, wherein this interlacing video coding module is read and is produced this interlace signal stream in the follow-up frequency that stored signal is flowed half with this progressive signal.
17. method as claimed in claim 13, wherein this progressive signal stream system is made up of a plurality of frame signal, and described frame signal system is made up of multi-strip scanning line signal.
18. method as claimed in claim 17, wherein the temporary mode of this oem character set is meant that this interlace signal generation module can carry out following signal processing for the one first and one second adjacent frame signal that is received:
Only store wherein odd number bar scanning-line signal for this first frame signal, and only store wherein even number bar scanning-line signal for this second frame signal.
19. method as claimed in claim 17, wherein the temporary mode of this oem character set is meant that this interlace signal generation module can carry out following signal processing for the one first and one second adjacent frame signal that is received:
Only store wherein even number bar scanning-line signal for this first frame signal, and only store wherein odd number bar scanning-line signal for this second frame signal.
20. method as claimed in claim 17, wherein the described row buffer in this interlace signal generation module is a brightness row buffer and at least one colourity row buffer; The quantity of this colourity row buffer is looked the chroma sampling frequency and is determined with the different of brightness sampling frequency ratio.
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| CN1193782A (en) * | 1997-02-28 | 1998-09-23 | 三洋电机株式会社 | Digital camera |
| JPH1155631A (en) * | 1997-07-31 | 1999-02-26 | Nec Corp | Image display processing system |
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| CN1571503A (en) | 2005-01-26 |
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