CN1307568C - 计算机系统的输入/输出节点装置 - Google Patents

计算机系统的输入/输出节点装置 Download PDF

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Publication number
CN1307568C
CN1307568C CNB028199618A CN02819961A CN1307568C CN 1307568 C CN1307568 C CN 1307568C CN B028199618 A CNB028199618 A CN B028199618A CN 02819961 A CN02819961 A CN 02819961A CN 1307568 C CN1307568 C CN 1307568C
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China
Prior art keywords
unit
communication path
bus
input
instruction
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Expired - Lifetime
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CNB028199618A
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English (en)
Chinese (zh)
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CN1568462A (zh
Inventor
S·C·恩尼斯
L·D·黑维特
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Publication of CN1568462A publication Critical patent/CN1568462A/zh
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/128—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bus Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
CNB028199618A 2001-10-15 2002-08-09 计算机系统的输入/输出节点装置 Expired - Lifetime CN1307568C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/978,349 2001-10-15
US09/978,349 US6807599B2 (en) 2001-10-15 2001-10-15 Computer system I/O node for connection serially in a chain to a host

Publications (2)

Publication Number Publication Date
CN1568462A CN1568462A (zh) 2005-01-19
CN1307568C true CN1307568C (zh) 2007-03-28

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Family Applications (1)

Application Number Title Priority Date Filing Date
CNB028199618A Expired - Lifetime CN1307568C (zh) 2001-10-15 2002-08-09 计算机系统的输入/输出节点装置

Country Status (8)

Country Link
US (1) US6807599B2 (enExample)
EP (1) EP1444587B1 (enExample)
JP (1) JP4391819B2 (enExample)
KR (1) KR100968250B1 (enExample)
CN (1) CN1307568C (enExample)
DE (1) DE60226167T2 (enExample)
TW (1) TW588250B (enExample)
WO (1) WO2003034239A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6834319B1 (en) * 2002-03-21 2004-12-21 Advanced Micro Devices, Inc. Tunnel device for an input/output node of a computer system
US7315912B2 (en) * 2004-04-01 2008-01-01 Nvidia Corporation Deadlock avoidance in a bus fabric
US7430622B1 (en) * 2005-01-18 2008-09-30 Advanced Micro Devices, Inc. Extended fairness arbitration for chains of point-to -point devices having multiple virtual channels
US8223650B2 (en) 2008-04-02 2012-07-17 Intel Corporation Express virtual channels in a packet switched on-chip interconnection network
US8392667B2 (en) * 2008-12-12 2013-03-05 Nvidia Corporation Deadlock avoidance by marking CPU traffic as special
US8225052B2 (en) 2009-06-03 2012-07-17 Micron Technology, Inc. Methods for controlling host memory access with memory devices and systems
US8549202B2 (en) 2010-08-04 2013-10-01 International Business Machines Corporation Interrupt source controller with scalable state structures
US20120036302A1 (en) 2010-08-04 2012-02-09 International Business Machines Corporation Determination of one or more partitionable endpoints affected by an i/o message
US9336029B2 (en) 2010-08-04 2016-05-10 International Business Machines Corporation Determination via an indexed structure of one or more partitionable endpoints affected by an I/O message
US8495271B2 (en) * 2010-08-04 2013-07-23 International Business Machines Corporation Injection of I/O messages
US9824058B2 (en) * 2014-11-14 2017-11-21 Cavium, Inc. Bypass FIFO for multiple virtual channels
US11734155B2 (en) * 2021-07-22 2023-08-22 Disney Enterprises, Inc. Fully traceable and intermediately deterministic rule configuration and assessment framework

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5751951A (en) * 1995-10-30 1998-05-12 Mitsubishi Electric Information Technology Center America, Inc. Network interface
US5809328A (en) * 1995-12-21 1998-09-15 Unisys Corp. Apparatus for fibre channel transmission having interface logic, buffer memory, multiplexor/control device, fibre channel controller, gigabit link module, microprocessor, and bus control device
WO1999016195A1 (en) * 1997-09-24 1999-04-01 Emulex Corporation Full-duplex communication processor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6278532B1 (en) 1996-12-20 2001-08-21 Link2It Apparatus and method for reception and transmission of information using different protocols
JP2970596B2 (ja) 1997-06-10 1999-11-02 日本電気株式会社 Ａｔｍ通信装置
JPH1185345A (ja) 1997-09-02 1999-03-30 Toshiba Corp 入出力インターフェース回路及び半導体システム
JPH11143847A (ja) * 1997-11-10 1999-05-28 Fujitsu Ltd データ処理装置
US6691185B2 (en) * 2001-07-13 2004-02-10 Sun Microsystems, Inc. Apparatus for merging a plurality of data streams into a single data stream
US6697890B1 (en) * 2001-12-27 2004-02-24 Advanced Micro Devices, Inc. I/O node for a computer system including an integrated I/O interface

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5751951A (en) * 1995-10-30 1998-05-12 Mitsubishi Electric Information Technology Center America, Inc. Network interface
US5809328A (en) * 1995-12-21 1998-09-15 Unisys Corp. Apparatus for fibre channel transmission having interface logic, buffer memory, multiplexor/control device, fibre channel controller, gigabit link module, microprocessor, and bus control device
WO1999016195A1 (en) * 1997-09-24 1999-04-01 Emulex Corporation Full-duplex communication processor

Also Published As

Publication number Publication date
EP1444587A1 (en) 2004-08-11
US20030097514A1 (en) 2003-05-22
DE60226167T2 (de) 2009-05-14
KR20040054722A (ko) 2004-06-25
US6807599B2 (en) 2004-10-19
JP4391819B2 (ja) 2009-12-24
KR100968250B1 (ko) 2010-07-06
TW588250B (en) 2004-05-21
CN1568462A (zh) 2005-01-19
WO2003034239A1 (en) 2003-04-24
EP1444587B1 (en) 2008-04-16
JP2005505855A (ja) 2005-02-24
DE60226167D1 (en) 2008-05-29

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Granted publication date: 20070328