CN1303658C - Method for producing thin film transistor and its structure - Google Patents

Method for producing thin film transistor and its structure Download PDF

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CN1303658C
CN1303658C CNB2004100637800A CN200410063780A CN1303658C CN 1303658 C CN1303658 C CN 1303658C CN B2004100637800 A CNB2004100637800 A CN B2004100637800A CN 200410063780 A CN200410063780 A CN 200410063780A CN 1303658 C CN1303658 C CN 1303658C
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polysilicon layer
layer
film transistor
polysilicon
oxygen
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CN1588629A (en
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张志雄
曹义昌
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AU Optronics Corp
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AU Optronics Corp
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Abstract

The present invention relates to a making method for a film transistor and a structure thereof. The method for forming a polycrystalline silicon layer for a film transistor at least comprises the steps: providing a baseplate with an insulative surface, forming an amorphous silicon layer on the insulative surface and providing an atmosphere to cause the amorphous silicon layer to be crystallized to form a polycrystalline silicon layer. The atmosphere at least comprises nitrogen and oxygen, and the concentration range of the oxygen is between 50 ppm and 50000 ppm.

Description

Method of manufacturing thin film transistor and structure thereof
Technical field
The present invention relates to manufacture method and the structure thereof of a kind of low-temperature polysilicon film transistor (LTPS TFTs), and particularly relate to a kind of method and structure thereof of utilizing excimer laser tempering technology (ELA) low temperature to form polycrystalline SiTFT.
Background technology
In the present thin-film transistor treatment technology, low-temperature polysilicon film transistor (low temperaturepoly-silicon thin film transistors, LTPS TFTs) technology mainly is to utilize the polysilicon layer of polysilicon formation thin-film transistor, to improve transistorized driving force.Because excimer laser tempering (Excimerlaser annealing, ELA) method can form high-quality polysilicon under the situation of low temperature, can be considered the guardian technique of low temperature polycrystalline silicon, the major technique of making the very-high performance low-temperature polysilicon film transistor after also being.
Traditional ELA technology comprises the following steps.Traditional E LA technology under specific atmospheric condition, with amorphous silicon (Amorphous Silicon, a-Si) change into polysilicon (Poly-Silicon, poly-Si).At first, deposition buffering/amorphous silicon layer on general substrate, the effect of resilient coating is that the impurity in avoiding substrate diffuses out because of the operation of follow-up higher temperatures.Then, carry out the tempering of proper temperature, to remove the hydrogen content in the amorphous silicon membrane.Before excimer laser crystallization,, distribute to reach stable component characteristic with Ozone Water and hydrogen ion water cleaning base plate.Ozone Water has the function of oxidation Si top layer, organic pollution and metallics, and hydrogen ion water is in order to remove the particulate of substrate surface.Then, at purity nitrogen atmosphere (N 2, [O 2Under]<1ppm) or the vacuum, utilize the excimer laser of laser beam overlapping rate 75-98% on substrate, to scan, the former amorphous silicon membrane that belongs to is crystallized into polysilicon membrane.Afterwards, carry out technologies such as gate insulator, gate electrode, source electrode and drain electrode.
Yet (Lightly Doped Drains, N-TFT LDD) are example, and the lattice size that forms under this kind condition is about 3000 , and electron mobility is less than 150cm to have lightly doped drain 2/ V-s.Be applied on more high performance LCD Panel or the electronic building brick circuit for the ELA technology is expanded, how improve electron mobility, reduce the primary at present just problem that breaks through of drive IC cost.
Summary of the invention
In view of this, purpose of the present invention is exactly manufacture method and the structure thereof at the polysilicon layer of the thin-film transistor that provides a kind of step to simplify, electrically improve.The present invention can simplify before the crystallization step of cleaning base plate in advance, and can reach same oxidation effectiveness in crystallization process, and helps the stability and the qualification rate of ELA technology.ELA technology by step is simplified can effectively reduce manufacturing cost.In addition, the polysilicon layer electron mobility height of the thin-film transistor that the present invention makes, and critical voltage does not improve relatively.With low cost, improve electron mobility and increase grain size
According to purpose of the present invention, a kind of method that forms the polysilicon layer of thin-film transistor is provided, comprise step at least: a substrate is provided, and substrate has an insulating surface; Form an amorphous silicon layer (amorphousSilicon layer, a-Si layer) on insulating surface; Provide an atmosphere to make the amorphous silicon layer crystallization, to form a polysilicon layer (Poly-Si layer), wherein, atmosphere comprises nitrogen and oxygen at least, and has between an oxygen concentration scope 50ppm and the 50000ppm.
According to another object of the present invention, a kind of semiconductor subassembly is provided, comprise at least: one has the substrate of an insulating surface; One is formed on the polysilicon layer on the insulating surface of substrate, has oxygen content in the polysilicon layer more than or equal to 2 * 10 19And less than 1 * 10 20Atoms/cm 3Thin-film transistor component.
According to a further object of the present invention, a kind of semiconductor subassembly is provided, comprise at least: one has the substrate of an insulating surface; One is formed on the polysilicon layer on the insulating surface of substrate, has the thin-film transistor component of a range of surface roughness between 3nm to 12nm in the polysilicon layer.
According to another purpose of the present invention, a kind of thin-film transistor is provided, comprise at least: a substrate, this substrate has an insulating surface; One grid electrode layer, this grid electrode layer are formed on the insulating surface of substrate; One gate insulator, this gate insulator is formed on the grid electrode layer; One polysilicon layer, this polysilicon layer is formed on the gate insulator, and gate insulator is between grid electrode layer and polysilicon layer, and wherein polysilicon layer has more than or equal to 2 * 10 19And less than 1 * 10 20Atoms/cm 3Concentration of oxygen atoms.
According to another purpose of the present invention, a kind of thin-film transistor is provided, comprise at least: a substrate, this substrate has an insulating surface; One grid electrode layer, this grid electrode layer are formed on the insulating surface of substrate; One gate insulator, this gate insulator is formed on the grid electrode layer; One polysilicon layer, this polysilicon layer is formed on the gate insulator, and gate insulator is between grid electrode layer and polysilicon layer, and wherein polysilicon layer has a range of surface roughness between 3nm to 12nm.
According to another purpose of the present invention, a kind of thin-film transistor is provided, comprise at least: an insulating barrier, this insulating barrier have one first relative side and one second side; One polysilicon layer, this polysilicon layer are formed at first side of insulating barrier, and wherein the oxygen content in the polysilicon layer is more than or equal to 2 * 10 19And less than 1 * 10 20Atoms/cm 3One grid electrode layer, this grid electrode layer are formed at second side of insulating barrier, and insulating barrier is between grid electrode layer and polysilicon layer.
According to another purpose of the present invention, a kind of thin-film transistor is provided, comprise at least: an insulating barrier, this insulating barrier have one first relative side and one second side; One polysilicon layer, this polysilicon layer are formed at first side of insulating barrier, and wherein a surface roughness of polysilicon layer is between 3nm and 12nm; One grid electrode layer, this grid electrode layer are formed at second side of insulating barrier, and insulating barrier is between grid electrode layer and polysilicon layer.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent,, and in conjunction with the accompanying drawings, be described in detail below below especially exemplified by a preferred embodiment:
Description of drawings
Fig. 1 is the flow chart of the method for the expression polysilicon layer that forms thin-film transistor according to the preferred embodiment of the present invention a kind of.
Fig. 2 is the generalized section of expression according to a kind of bottom-gate (bottom gate) thin-film transistor of the preferred embodiments of the present invention manufacturing.
Fig. 3 is the generalized section of expression according to a kind of top grid (top gate) thin-film transistor of the preferred embodiments of the present invention manufacturing.
The graph of a relation of oxygen concentration when Fig. 4 is the electronics mobility of polysilicon layer of expression the preferred embodiments of the present invention and crystallization.
The graph of a relation of oxygen concentration when Fig. 5 is the critical voltage of polysilicon layer of expression present embodiment and crystallization.
Fig. 6 is that the polysilicon layer of expression present embodiment utilizes ion microprobe (SIMS) oxygen content that is measured and the graph of a relation of depth of film.
Fig. 7 is the roughness graph of a relation of the polysilicon layer of expression present embodiment oxygen content and polysilicon membrane when utilizing the crystallization that atomic force microscope (AFM) measures.
Embodiment
The present invention is primarily aimed at ELA technology and is improved, and the oxygen that adds trace under nitrogen atmosphere carries out the amorphous silicon conversion, makes the grain size (grain size) of the polysilicon after changing increase.The polysilicon lattice that is positioned at the TFT channel layer hinders and reduces, and electronics makes the electron mobility of this thin-film transistor surmount the thin-film transistor of general ELA technology by being difficult for running into obstacle.
With reference to Fig. 1, Fig. 1 is the flow chart of the method for the expression polysilicon layer that forms thin-film transistor according to the preferred embodiment of the present invention a kind of.The method of the polysilicon layer of formation thin-film transistor of the present invention comprises the following steps at least.At first, in step S101, provide a substrate, substrate has an insulating surface.Then, in step S102, on substrate, utilize to wait from the assistant chemical vapor phase deposition (PlasmaEnhanced Chemical Vapor Deposition, PECVD), with methane (SiH 4) and hydrogen (H 2) decompose and deposition of amorphous silicon films (a-Si:H) forms an amorphous silicon layer (amorphous Silicon layer, a-Si layer) on insulating surface.In addition, in greater than 400 ℃ high temperature furnace, remove the hydrogen content in the amorphous silicon layer.In general, hydrogen content must just be unlikely to have influence on follow-up Crystallization Procedure less than 2wt% in the low hydrogen amorphous silicon layer.Then, in step S103, provide an atmosphere, atmosphere comprises nitrogen and oxygen at least, and has between an oxygen concentration scope 50ppm and the 50000ppm.At last, in step S104, with quasi-molecule laser annealing (Excimet Laser Anneal, ELA) technology, utilize the excimer laser of laser beam overlapping rate 95% on substrate, to scan at normal temperatures, the above-mentioned atmosphere that provides is provided, makes the amorphous silicon layer crystallization, to form a polysilicon layer (Poly-Si layer).
Except that this, polysilicon layer plates silicon dioxide and forms gate insulator (gate insulator) after the gold-tinted etching forms figure on the upper strata.Then; form gate electrode (gate), interlayer dielectric layer (inter layer dielectric by film, gold-tinted and etching work procedure in regular turn; ILD), source/drain electrodes (source/drain), protective layer (passvation layer) and indium tin oxide (indium tin oxide; ITO) electrode is finished the manufacturing of TFT.
Preferably be, in the method for above-mentioned formation polysilicon layer, oxygen concentration is between 50ppm~50000ppm in its atmosphere, and its critical voltage value of formed assembly is very stable; When the oxygen concentration scope is 100ppm and 5000ppm, the electronics mobility of formed polysilicon membrane more significantly improves, and wherein oxygen concentration is preferably 2000ppm.
According to the formed polysilicon layer of said method, its electron mobility (Mobility) can be under identical laser energy and pure nitrogen gas atmosphere, and the polysilicon membrane of institute's crystallization significantly improves about 1.7 times, and particle diameter is at least 5000 .Except that this, the oxygen content of the polysilicon layer of formation is between 2 * 10 19With 1 * l0 20Atoms/cm 3Between.The surface roughness of polysilicon layer is between between the 3nm to 12nm.
Say that further in the polysilicon layer process of the present invention, aerating oxygen when amorphous silicon converts polysilicon to can be simplified in the traditional handicraft step of cleaning base plate in advance.That is to say that the oxygen of feeding is the pollutant of oxidable amorphous silicon surface layer also, reach the stability of raising laser crystallization tempering process and the purpose of qualification rate.
Above-mentioned method can be applicable to any electronic building brick with polysilicon layer, to increase its characteristic electron.Be that example describes especially exemplified by a thin-film transistor below.Processing step is decided according to structural order.
With reference to Fig. 2, Fig. 2 is the generalized section of expression according to a kind of bottom-gate (bottom gate) thin-film transistor of the preferred embodiments of the present invention manufacturing.Thin-film transistor 100 comprises at least: substrate 50, insulating surface 60, grid electrode layer 70, gate insulator 80 and polysilicon layer 90.Substrate 50 has an insulating surface 60.Grid electrode layer 70 is formed on the insulating surface 60 of substrate.Gate insulator 80 is formed on the grid electrode layer 70.Polysilicon layer 90 is formed on the gate insulator 80, and gate insulator 80 is between grid electrode layer 70 and polysilicon layer 90.According to the formed polysilicon layer of the present invention, its concentration of oxygen atoms is between 2 * 10 19With 1 * 10 20Atoms/cm 3Between.Measure with AFM, the surface roughness of polysilicon layer is between between the 3nm to 12nm.
With reference to Fig. 3, Fig. 3 is the generalized section of expression according to a kind of top grid (topgate) thin-film transistor of the preferred embodiments of the present invention manufacturing.Top grid thin-film transistor 200 comprises at least: substrate 250, insulating surface 260, polysilicon layer 290, gate insulator 280 with gate electrode layer 270.Substrate 250 has an insulating surface 260.Polysilicon layer 290 is formed on the insulating surface 260 of substrate.Gate insulator 280 is formed on the polysilicon layer 290.Grid electrode layer 270 is formed on the gate insulator 280, between gate insulator 280 Jie's grid electrode layers 270 and the polysilicon layer 290.According to the formed polysilicon layer 290 of the present invention, its concentration of oxygen atoms is between 2 * 10 19With 1 * 10 20Atoms/cm 3Between.Measure with AFM, the surface roughness of polysilicon layer is between between the 3nm to 12nm.
Pass through a series of test to observe its characteristic electron according to the handled assembly of method of the present invention.Wherein several groups of test results below are provided.
The relation of oxygen concentration when test one-electronics mobility and crystallization
With reference to Fig. 4, the graph of a relation of oxygen concentration when Fig. 4 is the electronics mobility of polysilicon layer polysilicon layer of expression the preferred embodiments of the present invention and crystallization.With N-TFT is example, in ELA technology, feed the oxygen of low concentration between 100ppm and 5000ppm under nitrogen atmosphere, the electronics mobility of formed polysilicon membrane is with under identical laser energy and pure nitrogen gas atmosphere, and the polysilicon membrane of institute's crystallization significantly improves about 1.7 times.
The relation of oxygen concentration when test two-critical voltage and crystallization
With reference to Fig. 5, the graph of a relation of oxygen concentration when Fig. 5 is the critical voltage addition of the N-TFT of polysilicon layer of expression present embodiment and P-TFT and crystallization.When oxygen concentration increased when crystallization, the critical voltage Vt of N-TFT (threshold voltage) also increased.In addition, when oxygen concentration increased, the critical voltage of N-TFT and P-TFT presented asymmetric trend.From then on find in the test result: provide one to comprise that at least the atmosphere of nitrogen and oxygen makes the amorphous silicon layer crystallization, to form a polysilicon layer (Poly-Si layer), wherein, the oxygen concentration scope is when 50ppm~50000ppm, and the critical voltage value of N-TFT and P-TFT is still very stable.
The oxygen content of test three-polysilicon layer
With reference to Fig. 6, Fig. 6 is that the polysilicon layer of expression present embodiment utilizes ion microprobe (SIMS) oxygen content that is measured and the graph of a relation of depth of film.By the made polysilicon membrane of above-mentioned manufacture method, about 500  of thickness after its crystallization, down to the degree of depth (profi1e depth) 500 , its oxygen content is approximately between 2 * 10 from surface (0 ) 19With 1 * 10 20Atoms/cm 3Between.That is to say that in crystallization process, when having oxygen molecule in the nitrogen atmosphere when existing, oxygen atom enters in the polysilicon crystal really.
The roughness of oxygen content and polysilicon membrane during test four-crystallization
With reference to Fig. 4, Fig. 4 is the roughness graph of a relation of the polysilicon layer of expression present embodiment oxygen content and polysilicon membrane when utilizing the crystallization that atomic force microscope measures.In ELA technology, during aerating oxygen, the polysilicon layer roughness of formation can improve with oxygen concentration and increase in nitrogen atmosphere, and this shows that oxygen atom can change the polysilicon crystal situation.Oxygen concentration is between 50ppm and 5000ppm when crystallization, made polysilicon membrane, and its roughness is between 3nm and 12nm.
By test three (Fig. 6) and the result that tests four (Fig. 7) as can be known, an amount of oxygen atom enters in the polysilicon crystal, helps the quality of silicon crystallization.Except that this, because oxygen atom helps the silicon crystallization, can reduce the excimer laser energy consumption, reduce manufacturing cost.
The manufacture method and the structure thereof of the disclosed thin-film transistor polysilicon layer of the above embodiment of the present invention can effectively improve electron mobility and not influence its critical voltage.Except aspect thin-film transistor is electrical, have good raising, structurally can increase lattice size and improve oxygen content in the polysilicon.Say that further in whole ELA technology, the process of the polysilicon layer of thin-film transistor of the present invention can be simplified the step of loaded down with trivial details cleaning base plate consuming time.Say that further feed cheap air when crystallization, not only oxidable substrate of oxygen molecule and amorphous silicon membrane improve stability and qualification rate, can also help polysilicon crystal, reduce the excimer laser energy consumption, effectively reduce manufacturing cost.
In sum; though the present invention discloses as above with a preferred embodiment; yet it is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; certainly can be used for a variety of modifications and variations, so protection scope of the present invention should be with being as the criterion that claims scope is defined.

Claims (7)

1. method that forms the polysilicon layer of thin-film transistor comprises step at least:
One substrate is provided, and this substrate has an insulating surface;
On this insulating surface, form an amorphous silicon layer;
Provide an atmosphere to make this amorphous silicon layer crystallization, to form a polysilicon layer, wherein, this atmosphere comprises nitrogen and oxygen at least, and has between an oxygen concentration scope 50ppm and the 50000ppm.
2. the method for claim 1, it is characterized in that: the above-mentioned step that makes this amorphous silicon layer crystallization is finished with the laser annealing technology.
3. the method for claim 1, it is characterized in that: this oxygen concentration is between 100ppm and 5000ppm.
4. the method for claim 1 is characterized in that: the concentration of oxygen atoms of this polysilicon layer is for more than or equal to 2 * 10 19And less than 1 * 10 20Atoms/cm 3
5. the method for claim 1, it is characterized in that: the surface roughness of this polysilicon layer is between between the 3nm to 12nm.
6. thin-film transistor comprises at least:
One insulating barrier, this insulating barrier have one first relative side and one second side;
One polysilicon layer, this polysilicon layer are formed at first side of this insulating barrier, and wherein the concentration of oxygen atoms in this polysilicon layer is more than or equal to 2 * 10 19And less than 1 * 10 20Atoms/cm 3And
One grid electrode layer, this grid electrode layer are formed at second side of this insulating barrier, and this insulating barrier is between this grid electrode layer and this polysilicon layer.
7. thin-film transistor as claimed in claim 6 is characterized in that: the surface roughness of this polysilicon layer is between 3nm and 12nm.
CNB2004100637800A 2004-07-09 2004-07-09 Method for producing thin film transistor and its structure Expired - Lifetime CN1303658C (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5827772A (en) * 1995-11-15 1998-10-27 Nec Corporation Fabrication process for thin film transistor
JP2001168031A (en) * 1999-12-10 2001-06-22 Sony Corp Polycrystalline silicon layer, method of growing it, and semiconductor device
US6329269B1 (en) * 1995-03-27 2001-12-11 Sanyo Electric Co., Ltd. Semiconductor device manufacturing with amorphous film cyrstallization using wet oxygen
JP2003197618A (en) * 2001-12-25 2003-07-11 Sanyo Electric Co Ltd Method for forming thin film

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6329269B1 (en) * 1995-03-27 2001-12-11 Sanyo Electric Co., Ltd. Semiconductor device manufacturing with amorphous film cyrstallization using wet oxygen
US5827772A (en) * 1995-11-15 1998-10-27 Nec Corporation Fabrication process for thin film transistor
JP2001168031A (en) * 1999-12-10 2001-06-22 Sony Corp Polycrystalline silicon layer, method of growing it, and semiconductor device
JP2003197618A (en) * 2001-12-25 2003-07-11 Sanyo Electric Co Ltd Method for forming thin film

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