CN1299339C - Metal silicide preparing process - Google Patents
Metal silicide preparing process Download PDFInfo
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- CN1299339C CN1299339C CNB021553602A CN02155360A CN1299339C CN 1299339 C CN1299339 C CN 1299339C CN B021553602 A CNB021553602 A CN B021553602A CN 02155360 A CN02155360 A CN 02155360A CN 1299339 C CN1299339 C CN 1299339C
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- metal silicide
- silicide
- manufacture method
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Abstract
The present invention relates to a method for manufacturing a metal silicide. In the method, a dielectric layer is formed on a substrate, a conductor layer made of a polysilicon material is formed on the dielectric layer, and then, an adhesion layer is formed on the conductor layer, wherein the adhesion layer is a nitrogen enriched layer or a nitrogen ion implantation layer, and subsequently, a metal silicide layer is formed on the adhesion layer; the metal silicide layer can well adhere to the conductor layer through the adhesion layer.
Description
Technical field
The invention relates to a kind of manufacture method of semiconductor element, and particularly relevant for a kind of manufacture method that on polysilicon, forms metal silicide (metal silicide).
Background technology
Along with the increase of semiconductor element integrated level, pattern and live width in the element are also dwindled gradually, thereby cause the grid in the element and the contact resistance of lead to increase, and produce bigger resistance-capacitance and postpone (RC Delay), and then influence element operation speed.Because the resistance of metal silicide is low than polysilicon (Polysilicon), and its thermal stability is also than general intraconnections material height, thereby forms metal silicide on grid, in the hope of reducing the resistance value between grid and the metal connecting line.
In the technology of existing manufacturing metal silicide, when polysilicon layer for example is after grid is formed on the semiconductor wafer, enter before the high-temperature technology that forms metal silicide at this semiconductor wafer, semiconductor wafer has one section waiting time and is exposed in the atmosphere, and the polysilicon layer on semiconductor wafer will may have grown into the very thin native oxide of one deck (native oxide) this moment.Yet, when this semiconductor wafer that is formed with native oxide enters the high-temperature technology of follow-up formation metal silicide, the existence of this native oxide will make that the tackness (adhesion) of metal silicide and polysilicon layer is not good, and then cause metal silicide quite easily and polysilicon layer peel off (peeling), have influence on the reliability and the usefulness of element.
Brief summary of the invention
Therefore, purpose of the present invention is providing a kind of manufacture method of metal silicide, can avoid forming on the polysilicon layer native oxide.
Another object of the present invention can be promoted the tackifying ability between metal silicide and the polysilicon layer in that a kind of manufacture method of metal silicide is provided.
The present invention proposes a kind of manufacture method of metal silicide, the method is to form dielectric layer in substrate, then on dielectric layer, form the conductor layer of polysilicon material, on conductor layer, form adhesion layer then, wherein this adhesion layer forms metal silicide layer thereafter for being rich in nitrogen layer (nitrogen rich film) or nitrogen ion implanted layer (nitrogen ion implanted film) on adhesion layer.
And, after forming conductor layer, and before forming adhesion layer, can also be to conductor layer sliding (deglaze) technology of carrying out delustering, so that the conductor layer surface is comparatively coarse and remove impurity or native oxide on it.
From the above, because the present invention forms nitrogenous adhesion layer on the surface of conductor layer, thereby can be by adhesion layer to suppress the generation of native oxide.Therefore, so can make between the metal silicide layer of follow-up formation and the conductor layer by adhesion layer to obtain good tackness unlikely peeling off.
Description of drawings
Figure 1A to Fig. 1 D is the manufacturing process generalized section according to a kind of metal silicide of preferred embodiment of the present invention; And
Fig. 2 A to Fig. 2 D is the manufacturing process generalized section according to a kind of metal silicide of another preferred embodiment of the present invention.
100,200: substrate
102,202: dielectric layer
104,204: conductor layer
106,206: adhesion layer
108,208: metal silicide layer
205: the ion implantation step
Embodiment
Figure 1A to Fig. 1 D is the manufacturing process generalized section according to a kind of metal silicide of preferred embodiment of the present invention.
At first, please refer to Figure 1A, a substrate 100 that has formed dielectric layer 102 is provided, wherein the material of dielectric layer 102 for example is a silica, the method that forms dielectric layer 102 for example is a thermal oxidation method, and this dielectric layer 102 for example is the gate dielectric use as semiconductor element.
Then, please refer to Figure 1B, on dielectric layer 102, form conductor layer 104, wherein the material of conductor layer 104 for example is a doped polycrystalline silicon, the method that forms conductor layer 104 for example is the mode with original position (in-situ) dopant ion, (chemical vapordeposition CVD) forms one deck doped polysilicon layer in substrate 100, and this conductor layer 104 for example is the grid use as semiconductor element to utilize chemical vapour deposition technique.
Then, please refer to Fig. 1 C, form one deck adhesion layer 106 on conductor layer 104, wherein this adhesion layer 106 for example is one to be rich in nitrogen layer (nitrogen rich film), and the method for its formation for example is to use chemical vapour deposition technique, is 2 * 10 with concentration
18Atom/cubic centimetre is to 5 * 10
19Nitrogen ion original position about atom/cubic centimetre is deposited on the conductor layer 104, and the thickness of adhesion layer 106 for example is 5 dust to the 40 Izod right sides.Owing to contain nitrogen in this adhesion layer 106, therefore can suppress the generation of the native oxide on conductor layer 104 surfaces.
Then, please refer to Fig. 1 D, on adhesion layer 106, form metal silicide layer 108, wherein the material of this metal silicide layer 108 comprises titanium silicide (Titanium silicide, TiSix), tungsten silicide (Tungsten silicide, WSix), tantalum silicide (Tantalum silicide, TaSix), molybdenum silicide (Molybdenum silicide, MoSix), cobalt silicide (Cobalt silicide, CoSix) or nickle silicide (Nickel silicide, NiSix), the method that forms this metal silicide layer 108 for example is to form metal level (not icon) on adhesion layer 106, then carry out a high-temperature technology so that metal in the metal level and the doped polycrystalline pasc reaction in the conductor layer to form metal silicide layer 108, also or with chemical vapour deposition technique or sputtering method (sputtering), directly on adhesion layer 106, form metal silicide layer 108.Owing on conductor layer 104, be formed with adhesion layer 106, so can tackness good being formed on the conductor layer 104 and being unlikely to peel off with conductor layer 104 of metal silicide layer 108.
Except above-mentioned preferred embodiment forms the adhesion layer with chemical vapour deposition technique, the present invention can also use other method to form adhesion layer, please refer to Fig. 2 A to Fig. 2 B, Fig. 2 A to Fig. 2 D is the manufacturing process generalized section according to a kind of metal silicide of another preferred embodiment of the present invention.
At first, please refer to Fig. 2 A, a substrate 200 that has formed dielectric layer 202 is provided, wherein the material of dielectric layer 202 for example is a silica, the method that forms dielectric layer 202 for example is a thermal oxidation method, and this dielectric layer 202 for example is the gate dielectric use as semiconductor element.
Then, please refer to Fig. 2 B, on dielectric layer 202, form conductor layer 204, wherein the material of conductor layer 204 for example is a doped polycrystalline silicon, the method that forms conductor layer 204 for example is the mode with in-situ doped ion, utilize chemical vapour deposition technique in substrate 200, to form one deck doped polysilicon layer, and this conductor layer 204 for example is the grid use as semiconductor element.
Then, please refer to Fig. 2 C, form one deck adhesion layer 206 with an ion implantation technology 205 in conductor layer 204, wherein adhesion layer 206 for example is a nitrogen ion implanted layer (nitrogenion implanted film), and the method for its formation for example is to be 2 * 10 with concentration
18Atom/cubic centimetre is to 5 * 10
19Nitrogen ion about atom/cubic centimetre, with the energy injection conductor layer 204 of 1 kilo electron volt to 5 kilo electron volt, and the thickness of adhesion layer 206 for example is the 20 Izod right sides.Same, owing to contain nitrogen in this adhesion layer 206, therefore can suppress the generation of the native oxide on conductor layer 204 surfaces.
Then, please refer to Fig. 2 D, on adhesion layer 206, form metal silicide layer 208, wherein the material of this metal silicide layer 208 comprises titanium silicide, tungsten silicide, tantalum silicide, molybdenum silicide, cobalt silicide or nickle silicide, the method that forms this metal silicide layer 108 for example is to form metal level (not icon) on adhesion layer 106, then carry out a high-temperature technology so that metal in the metal level and the doped polycrystalline pasc reaction in the conductor layer to form metal silicide layer 208, also or with chemical vapour deposition technique or sputtering method, directly on adhesion layer 206, form metal silicide layer 208.As above-mentioned, metal silicide layer 208 can stick together good being formed on the conductor layer 204 by adhesion layer 206.
And, in above-mentioned preferred embodiment, be preferably after forming conductor layer 104,204, and before forming adhesion layer 106,206, to conductor layer 104,204 sliding (deglaze) technology of carrying out delustering, so that conductor layer 104,204 surfaces are comparatively coarse with the enhancing adhesion, and can remove impurity or native oxide on it, wherein this sliding technology of delustering for example is to use the vapor phase etchant of hydrofluoric acid.
Moreover, the technology of manufacturing metal silicide of the present invention is not limited to the structure of dielectric layer (the grid oxic horizon)-conductor layer (grid) of the foregoing description, can also be applied to have the element of the grid structure of other form, for example be to be applied to the silicon nitride ROM formed by silica, silicon nitride, silica, control grid, also or the read-only memory of forming by tunnel oxide, floating grid, interior polysilicon dielectric layer and control grid.Its technology for example is after forming the control grid on the semiconductor element, according to the technology of Fig. 1 C to Fig. 1 D, forms metal silicide layer on the control grid.
In sum, of the present invention being characterized as forms nitrogenous on the conductor layer surface of polysilicon material Stick together layer, and can suppress by sticking together layer the generation of primary oxide layer. And then energy therefore, Enough make between the metal silicide layer of follow-up formation and the conductor layer good to obtain by sticking together layer Sticking together property and unlikely peeling off.
Claims (15)
1. the manufacture method of a metal silicide is characterized in that, comprises the following steps:
One substrate is provided, wherein in this substrate, is formed with a dielectric layer;
Carry out chemical vapor deposition method, on this dielectric layer, form a conductor layer, and former being positioned at forms one and be rich in nitrogen layer on this conductor layer when carrying out chemical vapor deposition method; And
Be rich in formation one metal silicide layer on the nitrogen layer in this.
2. the manufacture method of metal silicide as claimed in claim 1 is characterized in that, the in-situ doped concentration when forming this and being rich in nitrogen layer is 2 * 10
18Atom/cubic centimetre is to 5 * 10
19Nitrogen ion about atom/cubic centimetre.
3. the manufacture method of metal silicide as claimed in claim 1 is characterized in that, this thickness that is rich in nitrogen layer is 5 dust to the 40 Izod right sides.
4. the manufacture method of a metal silicide is characterized in that, comprises the following steps:
One substrate is provided, wherein in this substrate, is formed with a dielectric layer;
On this dielectric layer, form a conductor layer;
Carry out an ion implantation technology, be rich in nitrogen layer in the upper surface formation one of this conductor layer; And
Be rich in formation one metal silicide layer on the nitrogen layer in this.
5. the manufacture method of metal silicide as claimed in claim 4 is characterized in that, form this method that is rich in nitrogen layer and comprise injection energy with 1 kilo electron volt to 5 kilo electron volt, and be 2 * 10 with concentration
18Atom/cubic centimetre is to 5 * 10
19Nitrogen ion about atom/cubic centimetre injects this conductor layer.
6. the manufacture method of metal silicide as claimed in claim 4 is characterized in that, this thickness that is rich in nitrogen layer is the 20 Izod right sides.
7. the manufacture method of metal silicide as claimed in claim 1 is characterized in that, the material of this metal silicide layer be selected from group that titanium silicide, tungsten silicide, tantalum silicide, molybdenum silicide, cobalt silicide and nickle silicide organize one of them.
8. the manufacture method of metal silicide as claimed in claim 1 is characterized in that, the material of this conductor layer comprises polysilicon.
9. the manufacture method of a metal silicide comprises the following steps:
One substrate is provided, it is characterized in that, in this substrate, be formed with a dielectric layer;
On this dielectric layer, form a conductor layer;
This conductor layer is carried out the sliding technology of delustering, and this sliding technology of delustering is to carry out vapor phase etchant with hydrofluoric acid;
On this conductor layer, form one and be rich in nitrogen layer; And
Be rich in formation one metal silicide layer on the nitrogen layer in this.
10. the manufacture method of metal silicide as claimed in claim 9 is characterized in that, the method that forms this adhesion layer comprises that using the in-situ doped concentration of chemical vapour deposition technique is 2 * 10
18Atom/cubic centimetre is to 5 * 10
19Nitrogen ion about atom/cubic centimetre.
11. the manufacture method of metal silicide as claimed in claim 9 is characterized in that, the thickness of this adhesion layer is 5 dust to the 40 Izod right sides.
12. the manufacture method of metal silicide as claimed in claim 9 is characterized in that, the method that forms this adhesion layer comprises uses an ion implantation, with the injection energy of 1 kilo electron volt to 5 kilo electron volt, is 2 * 10 with concentration
18Atom/cubic centimetre is to 5 * 10
19Nitrogen ion about atom/cubic centimetre injects this conductor layer.
13. the manufacture method of metal silicide as claimed in claim 9 is characterized in that, the thickness of this adhesion layer is the 20 Izod right sides.
14. the manufacture method of metal silicide as claimed in claim 9 is characterized in that, the material of this metal silicide layer be selected from group that titanium silicide, tungsten silicide, tantalum silicide, molybdenum silicide, cobalt silicide and nickle silicide organize one of them.
15. the manufacture method of metal silicide as claimed in claim 9 is characterized in that, the material of this conductor layer comprises polysilicon.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021553602A CN1299339C (en) | 2002-12-09 | 2002-12-09 | Metal silicide preparing process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021553602A CN1299339C (en) | 2002-12-09 | 2002-12-09 | Metal silicide preparing process |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1507017A CN1507017A (en) | 2004-06-23 |
| CN1299339C true CN1299339C (en) | 2007-02-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB021553602A Expired - Lifetime CN1299339C (en) | 2002-12-09 | 2002-12-09 | Metal silicide preparing process |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5648287A (en) * | 1996-10-11 | 1997-07-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of salicidation for deep quarter micron LDD MOSFET devices |
| CN1341955A (en) * | 2000-09-06 | 2002-03-27 | 联华电子股份有限公司 | Production process of polycrystalline silicon metal gate by using nitriding process |
-
2002
- 2002-12-09 CN CNB021553602A patent/CN1299339C/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5648287A (en) * | 1996-10-11 | 1997-07-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of salicidation for deep quarter micron LDD MOSFET devices |
| CN1341955A (en) * | 2000-09-06 | 2002-03-27 | 联华电子股份有限公司 | Production process of polycrystalline silicon metal gate by using nitriding process |
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| Publication number | Publication date |
|---|---|
| CN1507017A (en) | 2004-06-23 |
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