CN1293614C - Method for improving interface defects between pure silica glass and phosphosilicate glass and its phosphorus-containing structure - Google Patents

Abstract

The invention discloses a method for improving interface defects of pure silicon dioxide (USG) and phosphosilicate glass (PSG), which increases the flow of phosphine from 0 to a final set value in a step-by-step manner so as to slowly bring out the phosphine remained on a valve port of a flow controller, thereby avoiding the excess (overheating) of the phosphine and further improving the interface defects (interface kinase) of the USG and the PSG. Wherein, phosphine (pH)₃) The flow rate of the gas may be increased stepwise in an arithmetic, geometric or irregular manner. A phosphorous-containing interfacial layer between a pure silicon dioxide (USG) layer and a phosphosilicate glass (PSG) layer, the phosphorous content increasing stepwise from 0% to 100%, and the total thickness of the phosphorous-containing interfacial layer being at least greater than 100 angstrom.

Description

Method for improving interface defects between pure silica glass and phosphosilicate glass and its phosphorus-containing structure

technical field

The invention relates to a method for improving interface defects between pure silica glass (USG) and phosphosilicate glass (PSG) and the phosphorous-containing structure formed therein, in particular to a method for improving Method for interface defects of USG and PSG.

Background technique

Silicon is used in a wide variety of semiconductor manufacturing processes. Materials commonly used in many manufacturing processes, whether they are conductors, semiconductors, or dielectrics, are related to the element "silicon". Such as tungsten silicide ( _WSix ), tungsten (W) and titanium (Ti) in conductors, polysilicon in semiconductors, and silicon dioxide (SiO ₂ ) and silicon nitride (Si ₃ N ₄ ) in dielectric materials, etc. All are based on "silicon". Taking dielectric materials as examples, undoped silica glass (pure silica) (Undoped silicate glass, USG), phospho-silicate glass (PSG) and borophosphosilicate glass (BPSG) It is the most widely used dielectric material at present.

Please refer to FIG. 1 , which shows a schematic diagram of the location where silicon elements are applied to metal oxide semiconductor transistors. In a metal-oxide-semiconductor transistor (Metal-Oxide-Semiconductor Transistor, hereinafter referred to as MOS) 100, the transistor gate (Gate) on the silicon substrate 102 is composed of a gate oxide layer (GateOxide) 103, polysilicon (Polysilicon) 104 and tungsten silicide (WSi _x )106 stacked. Generally speaking, silicon on the surface of the active region on the cleaned silicon substrate 102 is oxidized to silicon dioxide with a thickness of about 100-250 mm by dry oxidation method, so as to serve as the gate oxide layer 103 of the MOS. The polysilicon 104 formed on the gate oxide layer 103 has a thickness of about 2000˜3000 mm. As for the silicide metal layer (generally, tungsten silicide 106 ) whose conductivity is stronger than that of the polysilicon 104 is deposited on the polysilicon 104 . Since the silicide metal layer has poor adhesion to silicon dioxide and is prone to produce interface compounds, it is necessary to add a layer of polysilicon 104 between the tungsten silicide 106 and the gate oxide layer 103, so polysilicon 104 and tungsten silicide 106 are selected. layer as the gate conductive layer. In addition, the silicon element is used as well as the spacer oxide (Spacer Oxide) 107 located on both sides of the gate conductive layer. The material of the inter-layer dielectric (Inter-Layer Dielectrics) 110 before the MOS metallization is mostly selected from phosphosilicate glass (PSG).

The right half of Figure 1 shows the contact window structure in the MOS. The contact point used to connect the lower metal wire 112 and the silicon substrate 102 drain and source PN junction is called a contact window metal, or a contact plug (Contact Plug) 114, while the part connecting the upper and lower layers of metal wires is Called the Via Plug (not shown in the figure). In the MOS manufacturing process, a part of the inner layer dielectric layer 110 is generally hollowed out to the substrate oxide layer (Liner Oxide) 108 by etching, and then filled with metal tungsten to form a tungsten plug. Wherein, the substrate oxide layer 108 utilizes dry oxygen to oxidize the silicon surface at high temperature (about 900-1100° C.) to form silicon dioxide with a thickness of about 200-400 mm, so its material is non-doped silica glass. (USG).

In the traditional MOS manufacturing process, when part of the interlayer dielectric layer 110 is hollowed out to the substrate oxide layer 108 by etching, the interface between the two is due to the high phosphorus content of PSG, and the interface exists after etching. Defect (interface kink). The phosphorus content of the PSG at the interface between the inner dielectric layer 110 and the substrate oxide layer 108 is related to the process of forming the PSG.

Phospho-silicate glass (PSG), is a phosphorus-containing silicon dioxide. It can be obtained by adding a small amount of phosphine (Phosphine, PH ₃ ) to the reaction of producing silicon dioxide. The reaction formula is as follows:

This reaction is generally carried out at normal pressure and at a temperature of about 400° C., which is an application of Atmospheric Pressure Chemical Vapor Deposition (APCVD). The above reaction can also be completed in a low-pressure environment by using a plasma-enhanced chemical vapor deposition process. Among them, silane (SiH ₄ ) reacts with oxygen to generate silicon dioxide; and phosphine (PH ₃ ) reacts with oxygen to generate phosphorus oxide (P ₂ 0 ₅ ), which is contained in the deposited film of silicon dioxide. As for the phosphorus content in PSG, it can be adjusted by controlling the flow rate of phosphine (PH ₃ ). Phosphine is usually passed through a mass flow controller (Mass Flow Controller, MFC), and the opening or closing of its bypass valve device (by-pass valve) can determine whether phosphine is added to the reaction.

However, due to the high viscosity of phosphine (PH ₃ ) gas, when it flows through the mass flow controller for a period of time, if the valve device is closed, there will be a little side leakage. When the phosphine gas is to be re-introduced next time, the phosphine gas that has accumulated at the valve port, because the valve device is opened, the phosphine gas remaining at the valve port will be released together with the phosphine gas that is introduced later. Rush out, causing overshooting. FIG. 2A shows the relationship between reaction gas and time when PSG is reacted in a conventional method. Among them, the circled part represents the occurrence of excess phosphine gas. Please also refer to FIG. 2B , which is a schematic diagram showing the relationship between the phosphine gas content and the thickness of the deposited glass in FIG. 2A . When phosphine gas has not been added to the reaction (ie, phosphorus content = 0%), silane (SiH ₄ ) and oxygen react to form pure silicon dioxide, ie, undoped silica glass (USG) 208 . Phosphosilicate glass (PSG) 210 is formed immediately after phosphine gas is added to the reaction. However, at the junction of USG 208 and PSG 210 (relative to the excess of phosphine gas), PSG 212 with higher phosphorus content is formed. This type of phosphine overshooting problem is more serious when the mass flow controller is stopped for a period of time and then restarted.

In the subsequent process, if the contact window is dug out by etching in PSG (Figure 1), the hardness of PSG 212 with higher phosphorus content is lower, which will increase the etching rate, resulting in excessive etching here, forming the so-called interface depression ( Interface Kink), which affects component characteristics. As shown in FIG. 3 , it is an electron micrograph of PSG etched in a conventional process. In the electron micrograph (SEM Micrograph), the dark lines are the interface depressions.

Contents of the invention

Accordingly, the technical problem to be solved by the present invention is to provide a method for improving interface defects between pure silicon dioxide (USG) and phosphosilicate glass (PSG), by increasing the flow of phosphine in stages until the final set value, The phosphine remaining at the valve port of the flow controller is slowly brought out to avoid overshooting of the phosphine, thereby improving the interface kink between the USG and the PSG.

In order to solve the above-mentioned problems, the present invention proposes a method for improving the interface defects between the pure silicon dioxide (USG) layer and the phosphosilicate glass (PSG) layer, wherein the phosphosilicate glass layer is deposited on the pure silicon dioxide layer, through A flow control device adjusts the flow rate of phosphine (PH ₃ ) gas to form a phosphosilicate glass layer. During the main deposition process (Main Dep.), the flow rate of phosphine (PH ₃ ) gas needs to reach X sccm (X is positive number greater than 1), the method of the present invention is:

The flow rate of phosphine (PH ₃ ) gas was increased stepwise from 0 sccm until the flow rate reached X sccm.

Wherein, the flow rate of the phosphine (PH ₃ ) gas can be increased stepwise in an arithmetical progression, geometrical progression, or random manner.

In addition, according to the present invention, a phosphorus-containing interface layer is produced between the pure silicon dioxide (USG) layer and the phosphosilicate glass (PSG) layer, and its phosphorus content increases stepwise from 0% to 100%, And the total thickness of the interface layer is at least greater than 100mm.

Description of drawings

In order to make the above-mentioned purposes, features, and advantages of the present invention more obvious and understandable, a preferred embodiment will be described in detail in conjunction with the accompanying drawings as follows:

FIG. 1 is a schematic diagram of the position of silicon elements applied to metal oxide semiconductor transistors;

Fig. 2A is the relationship diagram of reaction gas and time when reaction generates PSG in the traditional method;

Fig. 2B is a schematic diagram showing the correlation between the phosphine gas content and the thickness of the deposited glass shown in Fig. 2A;

Fig. 3 is the electron micrograph after PSG etching in the traditional process;

Fig. 4A is the relationship diagram of reaction gas and time when reaction generates PSG in the method of the present invention;

Fig. 4B is a schematic diagram of the relationship between the phosphine gas content and the thickness of the deposited glass shown in Fig. 4A;

FIG. 5 is an electron micrograph of PSG after etching using the method of the present invention.

Explanation of reference numbers

102: Silicon substrate

103: Gate Oxide

104: Polysilicon

106: Tungsten silicide (WSi _x )

107: Spacer Oxide

108: Liner Oxide

110: Inter-Layer Dielectrics

112: lower layer metal wire

114: Contact Plug

208, 408: pure silica glass (USG)

210, 410: phosphosilicate glass (PSG)

212, 412: PSG with higher phosphorus content

Detailed ways

The method of the present invention is to gradually increase the flow of phosphine (PH ₃ ) from small to large, so as to improve the excess phosphorus caused by making the flow of phosphine reach the set value (servo value) at the beginning of the traditional method (Overshooting) phenomenon. A preferred embodiment is given below to describe the present invention in detail.

The reaction formula to form phosphosilicate glass (PSG) is as follows:

This reaction is carried out under normal pressure, and the reaction temperature is about 400°C. This reaction can also be completed in a low-pressure environment by using a plasma-enhanced chemical vapor deposition process. Among them, silane (SiH ₄ ) reacts with oxygen to generate silicon dioxide; and phosphine (PH ₃ ) reacts with oxygen to generate phosphorus oxide (P ₂ O ₅ ), which is contained in the deposited film of silicon dioxide. Phosphine is passed through a mass flow controller (Mass Flow Controller, MFC), and the opening or closing of its bypass valve device (by-pass valve) can determine whether phosphine is added to the reaction. Therefore, the phosphorus content in phosphosilicate glass (PSG) can be adjusted by controlling the flow rate of phosphine (PH ₃ ).

In the traditional manufacturing process, when phosphosilicate glass (PSG) is deposited (hereinafter referred to as the main deposition (Main Dep.)), if the flow rate of phosphine needs to reach 10 sccm, the mass flow controller (MFC) is directly set to At 10sccm, therefore, the phosphorus content changes from 0 to 10sccm in a very short period of time, and the phosphine gas remaining in the valve port is brought out, resulting in overshooting of the phosphorus content, as shown in Figure 2A and 2B . The test results show that if the phosphorus content increases sharply from 0 to 10 sccm within 1 second, the thickness of the formed interface is about 100 mm at the junction of USG and PSG (ie PSG 212 with higher phosphorus content in FIG. 2B ).

In the present invention, when performing the main deposition (Main Dep.), if the flow of phosphine needs to reach 10 sccm, then the mass flow controller (MFC) is set in stages, and the flow is gradually increased from 0 to 10 sccm. For example:

0sccm→2sccm→5sccm→10sccm

Wherein, when the phosphine flow rate is set to 2 sccm, the time is set to 2 seconds; then, the phosphine flow rate is set to 5 sccm, and the time is 4 seconds; finally, the phosphine flow rate is increased to 10 sccm, and the main deposition step is entered. The test results show that the thickness of the interface formed at the junction of USG 408 and PSG 410 (that is, PSG 412 with higher phosphorus content in Figure 4B) is about 600 mm.

By applying the method of the present invention, the flow rate of phosphine is gradually increased step by step, and the phosphine gas originally left at the valve port is gradually brought out, so as to avoid overshooting of phosphine caused by the traditional method. As shown in FIG. 4A , this figure is a graph showing the relationship between reaction gas and time when PSG is reacted in the method of the present invention. Compared with Fig. 2A, the excess of phosphine has been alleviated in Fig. 4A. Please also refer to FIG. 4B , which is a schematic diagram of the relationship between the phosphine gas content and the thickness of the deposited glass shown in FIG. 4A . When phosphine gas has not been added to the reaction (ie, phosphorus content = 0%), silane (SiH ₄ ) and oxygen react to form pure silicon dioxide, ie, undoped silica glass (USG) 408 . Phosphosilicate glass (PSG) 410 is formed immediately after phosphine gas is added to the reaction. At the junction of USG 408 and PSG 410, PSG 412 with higher phosphorus content is formed. Compared to FIG. 2B , the higher phosphorus content PSG 412 of the present invention is thicker than the conventional higher phosphorus content PSG 212 .

FIG. 5 is an electron micrograph of PSG after etching using the method of the present invention. The electron micrograph (SEM Micrograph) of Fig. 5 shows, there is no dark line as shown in Fig. 3, and the phenomenon of interface depression (Interface Kink) has been better improved after applying the method of the present invention.

Although 0sccm-2sccm-5sccm-10sccm is described above as an example, the method of the present invention is not limited to this combination of settings. Other combinations may also be used, such as 0 sccm-2 sccm-5 sccm-8 sccm-10 sccm, or other combinations. As long as the flow rate is increased stepwise to the set value of the main deposition process, whether it is in the form of arithmetical progression, geometrical progression, or stepwise increase without special rules, Namely conform to the technical characterictic of the present invention. If it is combined with a slight extension of time, the phenomenon of excess phosphine can be eliminated.

The method of the present invention is to increase the flow of phosphine in stages before the flow of phosphine reaches the final set value, or (re)slightly prolong the time, so that the phosphine remaining in the valve port can be slowly taken out, The rapid increase of phosphine caused by phosphine rushing out of the valve port in a short time is avoided, and the purpose of improving the interface defects between the USG substrate oxide and PSG is achieved. Therefore, applying the method of the present invention can prevent the contact window from being broken due to over-etching, thereby improving the output (WPH) of components per unit time in the semiconductor manufacturing process.

In summary, although the present invention has been disclosed above in preferred embodiments, this is not a limitation of the present invention, and any person of ordinary skill in the art can make various Changes and modifications, so the scope of protection of the present invention should prevail in the scope of protection required by the appended claims.

Claims (21)

1. A method for improving the interface defect of pure silicon dioxide layer and phosphosilicate glass layer, wherein the above-mentioned phosphosilicate glass layer is deposited on the above-mentioned pure silicon dioxide layer, and the flow rate of phosphine gas is adjusted by a flow control device When forming the phosphosilicate glass layer and performing the main deposition process, the flow rate of the above-mentioned phosphine gas needs to reach Xsccm, where X is a positive number greater than 1, wherein, The flow of the above-mentioned phosphine gas is increased stepwise from 0 sccm until the flow reaches X sccm. 2. The method according to claim 1, wherein the flow rate of the above-mentioned phosphine gas starts from 0sccm, and is set to a1sccm, a2sccm, Xsccm in stages, and 0<a1<X/4, a2=X/2. 3. The method according to claim 2, wherein the flow rate of the above-mentioned phosphine gas needs to reach 10sccm, and the flow rate of the phosphine gas is adjusted to: 0sccm-2sccm-5sccm-10sccm with the above-mentioned flow control device. 4. The method according to claim 3, wherein when the flow rate of the above-mentioned phosphine gas is 2 sccm, the holding time is 2 seconds; when the flow rate of the phosphine gas is 5 sccm, the holding time is 4 seconds. 5. The method of claim 4, wherein the thickness of the interface between the formed pure silicon dioxide layer and the phosphosilicate glass layer is about 600 mm. 6. The method as claimed in claim 1, wherein the flow rate of the above-mentioned phosphine gas is set to a1sccm, a2sccm, a3sccm, Xsccm in stages from 0sccm, and 0<a1<X/4, a2=X/ 2. X/2<a3<X. 7. The method as claimed in claim 1, wherein the flow rate of the above-mentioned phosphine gas starts from 0sccm, and the setting of the stage formula is a1sccm, a2sccm, a3sccm, Xsccm, and 0<a1<X/4, a2=X/ 2, 3X/4<a3<X. 8. The method according to claim 7, wherein the flow rate of the phosphine gas needs to reach 10 sccm, and the flow control device adjusts the flow rate of the phosphine gas to: 0 sccm-2 sccm-5 sccm-8 sccm-10 sccm. 9. The method of claim 1, wherein said flow control device is a mass flow controller. 10. A method for improving interface defects between a pure silicon dioxide layer and a phosphosilicate glass layer, wherein the above-mentioned phosphosilicate glass layer is deposited on the above-mentioned pure silicon dioxide layer, and the flow rate of phosphine gas is adjusted by a flow control device. When forming the phosphosilicate glass layer and performing the main deposition process, the flow rate of the above-mentioned phosphine gas needs to reach Xsccm, where X is a positive number greater than 1, wherein, The flow of the above-mentioned phosphine gas is increased stepwise from 0 sccm until the flow reaches X sccm, and the ventilation time increases with the increase of the gas flow. 11. The method as claimed in claim 10, wherein the flow rate of the phosphine gas starts from 0 sccm and increases to X sccm in stages in an arithmetic progression. 12. The method as claimed in claim 10, wherein the flow rate of the above-mentioned phosphine gas starts from 0 sccm, and increases to X sccm stepwise in a proportional series manner. 13. The method as claimed in claim 10, wherein the flow rate of the phosphine gas starts from 0 sccm and increases to X sccm in stages in a random manner. 14. The method of claim 10, wherein said flow control device is a mass flow controller. 15. A phosphorus-containing interface layer positioned at the interface between a pure silicon dioxide layer and a phosphosilicate glass layer, wherein the above-mentioned phosphosilicate glass layer is deposited above the pure silicon dioxide layer, and the phosphine gas is regulated by a flow control device The above-mentioned phosphosilicate glass layer is formed by a flow rate, and the above-mentioned phosphorus-containing interfacial layer is characterized in that: On the section from the pure silicon dioxide layer to the phosphosilicate glass layer, the phosphorus content of the phosphorus-containing interface layer increases stepwise from 0% to 100%, and the total thickness of the phosphorus-containing interface layer is at least greater than 100 mm. 16. The phosphorus-containing interface layer as claimed in claim 15, wherein the phosphorus content increases from 0% to 25% and then increases to 100%, and the total thickness of the phosphorus-containing interface layer is at least greater than 100mm. 17. The phosphorus-containing interface layer as claimed in claim 15, its phosphorus content increases the flow of phosphine gas in stages from 0sccm by the above-mentioned flow control device, until the flow reaches Xsccm, wherein when the flow is Xsccm, it contains Phosphorus amount increased to 100%. 18. The phosphorus-containing interface layer as claimed in claim 17, wherein the flow rate of the phosphine gas starts from 0 sccm and increases to X sccm in stages in an arithmetic progression. 19 . The phosphorus-containing interface layer as claimed in claim 17 , wherein the flow rate of the phosphine gas starts from 0 sccm and increases to X sccm in stages in an equal ratio series. 20. The phosphorus-containing interface layer as claimed in claim 17, wherein the flow rate of the phosphine gas starts from 0 sccm and increases to X sccm in stages in a random manner. 21. The phosphorus-containing interface layer of claim 17, wherein said flow control device is a mass flow controller.

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