CN1293613C - Compounded passive tech of silicon semiconductor mesa device - Google Patents

Compounded passive tech of silicon semiconductor mesa device Download PDF

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Publication number
CN1293613C
CN1293613C CNB2004100260575A CN200410026057A CN1293613C CN 1293613 C CN1293613 C CN 1293613C CN B2004100260575 A CNB2004100260575 A CN B2004100260575A CN 200410026057 A CN200410026057 A CN 200410026057A CN 1293613 C CN1293613 C CN 1293613C
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China
Prior art keywords
oxygen
semiconductor mesa
table top
tube core
gas
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CNB2004100260575A
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CN1564311A (en
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朱长纯
王颖
刘君华
吴春瑜
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Xian Jiaotong University
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Xian Jiaotong University
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Abstract

The present invention discloses the compound passivation technology of a silicon semiconductor mesa device. A direct-current glow-discharge method is used for depositing one layer of doped oxygen semi-insulating polycrystalline silicon film on the terminal mesa of the semiconductor device, polyimide is coated on the doped oxygen semi-insulating polycrystalline silicon film, and the goal of passivating the semiconductor mesa device is achieved. The silicon semiconductor mesa device obtained by adopting the compound passivation technology provided by the present invention has good stability and reliability, and particularly, the high-temperature property of the device is obviously improved.

Description

A kind of composite passivated technology of Si semiconductor mesa devices
Technical field
The invention belongs to the power semiconductor manufacture field, particularly a kind of oxygen-doped semi-insulating polysilicon and the composite passivated technology of polyimides.
Background technology
General semiconductor mesa devices surface SiO commonly used 2, Si 3N 4, (α-Si:H) semi-insulating film carries out passivation for phosphorosilicate glass (PSG) and hydrogen amorphous silicon.But these passivating films have many deficiencies.SiO 2There are fixed charge and movable sodium ion in the passivating film; Si 3N 4And the stress between the Si is bigger, and easy and Si device surface forms highdensity blemish; The easy moisture absorption of PSG and at high temperature can discharge sodium ion; Though α-Si:H passivation effect is better, when heat treatment temperature is higher than 200 ℃, cause overflowing of H, greatly reduce its passivation ability.The appearance of oxygen-doped semi-insulating polysilicon film makes the device passivation, but independent oxygen-doped semi-insulating polysilicon film can not stop sodium ion, therefore need cover the purpose that one deck organic membrane reaches the oxygen-doped semi-insulating polysilicon film of protection outside oxygen-doped semi-insulating polysilicon film.Therefore, in United States Patent (USP) (No.US5,661,079), adopt oxygen-doped SIPOS+ nitrating SIPOS+SiO 2Composite passivated structure.In the United States Patent (USP) (No.US2002/0130330A1), adopt oxygen-doped SIPOS+SiO 2Composite passivated structure.In the United States Patent (USP) (No.US4,297,149), before metallization, oxygen-doped SIPOS is carried out annealing in process, to improve its passivation effect.Can increase manufacturing cost like this.And, growth SiO 2The temperature of film is higher, and is incompatible with the technology of existing high pressure Si semiconductor mesa devices.Though polyimides at high temperature also can produce ion transport, but polyimides has good heat-resistant (can use), dielectric property (dielectric constant 2.8-3.5), adhesion property, radiation resistance (under the gamma-rays and fast neutron effect at 1010rad, electrical property and changes of mechanical properties are very little) and good chemical stability (erosion of anti-organic solvent and moisture) under 300 ℃ of-400 ℃ of high temperature.Therefore, can be used as a kind of good secondary passivity material.
Summary of the invention
Defective or deficiency at above-mentioned passivation technology existence, the objective of the invention is to, a kind of composite passivated technology of simple Si semiconductor mesa devices is provided, promptly adopts oxygen-doped semi-insulating polysilicon as main passivation layer and polyimides composite passivated technology as the secondary passivity layer.
The solution that the present invention adopts is at HF: HNO with aforementioned tube core 3: H 2Handle in the O mixed liquor to reduce the surface state of Si semiconductor mesa devices greatly; Utilize direct current glow discharge oxygen-doped semi-insulating polysilicon film of deposit one deck on the terminal table top of semiconductor device; Coating polyimide on oxygen-doped semi-insulating polysilicon film reaches composite passivated purpose.
Technology of the present invention is simple, and the Si semiconductor mesa devices that obtains has good stable and reliability.Especially, the hot properties of Si semiconductor mesa devices is significantly improved.
Embodiment
The present invention is after silicon semiconductor device is made the conventional moulding of terminal table top, corrosion and clean, is 1: 8: 8 HF: HNO in proportioning 3: H 2Handled 1-2 minute in the O mixed liquor, can fill up the dangling bonds at mesa surfaces place like this, reduce the surface state of Si semiconductor mesa devices greatly.Adopt the direct current glow discharge method, high direct voltage 2500V-3000V is added on two indoor parallel pole plates of vacuum reaction, wherein negative electrode connects high-pressure side, and anode and vacuum system and vacuum chamber be ground connection simultaneously.The high-resistivity monocrystalline silicon of resistivity greater than 500 Ω cm is placed on the minus plate as sputtering source; The Si semiconductor mesa devices of passivation is placed on the positive plate, and the spacing of two parallel plate electrodes is 3cm～8cm.To treat that with the aluminum baffle plate cathodic electricity contact of the Si semiconductor mesa devices of passivation blocks again, promptly only expose the table top part of device.Then, fill sputter gas argon gas and oxygen mixed gas, the flow-ratio control of argon gas and oxygen is in the 0.5%-15% scope.Vacuum degree in the vacuum chamber is 3 * 1 -2-1 * 10 -3Torr.At this moment, the high direct voltage that applies makes it produce glow discharge, the cation that glow discharge produces is at a high speed to cathode motion, the silicon target of bombarding cathode, and the silicon atom that is bombarded out and the oxygen-doped semi-insulating polysilicon film of oxygen reaction are deposited on the table top of silicon semiconductor device.Then, semiconductor device is naturally cooled to less than 60 ℃, on the oxygen-doped semi-insulating polysilicon film of deposit, 120 ℃ of preliminary dryings are 30 minutes in baking oven with polyimide coating; 140 ℃ of precuring 3 hours; At N 2Gas shiled was solidified 1 hour for following 300 ℃.
Embodiment 1:
(1) will carry out conventional cleaning, oven dry through the rectification tube core or the thyristor core of table top moulding.
(2) with aforementioned tube core be 1: 8: 8 HF: HNO in proportioning 3: H 2Handled 1 minute in the O mixed liquor.
(3) tube core after the aforementioned processing is done to dry or use N after the conventional cleaning 2Air-blowing is dried, standby.
(4) high-resistivity monocrystalline silicon of resistivity for (＞500 Ω cm) is placed on the minus plate as sputtering source, the Si semiconductor mesa devices of passivation is placed on the positive plate, and the spacing of two parallel plate electrodes is 4.5cm.
(5) will treat that with the aluminum baffle plate cathodic electricity contact of the Si semiconductor mesa devices of passivation blocks, promptly only expose the table top part of device.
(6) applying argon gas and oxygen mixed gas, the flow-rate ratio of argon gas and oxygen are 5%; Vacuum degree in the vacuum chamber is 1 * 10 -2Torr; High direct voltage 3000V is added in (negative electrode connects high-pressure side, and anode and vacuum system and vacuum chamber be ground connection simultaneously) on two indoor parallel pole plates of vacuum reaction; Sputtering time is about 15 minutes.
(7) tube core naturally cools to less than 60 ℃.
(8) coating polyimide on oxygen-doped semi-insulating polysilicon film.And static placement 10 minutes.
(9) tube core of coating polyimide is put into baking oven, vacuumize or N 2The following 120 ℃ of preliminary dryings of gas shiled 30 minutes;
(10) continue to be warming up to 140 ℃, vacuumize or N 2Precuring is 3 hours under the gas shiled;
(11) vacuumize or N 2Gas shiled was solidified 1 hour for following 300 ℃.
(12) tube core is cooled to naturally take out after the room temperature and gets final product.
Embodiment 2:
(1) will carry out conventional cleaning, oven dry through the transistor dies of corrosion positive table top of formation or negative table top.
(2) with aforementioned tube core be 1: 8: 8 HF: HNO in proportioning 3: H 2Handled 1 minute in the O mixed liquor.
(3) tube core after the aforementioned processing is done to dry or use N after the conventional cleaning 2Air-blowing is dried, standby.
(4) high-resistivity monocrystalline silicon of resistivity for (＞500 Ω cm) is placed on the minus plate as sputtering source, the Si semiconductor mesa devices of passivation is placed on the positive plate, and the spacing of two parallel plate electrodes is 4.5cm.
(5) will treat that with the aluminum baffle plate cathodic electricity contact of the Si semiconductor mesa devices of passivation blocks, promptly only expose the table top part of device.
(6) applying argon gas and oxygen mixed gas, the flow-rate ratio of argon gas and oxygen are 5%; Vacuum degree in the vacuum chamber is 1 * 10 -2Torr; High direct voltage 3000V is added in (negative electrode connects high-pressure side, and anode and vacuum system and vacuum chamber be ground connection simultaneously) on two indoor parallel pole plates of vacuum reaction; Sputtering time is about 20 minutes.
(7) tube core is naturally cooled to less than 60 ℃.
(8) coating polyimide, and static placement 10 minutes.
(9) tube core of coating polyimide is put into baking oven, vacuumize or N 2The following 120 ℃ of preliminary dryings of gas shiled 30 minutes;
(10) continue to be warming up to 140 ℃, vacuumize or N 2Precuring is 3 hours under the gas shiled;
(11) vacuumize or N 2Gas shiled was solidified 1 hour for following 300 ℃.
(12) tube core is cooled to naturally take out after the room temperature and gets final product.
Composite passivated technology provided by the invention also is applicable to the silicon semiconductor device that other adopt the table top moulding simultaneously.

Claims (1)

1. the composite passivated technology of a Si semiconductor mesa devices, it is characterized in that, utilize the method for direct current glow discharge, the oxygen-doped semi-insulating polysilicon film of deposit one deck on the terminal table top of semiconductor device, coating polyimide on oxygen-doped semi-insulating polysilicon film makes the semiconductor mesa devices passivation again; May further comprise the steps:
1) will do conventional terminal table top moulding and carry out conventional burn into cleaning through the silicon mesa semiconductor device of table top moulding;
2) with aforementioned tube core be 1: 8: 8 HF: HNO in proportioning 3: H 2Handled 1-2 minute in the O mixed liquor;
3) tube core after the aforementioned processing is done to dry or use N after the conventional cleaning 2Air-blowing is dried, standby;
4) high-resistivity monocrystalline silicon of resistivity greater than 500 Ω cm is placed on the indoor minus plate of vacuum reaction as sputtering source, the Si semiconductor mesa devices of passivation is placed on the positive plate, the spacing of two parallel plate electrodes is 3cm～8cm;
5) will treat that with the aluminum baffle plate cathodic electricity contact of the Si semiconductor mesa devices of passivation blocks, promptly only expose the table top part of device;
6) at indoor sputter gas argon gas and the oxygen mixed gas of filling of vacuum reaction, the flow-ratio control of argon gas and oxygen is between 0.5%～15%; Making the vacuum degree in the vacuum chamber is 1 * 10 -2Torr;
7) high direct voltage 3000V is added on two indoor parallel pole plates of vacuum reaction, wherein negative electrode connects high-pressure side, and anode and vacuum system and vacuum chamber be ground connection simultaneously, and sputtering time is 15min; High direct voltage makes it produce glow discharge, and the cation that glow discharge produces is at a high speed to cathode motion, the silicon target of bombarding cathode, and the oxygen-doped semi-insulating polysilicon film of the silicon atom that is bombarded out and the generation of oxygen reaction is deposited on the table top of silicon semiconductor device;
8) the Si semiconductor mesa devices is naturally cooled to less than after 60 ℃, with polyimide coating on the oxygen-doped semi-insulating polysilicon film of deposit, and static placement 10 minutes;
9) tube core of coating polyimide is put into baking oven, vacuumize or N 2The following 120 ℃ of preliminary dryings of gas shiled 30 minutes;
10) continue to be warming up to 140 ℃, vacuumize or N 2Precuring is 3 hours under the gas shiled;
11) vacuumize or N 2Gas shiled was solidified 1 hour for following 300 ℃;
12) tube core is cooled to naturally take out after the room temperature and gets final product.
CNB2004100260575A 2004-04-20 2004-04-20 Compounded passive tech of silicon semiconductor mesa device Expired - Fee Related CN1293613C (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101335232B (en) * 2007-06-28 2010-12-08 海力士半导体有限公司 CMP method of semiconductor device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101794740A (en) * 2010-02-25 2010-08-04 海湾电子(山东)有限公司 High temperature resistant rectification chip
CN102983225A (en) * 2012-12-12 2013-03-20 泰州德通电气有限公司 Manufacturing process of local back surface field
CN104635791A (en) * 2014-12-13 2015-05-20 海太半导体（无锡）有限公司 Oven temperature control method and device for semiconductor manufacturing

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1035022A (en) * 1987-04-15 1989-08-23 兰州大学 Carbon-hydrogen passivation process of noncrystal silicon
CN1062619A (en) * 1990-12-19 1992-07-08 上海汽车电器总厂 Passivation technology for semiconductor mesa devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1035022A (en) * 1987-04-15 1989-08-23 兰州大学 Carbon-hydrogen passivation process of noncrystal silicon
CN1062619A (en) * 1990-12-19 1992-07-08 上海汽车电器总厂 Passivation technology for semiconductor mesa devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101335232B (en) * 2007-06-28 2010-12-08 海力士半导体有限公司 CMP method of semiconductor device

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