CN1286840A - Device and method for generating orthogonal codes in mobile communication system - Google Patents
Device and method for generating orthogonal codes in mobile communication system Download PDFInfo
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- CN1286840A CN1286840A CN 99801662 CN99801662A CN1286840A CN 1286840 A CN1286840 A CN 1286840A CN 99801662 CN99801662 CN 99801662 CN 99801662 A CN99801662 A CN 99801662A CN 1286840 A CN1286840 A CN 1286840A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J13/00—Code division multiplex systems
- H04J13/10—Code generation
- H04J13/12—Generation of orthogonal codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J13/00—Code division multiplex systems
- H04J13/0007—Code type
- H04J13/004—Orthogonal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/02—Channels characterised by the type of signal
- H04L5/023—Multiplexing of multicarrier modulation signals
- H04L5/026—Multiplexing of multicarrier modulation signals using code division
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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Abstract
A device and method for generating orthogonal codes differing in length according to symbol rates. An orthogonal code length corresponding to a variable symbol rate is calculated to determine an effective bit number. A chip count value is sequentially generated up to a maximum value, which can be counted by the effective bit number. An orthogonal code is generated by a logic operation of an orthogonal code index which is converted into the binary number of the effective bit number and the sequentially generated chip count values.
Description
Background of invention
1. invention field
The present invention relates to equipment and method that being used in mobile communication system produces orthogonal code, and be particularly related to a kind of equipment and method that produces length different orthogonal sign indicating number according to different symbol rates.
2. description of Related Art
Usually, orthogonal code is used for extended channel and distinguishes a plurality of channels as identifier.In the general transmitter that adopts the IS-95CDMA system, Walsh (Walsh) sign indicating number (a kind of orthogonal code of form) with 64 chip lengths is used to quadrature and the extending bandwidth between maintenance channel.By using 64 chip Walsh sign indicating numbers, can obtain the channel rate of spread of 1.2288 Mcps, because remain on 19.2Kbps equably by the symbol rate of the different channels coded data that provides from the modulator of transmitter to expander.Therefore, use one 64 * 64 Walsh code table.
Yet, for example in the CDMA-2000 that is applied to an IMT-2000 system (code division multiple access-2000) mobile communication system, the symbol rate that offers the data of expander in the process of modulated forward channel has nothing in common with each other by channel type, therefore the Walsh sign indicating number that just needs length to change with channel.
In order to produce Walsh sign indicating number, provide Walsh code table corresponding to different length with different length with conventional method.This requirement has various different memory, according to various symbol rates use flexibly the Walsh sign indicating number of different length remain the difficulty.
So, an object of the present invention is to provide a kind of equipment and method, be used for producing the different orthogonal code of length according to the distinct symbols rate in mobile communication system.
Another object of the present invention provides a kind of equipment and method, is used for producing orthogonal code in mobile communication system by an orthogonal code index and chip count.
According to one aspect of the present invention, the equipment that is used to produce orthogonal code in mobile communication system comprises: memory has several registers of storing effective bit number respectively; Orthogonal code index and chip count value; Orthogonal code produces circuit, be used for order and produce the chip count value up to can be by the maximum of significant bit counting number, and the logical operation of the chip count value that produces by orthogonal code index and order produces orthogonal code.
According to another aspect of the present invention, the method that is used to produce orthogonal code in mobile communication system may further comprise the steps: calculate the length corresponding to the orthogonal code of distinct symbols rate; Determine effective bit number by the length of the orthogonal code that calculates; Order produces the chip count value up to can be by the maximum of significant bit counting number; The orthogonal code index translation is become the binary number of significant bit number; The chip count value actuating logic computing that the orthogonal code index that converts binary number to and order are produced is to produce an orthogonal code.
The accompanying drawing summary
In conjunction with the drawings the preferred embodiments of the present invention are described in detail, above-mentioned and other purposes, characteristic, advantage of the present invention will become apparent, wherein:
Fig. 1 is the calcspar according to the modulator of embodiment of the invention explanation mobile communication system;
Fig. 2 is the schematic diagram that the orthogonal code production process of being represented by an equation is described according to the embodiment of the invention;
Fig. 3 is the flow chart of the orthogonal code generator of expression in the key diagram 1.
Preferred embodiment describes in detail
The preferred embodiments of the present invention are described below with reference to accompanying drawing at this.In the following description, because well-known function and structure can make the present invention unintelligible on unnecessary details, so just be not elaborated.
Fig. 1 illustrates the modulator of mobile communication system according to one embodiment of present invention.The description emphasis of modulator is in the part of relevant quadrature spread.
With reference to figure 1, demultiplexer (DEMUX) and signal map circuit 111 decompose symbol data (or coded data) multichannel of input to export an I-channel (or first channel) signal and a Q-channel (or second channel) signal respectively.This DEMUX and signal map circuit 111 are also changed the level of a symbol data, for example, " 0 " are converted to "+1 ", and " 1 " is converted to " 1 ".The gain control signal that the first and second channel gain controllers 115 and 116 provide according to controller 113 is controlled respectively from the gain of first and second channel signals of DEMUX and 111 outputs of signal map circuit.The data of memory 112 storage distinct programs and the data of the interim generation in the executive program process.This memory 112 comprises: a register that has the orthogonal code length information that changes with the channel symbol rate; A register that has the orthogonal code index of distributing to channel; A register that has chip count, this counting can obtain by the symbol according to a need quadrature spread of corresponding chip clock counting.Below the information of the relevant orthogonal code length described can be defined as the meaning of the actual significant bit number that is restriction orthogonal code index and chip count.Whole operations of controller 113 control modulators.Specifically, controller 113 reads the orthogonal code generator 114 that the parameter relevant with producing orthogonal code also offers this parameter each channel generator from memory 112.The orthogonal code length information that this orthogonal code generator 114 provides according to slave controller 113 (being the significant bit number), orthogonal code index and chip count produce corresponding orthogonal code.First and second multipliers 117 and 118 usefulness orthogonal codes multiply by respectively from first and second channel signals of the first and second channel gain controllers 115 and 116 outputs, and produce first and second channel signal IW and the QW of quadrature modulation.
Realizing producing in the process of orthogonal code equipment memory 112, controller 113 and orthogonal code generator 114 composition that is absolutely necessary by the present invention.For controller 113 and orthogonal code generator 114 the two, will use term " orthogonal code generation circuit ".
In the quadrature spread operation of said modulator, coded data (or symbol data) is separated into first and second channel signals by DEMUX and signal map circuit 111.Indicated as controller 113, the signal of separation is by the first and second channel gain controllers 115 and 116 its gains of control.The first and second gain controlled channel signals are offered first and second multipliers 117 and 118 respectively.Controller 113 receives corresponding to orthogonal code length, the chip count of encoded data symbols rate and distributes to the orthogonal code index of channel.These parameters obtain by the register that visit is included in the memory 112, and are provided for the orthogonal code generator 114 of corresponding signal generator.Orthogonal code generator 114 is then by being stored in the program among its inner DSP (digital signal processor) or producing corresponding orthogonal code by an ASIC (application-specific integrated circuit (ASIC)).The orthogonal code that produces is provided for multiplier 117 and 118. Multiplier 117 and 118 multiply by from the first and second gain controlled channel signals of the first and second channel gain controllers 115 and 116 outputs with orthogonal code respectively, thereby produces first and second channel signal IW and the QW corresponding to the quadrature modulation of I and Q channel respectively.
The process that produces orthogonal code will be described in more detail at this.The orthogonal code production process produces circuit by orthogonal code and carries out, and this circuit comprises controller 113 and orthogonal code generator 114.Should notice that the orthogonal code length information is alternately as the significant bit number.
The orthogonal code production process can be divided into for two steps substantially: the first step is to produce the required information of orthogonal code, and the information that second step was based on generation produces orthogonal code.Required information is to distribute to the orthogonal code index of each channel, by with chip count that symbol period obtains of chip clock counting, and orthogonal code length.
To describe the first step now, produce information based on orthogonal code index, chip count and orthogonal code length.
In the CDMA-2000 system, the data symbol rate that offers expander in the process of modulation forward channel changes according to signal type, does not resemble traditional IS-95 cdma system.In order to regulate the band spreading rate equably, orthogonal code length becomes according to different symbol rates and has nothing in common with each other.For example, orthogonal code length can be 8,16,32,64,128,256,512 and 1024 chips.If the band spreading rate is 3.6864 Mcps, and the symbol rate that offers the data of expander is 14.4Kbps, 28.8Kbps, 57.6Kbps and 115.2Kbps, then orthogonal code length becomes 256 chips, 128 chips, 64 chips and 32 chips could produce the band spreading rate of 3.6864 Mcps, that is:
14.4Kbps×256chips=3.6864Mcps
28.8Kbps×128chips=3.6864Mcps
57.6Kbps×64chips=3.6864Mcps
115.2Kbps×32chips=3.6864Mcps
Therefore, have the orthogonal code of different length according to the different data symbol rate generation that offers expander, thereby obtain an even band spreading rate.For this reason, the processor of control modulator provides information about orthogonal code length for modulator.As an example, can be expressed as the power of 2 stated number with the orthogonal code length of the variation of symbol rate.For example, 4=2
2, 8=2
3, 16=2
4..., 1024=2
10
As mentioned above, be 2 and only be the index difference corresponding to the radix of each orthogonal code length.Therefore, the orthogonal code length information of being determined by symbol rate uses this index.Processor provides this index as orthogonal code length information I for modulator.
Distribute to the orthogonal code index n of each channel and the scope by the chip count t that obtains with symbol period of chip clock counting, can enlarge or dwindle various orthogonal code length 4,8,16,64,128 neatly ...
Specifically, orthogonal code index n and chip count t be at same range as 0≤n, t≤2
IDetermine in-1.The indication of orthogonal code index is expressed as an integer value in the above-mentioned scope binary number of I bit.Chip count is represented a integer in the above-mentioned scope successively by the binary number of I bit.Suppose that orthogonal code length information I is 4, then the orthogonal code index becomes the binary number of 4 bits of an expression integer of 0 to 15.As chip count, the value of 4 bit binary number, promptly 0000 to 1111 order is provided for the integer of specified scope from 0 to 15.Although the bit number of above-mentioned example restriction orthogonal code index and chip count is the I bit, bit number does not need restriction.That is, can specify the bit number of orthogonal code index and chip count to reach maximum number bits.Then in the bit number of appointment except the effective bit of reality all bits all be made as " 0 ".Determine maximum number bits according to the longest Walsh sign indicating number in mobile communication system.Actual effectively bit is represented the bit number of orthogonal code index and chip count.For example, be 128 (=2 if be used for the longest Walsh sign indicating number of mobile communication system
7) chip, then maximum number bits is 7 bits.
Therefore, if specified symbol rate, orthogonal code length is just determined by the symbol rate of appointment so, thereby the scope of chip count and orthogonal code index is determined by orthogonal code length.In case the scope of chip count is determined, just order increase in the scope of determining of chip count.The chip count of orthogonal code length, orthogonal code index and increase is provided as the information that produces orthogonal code.If orthogonal code generator 114 has the function of estimating orthogonal code length according to the orthogonal code index, controller 113 just needn't provide the orthogonal code length information so.
In second step, by using the orthogonal code length information, producing orthogonal code to the orthogonal code index of each channel appointment with from the chip count that processor provides.In brief, except orthogonal code index and chip count, the orthogonal code length information also offers a kind of algorithm, so that produce the orthogonal code of different length.
The processor that is used to control modulator is determined the orthogonal code length information and this information is offered orthogonal code generator 114 based on symbol rate, thereby produces the orthogonal code with variable-length by symbol rate.The digital number that is expressed as the orthogonal code index n of binary number and chip count t according to the orthogonal code length information by restriction produces the orthogonal code of needs length.It can be expressed as equation 1:
[equation 1]
W (I, n, t)=(n
I-1* t
I-1) ... (n
4* t
4) _ (n
3* t
3) _ (n
2* t
2) _ (n
1* t
1) _ (n
0* t
0) wherein, I be the orthogonal code length information (that is, and 2,3,4 ...), n is the orthogonal code index to each channel appointment, t is by counting the chip count that symbol period obtains with chip clock.
If orthogonal code length information, orthogonal code index and chip count are specified by equation 1, then produce the orthogonal code of a corresponding chip.As finding out that effectively computer capacity is determined by orthogonal code length information I from equation 1.Simultaneously, the orthogonal code of a bit by in effective computer capacity, will constituting chip count bit and the logical operation of the bit of formation orthogonal code index obtain.That is to say that chip count and orthogonal code index bitwise carry out AND operation, and will " with " the result carry out distance.
Fig. 2 has illustrated effective computer capacity of determining according to orthogonal code length information I.If orthogonal code length information I is 3 (=011), the scope of chip count t is from 0 to 7, and orthogonal code index n is 3 (that is n,
2, n
1, n
0=0,1,1), use scope to produce a chip orthogonal code so, as shown in Figure 2 corresponding to reference number 214.That is:
W (3,3, t)=(n
2* t
2) _ (n
1* t
1) _ (n
0* t
0) x wherein, n=(011) and 0≤t≤7.
Therefore,
For t=0 (000), W (3,3,0)=(0 * 0) _ (1 * 0) _ (1 * 0)=0;
For t=1 (001), W (3,3,1)=(0 * 0) _ (1 * 0) _ (1 * 1)=1;
For t=2 (010), W (3,3,2)=(0 * 0) _ (1 * 1) _ (1 * 0)=1;
For t=3 (011), W (3,3,3)=(0 * 0) _ (1 * 1) _ (1 * 1)=0;
For t=4 (100), W (3,3,4)=(0 * 1) _ (1 * 0) _ (1 * 0)=0;
For t=5 (101), W (3,3,5)=(0 * 1) _ (1 * 0) _ (1 * 1)=1;
For t=6 (110), W (3,3,6)=(0 * 1) _ (1 * 1) _ (1 * 0)=1;
For t=7 (111), W (3,3,7)=(0 * 1) _ (1 * 1) _ (1 * 1)=0.
At last, produce orthogonal code (01100110).This orthogonal code production process based on equation 1 can be represented by equation 2, and write with the C language.
[equation 2]
Walsh(int?length，int?index，int?count)
{
int?I，wc=0；
for(i=0；i＜length；i++)
wc=wc^(((index>>i)&0×01)&((count>>i)&0×01)；
return(Wc)；
Wherein, i is an interim count parameter; Wc is the parameter of a storage end value; Length is a parameter that contains by the orthogonal code length information of symbol rate decision; Index is an orthogonal code index of distributing to channel; Count is by counting the chip count that symbol period obtains with chip clock.
The scope of chip count is difference according to orthogonal code length, shown in following table 1: [table 1]
| Length | Count range | |
| 2 | 0-3 | 4 |
| 3 | 0-7 | 8 |
| 4 | 0-15 | 16 |
| 5 | 0-31 | 32 |
The orthogonal code production process can be realized by the program shown in the equation 2 among the DSP or by the algorithm as HDL (hardware development language) among the ASIC.
The example that obtains the orthogonal code generator in ASIC as shown in Figure 3.With reference to figure 3, the orthogonal code generator comprises and contains a plurality of AND gate 310_0 ..., the AND gate circuit 310 of 310_M-1 and a partial sum gate 320.The AND gate quantity that constitutes AND gate circuit 310 is with identical according to the maximum number bits of the longest orthogonal code decision.If orthogonal code length is 4,8,16,32,64 and 128 chips, then the number of AND gate is based on 128 (=2
7) chip determines.In this case, corresponding to bit number, orthogonal code index and chip count, the AND gate number will be 7.When producing the orthogonal code of the longest orthogonal code length weak point of length ratio, bits all except actual significant bit all is made as " 0 ".In other words, be " 0 " except all bits of actual significant bit are all masked.
Each AND gate 310_0 ..., 310_M-1 carries out the AND operation between the corresponding bits of the corresponding bits of orthogonal code index and chip count.The output of 320 pairs of AND gate circuits 310 of partial sum gate is carried out nonequivalence operation to produce a bit that constitutes orthogonal code.Reference symbol Walsh Index is a register that is used to store the orthogonal code index that needs calculating; Chip_count is a register that is used to store current chip count; Walsh_code is the quadrature code value of a current calculating; M is the value (for example, if the longest orthogonal code length is 128 chips, M is 7 so) that the maximum orthogonality code length is expressed as the power of 2 stated number.
The computing of exemplifying orthogonal code generator among Fig. 3 now supposes that orthogonal code length information I is 3 (011), and chip count t is 0-7, and orthogonal code index n is 3 (n2, n1, n0=0,1,1).The longest orthogonal code length of hypothesis is 128 chips again, and promptly M is 7.So the actual AND gate number that requires of orthogonal code information I (=3) is restricted to 3.
As the orthogonal code index, actual information 011 provides continuously with 4 bits of sheltering to " 0 ".As chip count, provide 4 bits and from 000 to 111 3 minimum effective bits that change sheltered to " 0 ".According to the output row of the AND gate circuit 310 of orthogonal code index and chip count in the following Table 2.[table 2]
AND gate 310_0 ..., the output q of 310_M-1
0To q
6Be provided for partial sum gate 320.Partial sum gate 320 passes through output q
0To q
6Nonequivalence operation produce orthogonal code " 01100110 ".
In a preferred embodiment of the invention, controller 113 is identified for producing the information that comprises chip count of orthogonal code, and this information is offered orthogonal code generator 114.Yet controller 113 can only provide orthogonal code length and orthogonal code index, and orthogonal code generator 114 produces chip count.In this case, the orthogonal code generator should comprise a counter so that produce chip count based on orthogonal code length.
As mentioned above, has the orthogonal code of different length owing to can produce, so the present invention can effectively be applied in the CDMA-2000 mobile communication system of symbol rate with the channel type change according to symbol rate.In addition, since unnecessary corresponding to the different dissimilar quadrature code tables of orthogonal code length generation, can realize by a universal architecture that is applicable to the distinct symbols rate so require the memory of multiple variation and hardware configuration.
Although the present invention describes with reference to its specific preferred embodiment, it should be appreciated by those skilled in the art, do not breaking away under the spirit and scope of the present invention and situation that are defined by the following claims, can carry out the various modifications of form and details to it.
Claims (10)
1. equipment that is used to produce orthogonal code in mobile communication system comprises:
Memory contains and is useful on the register of storing effective bit number, orthogonal code index and chip count value respectively;
Orthogonal code produces circuit, is used for producing in proper order described chip count value and can also be used for producing orthogonal code by the chip count value of described orthogonal code index and the generation of described order is carried out logical operation by the maximum of significant bit counting number up to reaching.
2. equipment as claimed in claim 1, wherein, when the orthogonal code lengths table corresponding to the symbol rate that changes was shown the power of 2 stated number, then described significant bit numerical table first finger was counted bit number.
3. equipment as claimed in claim 1, wherein, described orthogonal code produces circuit and receives described significant bit number, orthogonal code index and chip count value, and produces an orthogonal code according to following equation:
W(I，n，t)=(n
I-1×t
I-1)…(n
4×t
4)_(n
3×t
3)_(n
2×t
2)_(n
1×t
1)_(n
0×t
0)
Wherein, I is the significant bit number, n (=n
I-1..., n
4, n
3, n
2, n
1, n
0) be the orthogonal code index, t (=t
I-1..., t
4, t
3, t
2, t
1, t
0) be the chip count value.
4. equipment as claimed in claim 2, wherein, described orthogonal code produces circuit and comprises:
Controller is used for determining described significant bit number, and order produces described chip count value can be by the maximum of significant bit counting number up to reaching, and described orthogonal code index translation is become the binary number of described significant bit number;
The orthogonal code generator is used for producing an orthogonal code by the orthogonal code index that converts binary number to is carried out logical operation with the chip count value of order generation.
5. equipment as claimed in claim 4, wherein, described orthogonal code generator comprises:
A plurality of AND gates, the bit that is used for the chip count value that bit and described order to the described orthogonal code index that converts binary number to produce carries out AND operation;
Partial sum gate, being used for nonequivalence operation is carried out in the output of described AND gate is the orthogonal code of unit to produce with a slice.
6. method that produces orthogonal code in mobile communication system comprises following a few step:
Calculate orthogonal code length corresponding to the symbol rate that changes;
Determine effective bit number based on the orthogonal code length that calculates;
Order produces the chip count value can be by the maximum of described significant bit counting number up to reaching;
The orthogonal code index translation is become the binary number of described significant bit number;
To the described orthogonal code index that converts binary number to and the described chip count value actuating logic computing that produces successively in order to produce an orthogonal code.
7. method as claimed in claim 6, wherein, when described orthogonal code lengths table was shown the power of 2 stated number, then described significant bit numerical table showed this index.
8. method as claimed in claim 6, wherein, described logical operation may further comprise the steps:
The bit of the chip count value that the bit and the described order of the described orthogonal code index that converts binary number to produced carries out AND operation; With
Result to AND operation carries out nonequivalence operation.
9. method that is used to produce orthogonal code in mobile communication system may further comprise the steps:
Calculate orthogonal code length so that determine effective bit number corresponding to the symbol rate that changes;
Receive described significant bit number, orthogonal code index and chip count value, and produce orthogonal code according to following equation:
W(I，n，t)=(n
I-1×t
I-1)…(n
4×t
4)_(n
3×t
3)_(n
2×t
2)_(n
1×t
1)_(n
0×t
0)
Wherein, I is the significant bit number, n (=n
I-1..., n
4, n
3, n
2, n
1, n
0) be the orthogonal code index, t (=t
I-1..., t
4, t
3, t
2, t
1, t
0) be the chip count value.
10. method as claimed in claim 9, wherein, when described orthogonal code lengths table was shown the power of 2 stated number, then described significant bit numerical table showed this index.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR19980035118 | 1998-08-28 | ||
| KR98/35118 | 1998-08-28 |
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| Publication Number | Publication Date |
|---|---|
| CN1286840A true CN1286840A (en) | 2001-03-07 |
Family
ID=19548665
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 99801662 Pending CN1286840A (en) | 1998-08-28 | 1999-08-28 | Device and method for generating orthogonal codes in mobile communication system |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP1057287A2 (en) |
| CN (1) | CN1286840A (en) |
| AU (1) | AU732063B2 (en) |
| BR (1) | BR9906781A (en) |
| CA (1) | CA2309032A1 (en) |
| WO (1) | WO2000013431A2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7443906B1 (en) | 1999-05-31 | 2008-10-28 | Electronics And Telecommunications Research Institute | Apparatus and method for modulating data message by employing orthogonal variable spreading factor (OVSF) codes in mobile communication system |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FI925472A (en) * | 1992-12-01 | 1994-06-02 | Nokia Mobile Phones Ltd | Data transfer procedure and system |
| JPH0918450A (en) * | 1995-06-27 | 1997-01-17 | Sony Corp | Code division multiplex transmitter |
| JP3317866B2 (en) * | 1996-12-20 | 2002-08-26 | 富士通株式会社 | Spread spectrum communication system |
-
1999
- 1999-08-28 CA CA002309032A patent/CA2309032A1/en not_active Abandoned
- 1999-08-28 CN CN 99801662 patent/CN1286840A/en active Pending
- 1999-08-28 BR BR9906781-1A patent/BR9906781A/en not_active IP Right Cessation
- 1999-08-28 AU AU55310/99A patent/AU732063B2/en not_active Ceased
- 1999-08-28 WO PCT/KR1999/000494 patent/WO2000013431A2/en not_active Application Discontinuation
- 1999-08-28 EP EP99941826A patent/EP1057287A2/en not_active Withdrawn
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| Publication number | Publication date |
|---|---|
| AU5531099A (en) | 2000-03-21 |
| BR9906781A (en) | 2000-12-05 |
| EP1057287A2 (en) | 2000-12-06 |
| AU732063B2 (en) | 2001-04-12 |
| WO2000013431A3 (en) | 2000-06-29 |
| CA2309032A1 (en) | 2000-03-09 |
| WO2000013431A2 (en) | 2000-03-09 |
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