CN1282168C - High speed optical recorder - Google Patents
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- CN1282168C CN1282168C CN 03104478 CN03104478A CN1282168C CN 1282168 C CN1282168 C CN 1282168C CN 03104478 CN03104478 CN 03104478 CN 03104478 A CN03104478 A CN 03104478A CN 1282168 C CN1282168 C CN 1282168C
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Abstract
The present invention provides a high speed optical recorder which generates a write-in signal to control the write-in power of an optical pick-up device by an input RLL modulation waveform. The high speed optical recorder comprises a rough delayer and a precision delay chain, wherein rough delaying parameters and precision delaying parameters are generated by a group of write-in scheme parameters; according to a method that the rough delaying parameters delay the eight to fourteen modulation waveforms, a first delaying signal is generated; the precision delay chain comprises a plurality of delaying units mutually connected in series, each delaying unit delays the first delaying signal to predetermined time. By the precision delaying parameters, the precision delay chain delays the first delaying signal so as to generate the write-in signal.
Description
Technical field
The invention provides a kind of high speed optical recorder (High Speed Optical RecordingApparatus), particularly a kind of high speed optical recorder that includes counter and delay chain (Delay Chain) simultaneously.
Background technology
In recent years along with the computer arithmetic capability is more and more powerful, add that development of internet technology is constantly progressive, make the user utilize computer as multimedium audiovisual media and utilize computer as and the starting point linked up of the world, virtual networking and the various information of a large amount of accesses of Internet have been become a kind of trend.In this trend, because the demand to the data memory space heightens, therefore various storage tool also becomes popular product thereupon, wherein utilize the product of CD as storage medium, cheap and frivolous not the taking up space of volume is easy to carry owing to CD unit price under same memory capacity, all very attracted attention by the people all the time, the function of various especially over the years CD player and CD writer is become stronger day by day, reading quality and storage speed constantly upwards promotes, add except the CD of original CD specification, same volume more occurs but capacity increases the DVD specification of several times, more made CD player and CD writer almost become the standard configuration of every PC.
Optical storage (as CD writer or DVD burner etc.) is when arriving optical storage medium (as CD CD or DVD CD etc.) with data storage, can utilize the scrambler (Encoder) of this optical storage to be converted to the storage format of this optical storage medium these data, in current known technology, the storage format of this kind optical storage medium is generally RLL modulation waveform (Run Length Limitedcode (run length limited code), in the CD-ROM form, use Eight-to-Fourteen Modulation, below all with the EFM Waveform of CD form explanation), this EFM waveform is represented the data of desiring to be stored on this optical storage medium with the square wave of different time length, usually each pulse of this square wave and interpulse distance are three times of EFM reference period (EFM Base Frequency) to the length between 11 times of the EFM reference period, and this EFM waveform then is used for as this optical storage the foundation of data carving to this optical storage medium.When data storage is on this optical storage medium, utilize a plurality of lands (Land) and the hole that length differs on this optical storage medium to distinguish the content that (Pit) represents these data, the length in this land and hole district is then just corresponding to the waveform length of this EFM waveform, utilize this corresponding relation, then this optical storage can be with data storage to this optical storage medium.
After this optical storage utilizes its EFM scrambler to produce this EFM waveform, can be with in this EFM waveform input optical recorder (Optical Recording Device), and utilize this optical recorder that this EFM waveform is postponed (Delay), to produce a plurality of write signals, in order to control the Writing power of the optical pickup apparatus (Pickup) on this optical storage.This optical pickup apparatus then can be launched laser according to this write signal, etches the hole district that a plurality of length differ in regular turn on the surface of this optical storage medium, and then forms the staggered track that occurs of aforesaid continuous land and hole district.In known technology, this optical recorder utilizes at least counter (Counter) to cooperate comparer (Comparator) to postpone this EFM waveform usually and (please refer to United States Patent (USP) sequence number: US 5 to produce this write signal, 526,333), that is the lasting counting of clock signal of this counter meeting foundation input, the value of the control signal that this comparer then can be relatively more relevant with this EFM waveform and the count results of this counter are to postpone this EFM waveform and to export this write signal.Utilize this write signal to control the Writing power of this optical pickup apparatus again.By above-mentioned operating principle as can be known, this optical recorder postpones this EFM waveform promptly equals this clock signal with the resolution (Resolution) that produces this write signal cycle.
Yet imprinting development of technology along with optical storage medium, (32 times of speed for example can be at faster speed data carving to the optical storage of optical storage medium be appearred successively, the CD writer of 48 times of speed), because this counter and phase-locked loop (the Phase Lock Loop that is used to produce the clock signal that drives this counter, PLL) velocity limit on its circuit is all arranged, the optical recorder of known technology will face very under the etch-recording speed at a high speed, it is used to postpone the problem of this EFM waveform with the lack of resolution of the clock signal that produces this write signal, and cause this optical storage can't utilize its optical pickup apparatus on this optical storage medium, to etch enough accurate hole, position district, this phenomenon will cause the shake (Jitter) when data read excessive, even produce the phenomenon of read error.
Summary of the invention
Therefore fundamental purpose of the present invention is to provide a kind of high speed optical recorder that includes counter and delay chain simultaneously, to solve the problem of above-mentioned known optical register delay resolution deficiency.
According to claim of the present invention, a kind of high speed optical recorder is disclosed, it is arranged in the optical storage, this high speed optical recorder becomes waveform according to the RLL of input and produces the Writing power of write signal with the optical pickup apparatus of controlling this optical storage, this high speed optical recorder includes clock generator, is used to produce first clock signal; Adjust data storage cell, be stored with many group writing scheme parameters, and can from this writing scheme parameter, select and export one group of corresponding writing scheme parameter according to this RLL modulation waveform; The coarse delay device, be electrically connected on this clock generator to import this first clock signal, and be electrically connected on this adjustment data storage cell and organize corresponding writing scheme parameter to import this, this coarse delay device can be organized corresponding writing scheme parameter according to this and produce the precise delay parameter, simultaneously organizes corresponding writing scheme parameter according to this first clock signal and this and postpones this eight to 14 modulation waveform to produce first inhibit signal; And precise delay chain, it is electrically connected on this coarse delay device to import this first inhibit signal and this precise delay parameter, this precise delay chain includes the delay cell of a plurality of mutual series connection, each this delay cell is used for this first inhibit signal delay scheduled time, and this precise delay chain can postpone this first inhibit signal to produce this write signal according to this precise delay parameter.
According to an aspect of the present invention, a kind of high speed optical recorder is provided, it is arranged in the optical storage, this high speed optical recorder produces the Writing power of write signal with the optical pickup apparatus of controlling this optical storage according to the run length limited code modulation waveform of input, this high speed optical recorder includes: clock generator is used to produce first clock signal and second clock signal; Adjust data storage cell, be stored with many group writing scheme parameters, and can from this writing scheme parameter, select and export one group of corresponding writing scheme parameter according to this eight to 14 modulation waveform, wherein should the representative of many group writing scheme parameters be used to drive the waveform character of the Writing power waveform of optical pickup apparatus; The coarse delay device, include and postpone to adjust state machine, wherein this delay is adjusted state machine and is electrically connected on this clock generator to import this first clock signal and this second clock signal, and be electrically connected on this adjustment data storage cell and organize corresponding writing scheme parameter to import this, this delay adjustment state machine can be organized corresponding writing scheme parameter according to this and produce the precise delay parameter, and simultaneously according to this first clock signal, this second clock signal and this are organized corresponding writing scheme parameter and are postponed this eight to 14 modulation waveform to produce first inhibit signal, and wherein the negative edge time point of first inhibit signal has adjustability; And precise delay chain, it is electrically connected on this coarse delay device to import this first inhibit signal and this precise delay parameter, this precise delay chain includes the delay cell of a plurality of mutual series connection, each this delay cell is used for this first inhibit signal delay scheduled time, and this precise delay chain can postpone this first inhibit signal to produce this write signal according to this precise delay parameter.
According to another aspect of the present invention, a kind of high speed optical recorder is provided, it is arranged in the optical storage, this high speed optical recorder produces the Writing power of write signal with the optical pickup apparatus of controlling this optical storage according to the run length limited code modulation waveform of input, this high speed optical recorder includes: clock generator is used to produce first clock signal and second clock signal; Adjust data storage cell, be stored with many group writing scheme parameters, and can from this writing scheme parameter, select and export one group of corresponding writing scheme parameter according to this eight to 14 modulation waveform, wherein should the representative of many group writing scheme parameters be used to drive the waveform character of the Writing power waveform of optical pickup apparatus; The coarse delay device, include the coarse delay counter, wherein this coarse delay counter is electrically connected on this clock generator to import this first clock signal and this second clock signal, and be electrically connected on this adjustment data storage cell and organize corresponding writing scheme parameter to import this, this coarse delay counter can be organized corresponding writing scheme parameter according to this and produce the precise delay parameter, and simultaneously according to this first clock signal, this second clock signal and this are organized corresponding writing scheme parameter and are postponed this eight to 14 modulation waveform to produce first inhibit signal, and wherein the negative edge time point of first inhibit signal has adjustability; And precise delay chain, it is electrically connected on this coarse delay device to import this first inhibit signal and this precise delay parameter, this precise delay chain includes the delay cell of a plurality of mutual series connection, each this delay cell is used for this first inhibit signal delay scheduled time, and this precise delay chain can postpone this first inhibit signal to produce this write signal according to this precise delay parameter.
According to an aspect of the present invention, a kind of high speed optical recorder is provided, it is arranged in the optical storage, this high speed optical recorder produces the Writing power of write signal with the optical pickup apparatus of controlling this optical storage according to the run length limited code modulation waveform of input, this high speed optical recorder includes: clock generator is used to produce first clock signal and second clock signal; Adjust data storage cell, be stored with many group writing scheme parameters, and can from this writing scheme parameter, select and export one group of corresponding writing scheme parameter according to this eight to 14 modulation waveform, wherein should the representative of many group writing scheme parameters be used to drive the waveform character of the Writing power waveform of optical pickup apparatus; The coarse delay device, include the coarse delay shift register, wherein this coarse delay shift register is electrically connected on this clock generator to import this first clock signal and this second clock signal, and be electrically connected on this adjustment data storage cell and organize corresponding writing scheme parameter to import this, this coarse delay shift register can be organized corresponding writing scheme parameter according to this and produce the precise delay parameter, and simultaneously according to this first clock signal, this second clock signal and this are organized corresponding writing scheme parameter and are postponed this eight to 14 modulation waveform to produce first inhibit signal, and wherein the negative edge time point of first inhibit signal has adjustability; And precise delay chain, it is electrically connected on this coarse delay device to import this first inhibit signal and this precise delay parameter, this precise delay chain includes the delay cell of a plurality of mutual series connection, each this delay cell is used for this first inhibit signal delay scheduled time, and this precise delay chain can postpone this first inhibit signal to produce this write signal according to this precise delay parameter.
According to an aspect of the present invention, a kind of high speed optical recorder is provided, it is arranged in the optical storage, this high speed optical recorder produces the Writing power of write signal with the optical pickup apparatus of controlling this optical storage according to the run length limited code modulation waveform of input, this high speed optical recorder includes: clock generator is used to produce first clock signal and second clock signal; Adjust data storage cell, be stored with many group writing scheme parameters, and can from this writing scheme parameter, select and export one group of corresponding writing scheme parameter according to this eight to 14 modulation waveform, wherein should the representative of many group writing scheme parameters be used to drive the waveform character of the Writing power waveform of optical pickup apparatus; The coarse delay device, be electrically connected on this clock generator to import this first clock signal, and be electrically connected on this adjustment data storage cell and organize corresponding writing scheme parameter to import this, this coarse delay device can be organized corresponding writing scheme parameter according to this and produce the precise delay parameter, simultaneously organize corresponding writing scheme parameter according to this first clock signal and this and postpone this eight to 14 modulation waveform to produce first inhibit signal, wherein the negative edge time point of first inhibit signal has adjustability; And precise delay chain, it is electrically connected on this coarse delay device to import this first inhibit signal and this precise delay parameter, this precise delay chain includes the delay cell of a plurality of mutual series connection, each this delay cell is used for this first inhibit signal delay scheduled time, this precise delay chain can postpone this first inhibit signal to produce this write signal according to this precise delay parameter, wherein this coarse delay device includes: postpone to adjust state machine, be electrically connected on this clock generator to import this second clock signal, and be electrically connected on this adjustment data storage cell and organize corresponding writing scheme parameter to import this, this delay is adjusted state machine and can be organized corresponding writing scheme parameter according to this and produce coarse delay parameter and this precise delay parameter, organizes corresponding writing scheme parameter according to this second clock signal and this simultaneously and postpones this eight to 14 modulation waveform to produce second inhibit signal; And coarse delay counter or coarse delay shift register, be electrically connected on this clock generator to import this first clock signal, and being electrically connected on this delay adjustment state machine to import this coarse delay parameter and this second inhibit signal, this coarse delay counter can postpone this second inhibit signal to produce this first inhibit signal according to this first clock signal and this coarse delay parameter.
High speed optical recorder of the present invention utilizes a plurality of delay cells in the precise delay chain to provide this high speed optical recorder needed precise delay, because each this delay cell can be with the signal delay schedule time of input, and this schedule time is the very short time cycle of length, therefore as long as each this delay cell is done suitable adjustment, high speed optical recorder of the present invention promptly can obtain enough meticulous delay resolution, to solve the problem of known technology.
Description of drawings
Fig. 1 is the functional block diagram of high speed optical recorder of the present invention.
Fig. 2 is the functional block diagram of the coarse delay counter among Fig. 1.
Fig. 3 is the functional block diagram of the precise delay chain among Fig. 1.
Symbol description in the accompanying drawing
10 high speed optical recorders, 12 clock generators
14 adjust data storage cell 16 coarse delay devices
18 precise delay chains 20 postpone to adjust state machine
22 coarse delay counters, 24 EFM input interfaces
26 data storage are provided with interface 28 EFM scramblers
30 microprocessors, 32 optical pickup apparatus
34 phase-locked loops, 36 frequency dividers
42 input registers, 44 counters
46 comparers, 48 output registers
52 reversers, 54 multiplexers
Embodiment
Please refer to Fig. 1, show the functional block diagram of high speed optical recorder of the present invention (High Speed OpticalRecording Apparatus) 10 among Fig. 1, high speed optical recorder 10 includes clock generator 12, is used to produce first clock signal clk
1Adjust data storage cell 14, be stored with many group writing scheme parameters (Write Strategy Parameter); Coarse delay device 16 is electrically connected on clock generator 12 to import first clock signal clk
1, and be electrically connected on adjustment data storage cell 14; And precise delay chain 18, it is electrically connected on coarse delay device 16, and precise delay chain 18 includes the delay cell of a plurality of mutual series connection, and each this delay cell was used for the signal delay schedule time.
In a preferred embodiment of the invention, clock generator 12 can produce second clock signal CLK in addition
2, coarse delay device 16 then includes and postpones to adjust state machine (Delay Adjustment StateMachine) 20, is electrically connected on clock generator 12 with input second clock signal CLK
2, and be electrically connected on adjustment data storage cell 14; And coarse delay counter (Rough Delay Counter) 22, be electrically connected on clock generator 12 to import first clock signal clk
1, and be electrically connected on delay adjustment state machine 20.High speed optical recorder 10 also includes eight to 14 modulation input interfaces (EFM InputInterface is hereinafter referred to as the EFM input interface) 24, and it is from EFM scrambler 28 input eight to 14 modulation waveforms (being the EFM waveform) and produce address signal; And data storage is provided with interface (DataStorage Setting Interface) 26, is electrically connected on to adjust data storage cell 14, and is electrically connected on microprocessor 30 with input and should many group writing scheme parameters store adjustment data storage cell 14 into.Precise delay chain 18 then can be electrically connected to optical pickup apparatus 32.It should be noted that under the situation that does not influence enforcement of the present invention the also available coarse delay shift register of coarse delay counter 22 (RoughDelay Shift Register) replaces.
Adjust the waveform character that should the representative of many group writing scheme parameters being used to of being stored in the data storage cell 14 drives the Writing power waveform of optical pickup apparatus 32, and, corresponding previous stripe surface (Previous Land), current pit area (Current Pit) and back one land (Next Land) are arranged all on this EFM waveform at each the hole district on the optical storage medium.In each group writing scheme parameter, there is writing scheme parameter partly to decide according to the length of this previous stripe surface and this current pit area, part decides according to the length of this current pit area and this back one land, and part then only decides according to the length of this current pit area.Therefore, in adjusting data storage cell 14, these many group writing scheme parameters promptly are principles and be divided into previous stripe surface-current pit area (LP) parameter and a current pit area-back land (PL) two parts (only the writing scheme parameter that determines according to the length of this current pit area can be deposited in the arbitrary part in above two parts) according to this.Again since the length in each land and hole district all between (the EFM reference period is expressed as T in Fig. 1) between 11 times of three times of EFM reference period and the EFM reference period, so can corresponding to, the combination of the length in different lands and hole district adjusts different writing scheme parameter in the data storage cell 14, as shown in Figure 1.And, promptly be, and correspond to suitable writing scheme parameter according to this previous stripe surface, this current pit area, and the length of this back one land and determining by this address signal that the EFM input interface is produced.
It should be noted that, adjust data storage cell 14 in order to cooperatively interact with write activity at a high speed, it typically is access speed volatile memory (Volatile Memory) fast, the efficient that can not tie down high speed optical recorder 10 integral body with the responsiveness of guaranteeing to adjust data storage cell 14, yet the data of being stored in the volatile memory can disappear because of its power-off, therefore adjusts data storage cell 14 and can via data storage the nonvolatile memory of interface 26 from microprocessor 30 be set when power initiation each time and should organize the writing scheme parameter downloads extremely wherein more.
Next the operating principle of high speed optical recorder 10 of the present invention will be described in detail in detail.After EFM input interface 24 is imported the EFM waveform from EFM scrambler 28 parts, the EFM input interface can be according to this previous stripe surface, this current pit area, and the length of being somebody's turn to do back one land produces address signal, and this EFM waveform exported to postpone to adjust in the state machine 20, and this address signal exported to adjust in the data storage cell 14.After adjustment data storage cell 14 receives this address signal, it can choose one group of corresponding writing scheme parameter respectively according to the information in this address signal from this LP parameter and this PL parameter, and should organize corresponding writing scheme parameter and export in the delay adjustment state machine 20.
Next delay adjustment state machine 20 can be organized corresponding writing scheme parameter according to this and produce coarse delay parameter and precise delay parameter, simultaneously according to second clock signal CLK
2And this is organized corresponding writing scheme parameter and postpones this EFM waveform to produce second inhibit signal and with the second inhibit signal S
2Reach this coarse delay parameter and export in the coarse delay counter 22, and this precise delay parameter is exported in the precise delay chain 18.And coarse delay counter 22 can be according to first clock signal clk
1And this coarse delay parameter postpones the second inhibit signal S
2To produce the first inhibit signal S
1, and with the first inhibit signal S
1Export in the precise delay chain 18.Last 18 on precise delay chain can postpone the first inhibit signal S according to this precise delay parameter
1To produce write signal S
W, and with write signal S
WExport in the optical pickup apparatus 32.It should be noted that since aforesaid this Writing power waveform usually by the different write signal S of a plurality of waveform characters
WSynthesize, so write signal S
WCan control the Writing power of optical pickup apparatus 32 so that optical storage medium is carried out etching through machine-processed thus.
With reference to figure 2, the functional block diagram of the coarse delay counter 22 among Fig. 2 in the displayed map 1.In a preferred embodiment of the invention, coarse delay counter 22 includes input register 42, and it is a D type flip-flop (D-Flipflop), and its input end is electrically connected on and postpones to adjust state machine 20 to import the second inhibit signal S
2Its clock end is then imported second clock signal CLK
2, its output signal then is input to comparer 46, and coarse delay counter 22 also includes four bit counter 44, and its clock end is also imported second clock signal CLK
2, and its four output terminal all is electrically connected to comparer 46, and this coarse delay signal also inputs to comparer 46 simultaneously, and this coarse delay signal represents coarse delay counter 22 with second clock signal CLK
2Be unit, postpone the second inhibit signal S
2Amount, be the numeral of four bits at this.Last comparer 46 is the output signal of this coarse delay signal and this counter 44 relatively, and ability is with the second inhibit signal S when aforementioned the two value equates
2Via output register 48 (it also is a D type flip-flop) output, and this output signal is the first inhibit signal S
1It should be noted that under the situation that does not influence enforcement of the present invention counter 44 can also replace with shift register (Shift Register).
With reference to figure 3, the functional block diagram of the precise delay chain 18 among Fig. 3 in the displayed map 1.In a preferred embodiment of the invention, precise delay chain 18 includes the delay cell of a plurality of mutual series connection, and each delay cell then is in series mutually by a plurality of reversers 52, the first inhibit signal S
1Import the input end (that is input end of first reverser 52) of first delay cell, and the first inhibit signal S
1And the output terminal of each delay cell then all is electrically connected to each input end of multiplexer 54, this precise delay parameter is then in the selection input end of input multiplexer 54, it is unit with this schedule time that this precise delay parameter is represented precise delay chain 18, postpones the first inhibit signal S
1Amount.Last multiplexer 54 can be chosen through the signal after the delay units delay of right quantity according to this precise delay parameter, and this signal is exported from its output terminal, and this signal is this write signal S
W
As previously mentioned, owing to postpone to adjust state machine 20 according to second clock signal CLK
2Postpone this EFM waveform, the resolution that therefore postpones adjustment state machine 20 these EFM waveforms of delay is second clock signal CLK
2Cycle, the length of this EFM reference period just.Similarly, coarse delay counter 22 is with first clock signal clk
1For unit postpones this second inhibit signal S
2, so coarse delay counter 22 postpones this second inhibit signal S
2Resolution is first clock signal clk
1Cycle.Precise delay chain 18 is that unit postpones this first inhibit signal S with this schedule time then
1, so precise delay chain 18 postpones this first inhibit signal S
1Resolution be first clock signal clk
1Cycle.It should be noted that first clock signal clk in the present embodiment
1The choosing of output terminal of cycle, this schedule time and this delay cell in, can corresponding adjustment be arranged according to the needs of design, for instance, if first clock signal clk
1Cycle be 1/4 of this EFM reference period, and should be 1/32 of this EFM reference period the schedule time, then multiplexer 54 need be from the first inhibit signal S
1And choose one as this write signal in other seven signals after the delay units delay of varying number, the value of this coarse delay signal and this precise delay signal also needs to do corresponding setting simultaneously.
With only the optical recorder that postpones of usage counter is relatively in the known technology, high speed optical recorder while usage counter of the present invention and delay chain are finished the function of signal delay, not only can solve the problem of the lack of resolution that known technology faces when the height imprinting, and have the function that to support low speed imprinting and high speed imprinting simultaneously, have the downward compatibility of height.
The above only is the preferred embodiments of the present invention, and all equivalent variations and modifications of doing according to claim of the present invention all belong to the covering scope of patent of the present invention.
Claims (17)
1. high speed optical recorder, it is arranged in the optical storage, this high speed optical recorder produces the Writing power of write signal with the optical pickup apparatus of controlling this optical storage according to the run length limited code modulation waveform of input, and this high speed optical recorder includes:
Clock generator is used to produce first clock signal and second clock signal;
Adjust data storage cell, be stored with many group writing scheme parameters, and can from this writing scheme parameter, select and export one group of corresponding writing scheme parameter according to this eight to 14 modulation waveform, wherein should the representative of many group writing scheme parameters be used to drive the waveform character of the Writing power waveform of optical pickup apparatus;
The coarse delay device, be electrically connected on this clock generator to import this first clock signal, and be electrically connected on this adjustment data storage cell and organize corresponding writing scheme parameter to import this, this coarse delay device can be organized corresponding writing scheme parameter according to this and produce the precise delay parameter, simultaneously organize corresponding writing scheme parameter according to this first clock signal and this and postpone this eight to 14 modulation waveform to produce first inhibit signal, wherein the negative edge time point of first inhibit signal has adjustability; And
The precise delay chain, it is electrically connected on this coarse delay device to import this first inhibit signal and this precise delay parameter, this precise delay chain includes the delay cell of a plurality of mutual series connection, each this delay cell is used for this first inhibit signal delay scheduled time, this precise delay chain can postpone this first inhibit signal to produce this write signal according to this precise delay parameter
Wherein this coarse delay device includes:
Postpone to adjust state machine, be electrically connected on this clock generator to import this second clock signal, and be electrically connected on this adjustment data storage cell and organize corresponding writing scheme parameter to import this, this delay is adjusted state machine and can be organized corresponding writing scheme parameter according to this and produce coarse delay parameter and this precise delay parameter, organizes corresponding writing scheme parameter according to this second clock signal and this simultaneously and postpones this eight to 14 modulation waveform to produce second inhibit signal; And
Coarse delay counter or coarse delay shift register, be electrically connected on this clock generator to import this first clock signal, and being electrically connected on this delay adjustment state machine to import this coarse delay parameter and this second inhibit signal, this coarse delay counter can postpone this second inhibit signal to produce this first inhibit signal according to this first clock signal and this coarse delay parameter.
2. high speed optical recorder as claimed in claim 1, it also includes eight to 14 modulation input interfaces, it is imported this eight to 14 modulation waveform and produces address signal, and this eight to 14 modulation input interface is electrically connected to this adjustment data storage cell and this coarse delay device.
3. high speed optical recorder as claimed in claim 2, wherein this eight to 14 modulation input interface produces this address signal according to the information of the previous stripe surface in this eight to 14 modulation waveform, current pit area and back one land.
4. high speed optical recorder as claimed in claim 2, wherein this coarse delay device is imported this eight to 14 modulation waveform from this eight to 14 modulation input interface.
5. high speed optical recorder as claimed in claim 2, wherein this adjustment data storage cell is imported this address signal from this eight to 14 modulation input interface, and selects this to organize corresponding writing scheme parameter according to this address signal.
6. high speed optical recorder as claimed in claim 1, it also includes data storage interface is set, be electrically connected on this adjustment data storage cell, and the microprocessor that is electrically connected on this optical storage should many group writing scheme parameters be adjusted data storage cell to this with input and storage.
7. high speed optical recorder as claimed in claim 1, wherein this adjustment data storage cell is a volatile memory.
8. high speed optical recorder as claimed in claim 1, wherein this clock generator includes phase-locked loop and frequency divider, this phase-locked loop is used to produce this first clock signal, and this frequency divider then is used to import this first clock signal to produce this second clock signal.
9. high speed optical recorder as claimed in claim 1, wherein the cycle of this second clock signal equals the reference period of these eight to 14 modulation waveforms.
10. high speed optical recorder as claimed in claim 1, wherein the cycle of this second clock signal is the multiple in the cycle of this first clock signal.
11. high speed optical recorder as claimed in claim 1, wherein the cycle that resolution that state machine postpones these eight to 14 modulation waveforms equals this second clock signal is adjusted in this delay.
12. high speed optical recorder as claimed in claim 1, wherein this coarse delay counter includes input register, counter, comparer and output register.
13. high speed optical recorder as claimed in claim 1, wherein the resolution of this this second inhibit signal of coarse delay counter delay equals the cycle of this first clock signal.
14. high speed optical recorder as claimed in claim 1, these a plurality of delay cells reverser that is a plurality of mutual series connection wherein, and this precise delay chain also includes multiplexer, is used for selecting this write signal from the output signal of these a plurality of reversers.
15. high speed optical recorder as claimed in claim 1, wherein this precise delay chain resolution of postponing this first inhibit signal equals this schedule time.
16. high speed optical recorder as claimed in claim 15, wherein this schedule time equal this second clock signal cycle 1/32nd.
17. high speed optical recorder as claimed in claim 1, wherein this eight to 14 modulation waveform is by eight to the 14 modulating coders input of this optical storage.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 03104478 CN1282168C (en) | 2003-02-17 | 2003-02-17 | High speed optical recorder |
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| CN 03104478 CN1282168C (en) | 2003-02-17 | 2003-02-17 | High speed optical recorder |
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| CNB2006100923375A Division CN100437768C (en) | 2003-02-17 | 2003-02-17 | High speed optical recorder |
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| CN1282168C true CN1282168C (en) | 2006-10-25 |
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| US7006420B1 (en) * | 2005-02-17 | 2006-02-28 | Mediatek Incorporation | Method for tuning write strategy parameters of an optical storage device, and system thereof |
| US7778122B2 (en) * | 2005-05-18 | 2010-08-17 | Mediatek Incorporation | Methods for tuning write strategy parameters utilizing data-to-clock edge deviations, and systems thereof |
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