CN1276549A - Motherboard with indicator of initial state - Google Patents
Motherboard with indicator of initial state Download PDFInfo
- Publication number
- CN1276549A CN1276549A CN 99106974 CN99106974A CN1276549A CN 1276549 A CN1276549 A CN 1276549A CN 99106974 CN99106974 CN 99106974 CN 99106974 A CN99106974 A CN 99106974A CN 1276549 A CN1276549 A CN 1276549A
- Authority
- CN
- China
- Prior art keywords
- bus
- motherboard
- display
- signal
- storer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Debugging And Monitoring (AREA)
Abstract
A motherboard with display of initial state has bus, start program memory, socket, processor accessing the start program via bus and display plugged into socket and composed of indicator and position recognizer. When bus address is a particular position, the position recognizer can automatically start the indicator. When processor runs start program, the program can output information to particular position via bus. The position recognizer can recognize the particular position and start the indicator to display the information.
Description
The present invention relates to a kind of motherboard, particularly relate to a kind of motherboard with the display device that can show open state.
The motherboard specification that generally is used on the industrial computer has suitable difference with the motherboard specification that is used for personal computer, when therefore producing motherboard, adopt the test of motherboard and the mode of debug (debug) also can adopt the inequality of motherboard with personal computer for industrial computer.Test and remove and stagger the time when the motherboard that an industrial computer is adopted, motherboard must be inserted on the backboard of an industrial computer, and an external test card, could test motherboard.When the test result of this motherboard is wrong (bug) can't carry out normal boot-strap the time, just produce the deadlock phenomenon and be difficult to carry out debug.The tester can't know exactly also that usually that part of motherboard makes a mistake, and locates errors the part that takes place to carry out debug and must spend energetically with many time.Therefore, existing industrial computer bothers with the test and the debug work of motherboard very much, and inefficent.
The object of the present invention is to provide a kind of motherboard with the display device that can show open state, make the tester can be directly on this display device shown information learn that the state of processor is to test and debug.
The object of the present invention is achieved like this, and a kind of motherboard promptly is provided, and it includes: a bus is used for data signal and address signal; One storer is electrically connected on this bus, is used for storing a boot program; One socket is electrically connected on this bus; One display device is installed on this socket in pluggable mode, and it includes: a display is used for showing the data-signal of this bus; And a location indentifier, be used for discerning the address signal of this bus, wherein when the address signal of this bus was an ad-hoc location, this location indentifier can start this display so that it is shown the data-signal of this bus; And a processor, it can touch the boot program of getting in this storer via this bus when start; Wherein when this boot program was carried out by this processor, this boot program can export its information data to this ad-hoc location via this bus, and the location indentifier of this display device can identify this ad-hoc location and start this display to show this information data.
Below in conjunction with accompanying drawing, describe embodiments of the invention in detail, wherein:
Fig. 1 is the functional block diagram of motherboard of the present invention;
Fig. 2 one can plug the synoptic diagram of the display device on Fig. 1 motherboard;
Fig. 3 is the functional block diagram of Fig. 2 display device.
Please refer to Fig. 1.Fig. 1 is the functional block diagram of motherboard 10 of the present invention.Motherboard 10 includes a bus 12, is used for data signal and address signal, and a storer 14 is electrically connected on bus 12, is used for storing a boot program 16, one sockets 18, is electrically connected on bus 12, and a processor 20.Processor 20 can come boot program 16 in the access memory 14 by bus 12 in when start.Bus 12 is isa bus.Boot program 16 is a basic input/output procedure (Basic input/outputsystem-BIOS).Storer 14 is a flash memory (flash memory).
Please refer to Fig. 2 and Fig. 3.Fig. 2 one can plug the synoptic diagram of the display device 22 on Fig. 1 motherboard 10.Fig. 3 is the functional block diagram of Fig. 2 display device 22.Motherboard 10 includes a display device 22 in addition, is installed on the socket 18 in pluggable mode.Display device 22 includes a display 24, be used for the data-signal of show bus 12, one location indentifier 26, be used for the address signal of identification bus 12, one storer 28, be used for storing an identification code, and two digital display elements 30, be used for the data-signal of bus 12 is shown with several numerals.The storer 28 of display device 22 and display 24 are controlled by read-write (read/write) signal.
When processor 20 when carrying out boot program 16, whether boot program 16 can detect display device 22 earlier and be installed in 18 sockets.The address signal that identifies bus 12 when location indentifier 26 is an ad-hoc location, and a read-write of bus 12 is when importing (read) state, identification code in the storer 28 can be read into bus 12, makes boot program 16 learn that display device 22 has been installed in the socket 18 via reading this identification code and confirming.
When boot program 16 exports information data to this ad-hoc location via bus 12, location indentifier 26 can identify this ad-hoc location, and starts display 24 to show this information data.The address signal that identifies bus 12 when location indentifier 26 is this ad-hoc location, and a read-write of bus 12 is output during (write) state, and display 24 can show the data-signal of bus 12 with numeral.
Because display device 22 is to be positioned on the same bus 12 with the storer 14 that stores BIOS.When motherboard 10 starts, processor 20 can read BIOS via bus 12 to storer 14 and also be carried out.That is to say that as long as bus 12 can normally transmit data and address signal processor 20 reads via bus 12 and when carrying out BIOS, display device 22 just can show the data-signal that is transmitted in bus 12 with numeral.Therefore, the tester can be directly shown information is learnt processor 20 on the display device 22 state to test and debug, make the test of motherboard 10 and debug work have more efficient.
Motherboard 10 of the present invention includes display device 22, and display device 22 is to be electrically connected on the same bus 12 with the storer 14 that stores boot program 16.When boot program 16 is carried out by processor 20, boot program 16 can export its information data to an ad-hoc location via bus 12, and display device 22 can identify this ad-hoc location, and the data-signal that will be transmitted in bus 12 shows with numeral, so the tester can directly learn the executing state of processor 20 via display device 22 shown messages.The tester not only can know the test result in each stage immediately, but also can know exactly which partly makes a mistake, and makes the test of motherboard 10 and debug work have more efficient.
The above only is the preferred embodiments of the present invention, and all equalizations of doing by claim of the present invention change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (7)
1. motherboard, it includes:
One bus is used for data signal and address signal;
One storer is electrically connected on this bus, is used for storing a boot program;
One socket is electrically connected on this bus;
One display device is installed on this socket in pluggable mode, and it includes:
One display is used for showing the data-signal of this bus; And
One location indentifier is used for discerning the address signal of this bus, and wherein when the address signal of this bus was an ad-hoc location, this location indentifier can start this display so that it is shown the data-signal of this bus; And
One processor, it can touch the boot program of getting in this storer via this bus when start;
Wherein when this boot program was carried out by this processor, this boot program can export its information data to this ad-hoc location via this bus, and the location indentifier of this display device can identify this ad-hoc location and start this display to show this information data.
2. motherboard as claimed in claim 1, it is characterized in that, this display device includes a storer in addition, is used for storing an identification code, and whether this boot program can be installed in this socket with definite this display device via the identification code that this bus reads in this storer.
3. motherboard as claimed in claim 2, it is characterized in that, the storer of this display device and display are controlled by read-write (read/write) signal of this location indentifier and this bus, the address signal that identifies this bus when this location indentifier is for a read-write of this ad-hoc location and this bus during for output (write) state, this display can show the data-signal of this bus, and the address signal that identifies this bus when this location indentifier is for a read-write of this ad-hoc location and this bus during for input (read) state, and the identification code in this storer can be read into this bus.
4. motherboard as claimed in claim 1, wherein this bus is an isa bus.
5. motherboard as claimed in claim 1, wherein this boot program be a basic input/output procedure (Basic input/output system, BIOS).
6. motherboard as claimed in claim 1, the storer that wherein is used for storing this boot program is a flash memory (flash memory).
7. motherboard as claimed in claim 1, wherein this display includes several digital display element spares, is used for the data-signal of this bus is shown with several numerals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 99106974 CN1130612C (en) | 1999-06-03 | 1999-06-03 | Motherboard with indicator of initial state |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 99106974 CN1130612C (en) | 1999-06-03 | 1999-06-03 | Motherboard with indicator of initial state |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1276549A true CN1276549A (en) | 2000-12-13 |
CN1130612C CN1130612C (en) | 2003-12-10 |
Family
ID=5272593
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 99106974 Expired - Fee Related CN1130612C (en) | 1999-06-03 | 1999-06-03 | Motherboard with indicator of initial state |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1130612C (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101226510B (en) * | 2007-01-18 | 2010-04-14 | 华硕电脑股份有限公司 | Computer equipment and host equipment thereof as well as build-up flash memory device thereof |
CN101667111B (en) * | 2009-09-28 | 2011-12-21 | 明基电通有限公司 | Display device and control method thereof |
-
1999
- 1999-06-03 CN CN 99106974 patent/CN1130612C/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101226510B (en) * | 2007-01-18 | 2010-04-14 | 华硕电脑股份有限公司 | Computer equipment and host equipment thereof as well as build-up flash memory device thereof |
CN101667111B (en) * | 2009-09-28 | 2011-12-21 | 明基电通有限公司 | Display device and control method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN1130612C (en) | 2003-12-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100281525B1 (en) | Computer system with automatic detection | |
CN114003538B (en) | Identification method of intelligent network card and intelligent network card | |
US20070168738A1 (en) | Power-on error detection system and method | |
US6519698B1 (en) | Method for saving system configuration information to shorten computer system initialization time by checking the state of a chassis intrusion detection circuit | |
US6434697B1 (en) | Apparatus for savings system configuration information to shorten computer system initialization time | |
CN110865909B (en) | EMMC interface testing device and method based on FPGA | |
US20070220228A1 (en) | Computer memory configuration inspection method and system | |
CN102395980A (en) | Smart card reader | |
KR100921852B1 (en) | Electronic apparatus, information processing apparatus, adapter apparatus, and information exchange system | |
CN101620580B (en) | Computer system and control method of the same | |
US7747909B2 (en) | Debug card | |
US6904484B1 (en) | Low pin count (LPC) firmware hub recovery | |
CN101739322A (en) | Test device and method of embedded system | |
CN1130612C (en) | Motherboard with indicator of initial state | |
CN101354673B (en) | SPD chip error information simulation apparatus of memory | |
US20050092846A1 (en) | Simulated smartmedia/XD-picture memory card capable of using various kinds on non-volatile memory | |
CN109117299A (en) | The error detecting device and its debugging method of server | |
US6948057B2 (en) | Memory modules storing therein boot codes and method and device for locating same | |
CN111857785A (en) | MCU starting method and device and terminal equipment | |
CN107341064B (en) | Anti-misplug system based on sub circuit board of vehicle variable flow control unit | |
CN101261574A (en) | Sound data processing apparatus | |
CN101118512A (en) | Quickflashing storing card test apparatus with multiple interface | |
CN110209433B (en) | Method for identifying concentrators of different models | |
CN113312224A (en) | MCU for testing OTP type and testing method thereof | |
US20080147966A1 (en) | Flash memory device, update method and program search method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |