CN1275175C - Method for modularizing integrated circuit of DRAM unit - Google Patents
Method for modularizing integrated circuit of DRAM unit Download PDFInfo
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- CN1275175C CN1275175C CN 01109535 CN01109535A CN1275175C CN 1275175 C CN1275175 C CN 1275175C CN 01109535 CN01109535 CN 01109535 CN 01109535 A CN01109535 A CN 01109535A CN 1275175 C CN1275175 C CN 1275175C
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Abstract
The present invention comprises a method and an apparatus of the performance of an integrated circuit which comprises at least one unit of a plurality of deep trench dynamic random access memory (DRAM) units. The method comprises: a circuit simulator is executed so as to be used for designing the integrated circuit of at least one unit of a plurality of deep trench dynamic random access memory (DRAM) units; furthermore, the circuit simulator is used for calculating a set of output parameters of each DRAM unit, for example, a deep trench DRAM unit model is used as each DRAM unit.
Description
The invention relates to a kind of design and production integrated circuit (IC) system and method, and particularly relevant for a kind of integrated circuit that comprises a unit of several deep-well raceway groove dynamic randon access device (DRAM) unit at least, with the method and apparatus of the performance that determines this integrated circuit.
Because modern integrated circuit is constituted by surpassing 1,000,000 transistors, in order to design complicated integrated circuit (IC) system and method is design and the necessary part of producing the technology of integrated circuit, do not have so System and method for, the design of integrated circuit will be that price is expensive in the extreme with producing.
For designing integrated circuit, be to propose circuit diagram based on the functional description of integrated circuit and the first step of specification.Generally, the characteristic of counting circuit figure is to use the auxiliary of circuit emulator (CircuitSimulator), the ifs circuit emulator determines that circuit diagram can not satisfy functional description and specification, can make amendment to circuit diagram, and again calculate the characteristic of the circuit diagram of being revised by circuit emulator, the circuit of revising with emulation is till the characteristic of circuit diagram satisfies functional description and specification.The manufacture process of a circuit layout is based on the circuit diagram existence and has an acceptable circuit diagram, and use light shield (mask) in circuit layout is to be used in the most substantially to produce and the manufacturing integrated circuit.
According to traditional method, using the auxiliary circuit emulator of electronic package model to be included in the characteristic (as circuit quantity) of the electronic package in the integrated circuit with calculating corresponding to the associated of functional description and specification, for example, transistor (Transistor) model provides relevant circuit parameter with as the transistorized end points in integrated circuit (as source electrode, drain, gate and base stage), the quality of transistor model has determined the characteristic that calculates by circuit emulator, with the matching degree along with the actual operation characteristic of the integrated circuit of making.
For example numerous circuit emulator (being also referred to as circuit emulation program (CircuitEmulation Programs)) exists and comprises SPICE, ELDO, SMASH, SABER, VERILOG and VHDL, SPICE (simulated program is emphasized the imitation at circuit) in University of California at Berkeley development is the integrated circuit emulation program, it imitates the running of single circuit unit (as transistor), SPICE also can be used for imitating one or more transistorized runnings in circuit, and many instigator SPICE that sell have commercial exploitation value (as HSPICE, PSPICE).
VERILOG or VHDL are hardware description language (Hardware DescriptionLanguage), and it can be used in the integrated circuit (IC) design that is described in the accurate position of logic.By CadenceDesign Systems, Inc., of San Jose, California, the VERILOG-XL of proposition is a software program, the circuit performance that its emulation uses the VERILOG hardware description language to describe.VERILOG-XL can carry out many functions, for example wherein a kind of function is to calculate the transmission delay that is produced by continuous door (Gate), and the VERILOG-XL program can be calculated so transmission delay and utilize the delay data to remove to calculate the whole transmission delay of independent unit or integral unit.Similarly, speed and the noise that simulated program also can simulation unit referred in this.
In circuit emulator as SPICE or VERILOG, be included in each electronic package in the integrated circuit with model representation, so model must be able to represent that static (promptly at a slow speed) change and dynamic (fast promptly) change and to the influence of integrated circuit.Before making, from accurate circuit simulation, still can't help the design of many dynamic randon access devices (DRAM) so far, because do not have precise analytic model for deep trench (deep-trench) DRAM unit.Being shown as model for psophometer also is a stubborn problem (as interfering with each other between adjacent assembly).
Deep trench DRAM unit is a logic module, the traditional insulation material of its unit by using is to provide enough cell capacitance, further, when relatively relevant assembly, then deep trench DRAM unit provides littler crystal grain (Die) size and wideer error rate (error rate) for known arrangement.
Therefore, in integrated circuit, the easier permission in deep trench DRAM unit and other assembly are integrated, and when relatively more relevant assembly, littler crystallite dimension are arranged, and then deep trench DRAM unit also allows to have the design of high cell density.
Therefore the present invention system provides a kind of as design and the method and apparatus of making integrated circuit, this integrated circuit comprises a unit of several deep trench dynamic randon access device (DRAM) unit at least, and its method and apparatus eliminates one or more widely because the restriction of correlation technique and the problem that shortcoming caused.
Feature that the present invention increased and advantage are with following description, and the part of its feature and advantage can be learnt by embodiments of the invention, can realize and obtain object and advantage of the present invention by instrument and its combination in appended applying for a patent.
In order to finish these advantages and other advantage and to describe widely to specialize also according to purpose of the present invention, system provides a kind of method of modularizing integrated circuit, its method comprises carries out a circuit emulator to design an integrated circuit, and wherein this integrated circuit comprises a unit of a plurality of at least deep trench DRAM unit.And, use this circuit emulator to calculate one group of output parameter of each unit of these deep trench DRAM unit, wherein calculate this group output parameter and comprise that more this deep trench of use DRAM model of element is with each unit as these deep trench DRAM unit, and this group output parameter can be used for to integrated circuit the function that may design describe, and can be in order to make deep trench DRAM unit.
An alternative embodiment of the invention, system provides a kind of device of modularizing integrated circuit, its device comprises that wherein this integrated circuit comprises a unit of a plurality of at least deep trench DRAM unit as carrying out a circuit emulator to design the device of an integrated circuit.And, as the one group of output parameter that uses this circuit emulator with each unit of calculating these deep trench DRAM unit, wherein calculate this group output parameter and comprise that more deep trench DRAM model of element of use is with each unit as these deep trench DRAM unit, and this group output parameter can be used for to integrated circuit the function that may design describe, and can be in order to make deep trench DRAM unit.
The present invention still has another embodiment, system provides a kind of computer program to comprise the computer fetch medium with computer readable code, when computing machine is carried out, to make computing machine go modularization to have the integrated circuit of a unit of a plurality of at least deep trench DRAM unit, comprise and be listed in the computer-readable medium that moves as generation in the computing machine down: as carrying out a circuit emulator to design the program code of an integrated circuit, wherein this integrated circuit comprises a unit of these deep trench DRAM unit at least.And, as the program code that uses this circuit emulator with one group of output parameter of each unit of calculating these deep trench DRAM unit, the program code that wherein calculates this group output parameter more comprises and uses a deep trench DRAM model of element with each unit as these deep trench DRAM unit.
The description of front versatility and the explanation of ensuing embodiment only are in order to understand purpose of the present invention and advantage, are not to be used for limiting protection scope of the present invention.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below:
The drawing explanation:
Fig. 1 is for using the system block diagrams of deep trench DRAM model of element as modularizing integrated circuit;
Fig. 2 is the example flow chart of use deep trench DRAM model of element of the present invention as modularizing integrated circuit;
Fig. 3 is use deep trench DRAM model of element figure of the present invention;
Fig. 4 is that the rank, circuit position of the deep trench DRAM unit in deep trench DRAM model of element interact;
Fig. 5 is the memory array layout for deep trench DRAM; And
Fig. 6 is that of the present invention another uses the example flow chart of deep trench DRAM model of element as modularizing integrated circuit.
Description of reference numerals:
100: system (system)
105: load module (input module)
120: data processor (data processor)
130: output module (output module)
135: display (display)
136: printer (printer)
138: network interface (network interface)
150: storage module (storage module)
Embodiment
Reference will be described in an embodiment of the present invention, and illustrate with accompanying drawing, yet only possibly, represent with same or analogous as a reference part to use identical numeral at all icons.
Generally speaking, The present invention be directed to a kind of method and apparatus to comprise the integrated circuit of a unit of several deep trench (deep-well trench) DRAM unit at least as design and manufacturing, further, according to embodiments of the invention, use one group of input parameter, a circuit emulator and a deep trench DRAM unit etc. to obtain one group of output parameter.
As the icon of Fig. 1, in general block diagram form, the step of system's 100 energy execution module integrated circuit of demonstration, and this integrated circuit comprises a unit of several deep trench DRAM unit at least.As shown in Figure 1, system 100 comprises load module 105, data processor 120, storage module 150 and output module 130.Output module 130 comprises display 135, printer 136, network interface 138, and/or other output subsystem is as further design data is checked in processing and/or conduct.Data processor 120 receives one group of input parameter from load module 105 may be as the design of integrated circuit with regulation, 120 of data processors utilize this group input parameter with as the model of deep trench DRAM unit etc. with the executive circuit emulator, data processor 120 forms this group output parameter may be as the performance of integrated circuit with regulation, and this integrated circuit comprises a unit of several deep trench DRAM unit at least.If this design is acceptable, then data processor 120 provides the output module 130 with one group of output parameter to watch at display 135, printer 136, and/or is transmitted by network interface 138; If this design is unacceptable, then load module 105 provides corresponding to the input parameter of another design with as carry out data processing by circuit emulator in data processor 120.
The load module 105 of Fig. 1 can be that the instrument with multiple assembly removes to receive one group of input parameter and provides this group input parameter to data processor 120, for example, wherein these assemblies comprise Network Interface Module, modulator-demodular unit, keyboard, mouse and input storage assembly (above-described assembly does not illustrate).Fig. 1 single data processor 120 of icon only for system 100, but the function that is to use one group of data processor to remove to carry out the designed integrated circuit that goes out is possible, and this integrated circuit is to adopt deep trench DRAM unit.Data processor module 120 can comprise one or more extra members, for example: CPU (central processing unit) (CentralProcessing Unit), coprocessor (Co-processor), internal memory, buffer (Register) and other suitable data handling component and system.The storage module 150 of Fig. 1 can store deep trench DRAM model of element, at the during the design of integrated circuit to use its model, and this integrated circuit comprises a unit of several deep trench DRAM unit at least, storage module 150 can comprise various members and subsystem, for example comprise: hard drives (HardDrive), CD-ROM drive (Optical Drive), general storage assembly (General Purpose StorageDevice), can wipe storage assembly (Removable Storage Device), and/or other can store the assembly of deep trench DRAM model of element.Moreover though storage module 150 is separately and is independent of data processor 120 in Fig. 1, storage module and data processor can be as the parts (part) of single platform (platform) or system.
In the system 100 of Fig. 1, use output module 130 to export or watch this group output parameter, its output parameter is that the integrated circuit function that possible design is done description, and this integrated circuit is to adopt deep trench DRAM unit.Output module 130 can provide various systems, subsystem and assembly, for example comprise display 135, printer 136 and network interface 138, in addition, output module 130 can also comprise that other system, subsystem, second generation processor and assembly (not illustrating) are to provide the ability of output, as cathode-ray tube (CRT) (CathodeRay Tube), LCD (Liquid Crystal Display) or storage assembly.Moreover, one of them of the function of system 100 and/or above-mentioned module, assembly, member or invention all can be included in the combination of any suitable hardware, software and software and hardware, and can comprise as the system that separates individually or be incorporated in other assembly to form the assembly or the system of combination.
Fig. 2 is the example flow chart of use deep trench DRAM model of element of the present invention as modularizing integrated circuit.With reference to figure 2, the input parameter that user (as slip-stick artist, designer or integrated circuit (IC) design teacher) utilizes load module 105 (as keyboard) to be provided goes to begin to carry out the step that (S205) is relevant to modularizing integrated circuit, the design of the integrated circuit that its input parameter definition is possible, and this integrated circuit is to adopt deep trench DRAM unit.Load module 105 provides one group of input parameter to data processor 120, the design of the integrated circuit that its input parameter definition is possible, and this integrated circuit is to adopt deep trench DRAM unit (S210).This group input parameter is arranged, data processor 120 designs comprise a unit (S220) of several deep trench DRAM unit at least, utilize the deep trench DRAM model of element (S240) that is stored in storage module 150 to obtain one group of output parameter as deep trench DRAM unit with executive circuit emulator (S230).If this organizes most promising output parameter is acceptable (S250), then data processor 120 provide this group output parameter to output module 130 with the demonstration of carrying out display 135, the printing of printer 136 or the transmission of network interface 138.If this group output parameter is unacceptable (S250), then data processor 120 is at the design repeating step S220-S250 of another integrated circuit, and this integrated circuit is to adopt deep trench DRAM unit.Better, when this group output parameter is acceptable by decision and the data that suitable manufacturing comprises a unit of several deep trench DRAM unit at least is provided (S260), then finish to be relevant to the step (S270) of modularizing integrated circuit.
Begin to be relevant to the step (S205) of modularizing integrated circuit, the input parameter that the user utilizes load module 105 (as keyboard) to be provided goes to begin to carry out the step that (S205) is relevant to modularizing integrated circuit, the design of the integrated circuit that its input parameter definition is possible, and this integrated circuit is to adopt deep trench DRAM unit.With regard to the example that this does not limit, the user can use keyboard (not illustrating) to remove to provide this group input parameter, though user's input parameter of utilizing load module 105 (as keyboard) to be provided goes to begin to carry out the step that (S205) is relevant to modularizing integrated circuit in the present embodiment, yet processor also can begin to carry out the step that (S205) is relevant to modularizing integrated circuit.
Comprise the integrated circuit (S210) of a unit of several deep trench DRAM unit at least in order to define, load module 105 provides one group of input parameter to data processor 120, the design of the integrated circuit that its input parameter definition is possible, and this integrated circuit is to adopt deep trench DRAM unit (S210).In the present embodiment, these input parameters can be predetermined or be predetermined by previous program or the program of carrying out of circuit emulator by the user, with regard to the example that this does not limit, input parameter comprises the design of the data of (electrical) of (physical), program (process), electricity of how different function (functional), performance (performance), physics and environment corresponding to possible integrated circuit, and this integrated circuit comprises several deep trench DRAM unit at least.For example, this group input parameter can comprise following listed one or more: grid oxic horizon width (gate oxide thickness) (t
Ox), maximum supply voltage (V
Dd), the kind of grid material, substrate doping content (substrate dopingconcentration) (N
B), source/drain meets face thickness (source/drain junctiondepth) (N
S, N
D), connect face doping content (junction doping concentration) and operating temperature (T).With regard to the example that this does not limit, for example the input parameter in this group demonstration comprises:
V
Dd=2.5volts, n
+Polysilicon gate, N
B=3 * 10
17Atoms/cm
3(p well), N
S=N
D=10
19And T=85 ° of Fahrenheit temperature.
This group input parameter is arranged, then data processor 120 designs the integrated circuit of several deep trench DRAM unit (S220) at least, comprise the integrated circuit of a unit (S220) of several deep trench DRAM unit at least in order to design, data processor 120 executive circuit emulators (S230), circuit emulator can be formed various emulator, for example comprises SPICE, HSPICE, ELDO, SMASH, SABER, VERILOG or VHDL.Data processor 120 provides this group input parameter to circuit emulator, and data processor 120 acquisitions are stored in the deep trench DRAM model of element (S240) of storage module 150.When circuit emulator calculates this group during output parameter, then this group input parameter of being given of deep trench DRAM model of element has limited this group output parameter.This group output parameter provides about comprising the dynamic and/or static data of the performance of the integrated circuit of a unit of several deep trench DRAM unit at least, moreover, this dynamically reaches static data can comprise speed or noise (for example interfering with each other from adjacent unit) data, and its data is immediate current and the dc operation about deep trench DRAM unit.
Fig. 3 illustrates use deep trench DRAM model of element figure of the present invention.With reference to figure 3, definition deep trench DRAM model of element is electrically connected forming of member by one group, for example comprises source resistance (source resistance) (R
S), drain resistance (R
d), borderless contact window (borderless contact) (R
CB), flush type band shape (buried strap) resistance (R
BS), deep trench resistance (R
DT), deep trench electric capacity (capacitance) (C
DT) and coupling capacitance (C
GC).Be connected to the coupling capacitance (C of the adjacent character line (word line) (as terminal A) of deep trench electric capacity
GC) for example show by as the caused noise of coupling effect that disturbs etc., deep trench DRAM model of element allow the user to go to design to comprise the integrated circuit of a unit of several deep trench DRAM unit at least and determine one group of output parameter describe to comprise a unit of several deep trench DRAM unit at least integrated circuit dynamically and static properties.With regard to the example that this does not limit, deep trench DRAM model of element allows the user to go modularization or emulation to comprise the speed of the universal integrated circuit of a unit of several deep trench DRAM unit (as writing speed and/or reading speed) at least.Moreover its model allows the user to go modularization or emulation by the adjacent noise that the unit caused in deep trench DRAM unit.Next, embodiments of the invention provide the method and apparatus of a novelty to comprise the integrated circuit of a unit of several deep trench DRAM unit at least as design.And deep trench DRAM model of element as shown in Figure 3 provides the representation of the performance of more accurate actual integrated circuit, and this integrated circuit is last manufacturing and assembling.
Fig. 4 illustrates in deep trench DRAM model of element rank, position, unit between deep trench DRAM unit interact (for example by adjacent unit as the noise that coupling caused as disturbing).With reference to figure 3 and Fig. 4, each DRAM unit of Fig. 4 is corresponding to the deep trench DRAM model of element of Fig. 3, and each DRAM unit is marked in Fig. 4 " A ", " B " reach " C " all individually corresponding among Fig. 3 " A ", " B " reach " C ".Fig. 4 icon terminal A and terminal B be connected to different writing lines (write line, WL) and end points C be connected to bit line (bit line, BL) because terminal A is connected to coupling capacitance (as the C of Fig. 3
GC), so embodiments of the invention allow the user to go modularization or emulation by the noise that coupling effect caused as interference.
Fig. 5 illustrates the memory array layout for deep trench DRAM.With reference to figure 5, Fig. 5 specifies several bit lines (as bit line 510), several deep trench capacitors (as deep trench capacitor 520), several character lines (as character line 530) and several borderless contact windows (as borderless contact window 540).With reference to figure 4 and Fig. 5, character line 530 is the writing lines (WL) and bit line (BL) that are similar to Fig. 4 with bit line 510.
Refer again to Fig. 2, if levy the output parameter of selecting is acceptable (S250), then data processor 120 provide this group input parameter and/or this group output parameter to output module 130 with the demonstration of carrying out display 135, the printing of printer 136 or the transmission of network interface 138.In order to determine whether this group output parameter is acceptable (S250), data processor 120 compares this group output parameter with the one group of standard that is predetermined, with regard to the example that this does not limit, data processor 120 can be organized this output parameter and compare with one group of standard being predetermined, its standard can comprise the scope that can accept numerical value with as a unit that comprises several deep trench DRAM unit at least dynamically with the performance (as the noise and the speed of deep trench DRAM unit) of static state.In addition, if this group output parameter is to accept (S250), then this group output parameter and input parameter herein provide suitable data to comprise a unit of several deep trench DRAM unit at least as manufacturing (S260).
If levy the output parameter of selecting is unacceptable (S250), from then on data processor 120 repeating step S220-S250 then for example organize and change in the input parameter at least that one of them parameter (connecing face thickness as changing source/drain) comprises the integrated circuit of a unit of several deep trench DRAM unit at least as design.With regard to the example that this does not limit, if this group output parameter comprises the scope that has surpassed the acceptable noise value of first decision as the noise figure of deep trench DRAM unit, then data processor 120 (or user) changes wherein in can this group input parameter that at least one parameter produces another design (S220).After changing at least one input parameter, data processor 120 utilizes the deep trench DRAM model of element (S240) that is stored in storage module 150 to come executive circuit emulator (S230) to determine another group output parameter, and whether this design of 120 decisions of data processor can accept (S250).If at present this group output parameter be acceptable, then data processor 120 provide this group output parameter to output module 130 with the demonstration of carrying out display 135, the printing of printer 136 or the transmission of network interface 138; If this group output parameter is still unacceptablely at present, data processor repeating step S220-S250 is till determining one group of acceptable output parameter.Better, when this group output parameter is acceptable by decision and the data that suitable manufacturing comprises a unit of several deep trench DRAM unit at least is provided (S260), then finish to be relevant to the step (S270) of modularizing integrated circuit.
Fig. 6 is the example flow chart of use deep trench DRAM model of element of the present invention as modularizing integrated circuit.Explanation as Fig. 6, comprise the integrated circuit of a unit of several deep trench DRAM unit at least in order to design, the user is (as the slip-stick artist, designer or integrated circuit (IC) design teacher) utilize load module 105 (as keyboard) to remove to enable or carry out circuit emulator (S610) at data processor 120, in case enable circuit emulator, data processor 120 captures deep trench DRAM model of element (S630) from load module one group of input parameter of 105 acquisitions and from the model database that is stored in storage module 150, and data processor 120 uses circuit emulators, this group input parameter and deep trench DRAM model of element calculate this group output parameter (S640).If this group output parameter be acceptable (S650), then data processor 120 provide this group output parameter (S660) to output module 130 with the demonstration of carrying out display 135, the printing of printer 136 and the transmission of network interface 138; If levying this group output parameter of choosing is unacceptable (S650), then data processor 120 comes repeating step S620-S650 at another group input parameter, and its input parameter is to comprise the design of the integrated circuit of a unit of several deep trench DRAM unit at least corresponding to another.Better, determining one group of acceptable output parameter (S650) and data processor 120 these group output parameters (S660) to output module 130, then finish to be relevant to the step (S670) of modularizing integrated circuit.
In order to enable circuit emulator, the user utilizes load module 105 to remove to enable or carry out circuit emulator (S610) in data processor 120.With regard to the example that this does not limit, the user can use keyboard to remove to enable circuit emulator (as SPICE, HSPICE, PSPICE, ELDO, VHDL, SMASH, SABER or VERILOG) and design and comprise the integrated circuit of several deep trench DRAM unit at least, though be to enable circuit emulator in the present embodiment, yet processor also is to enable circuit emulator (S610) by the user.
In order to capture this group input parameter (S620), data processor is from this group input parameter of load module 105 acquisition, and load module 105 can comprise keyboard (not illustrating), input storage assembly (not illustrating) or anyly can provide this group input parameter other input module to data processor 120.This group input parameter is to define to comprise the integrated circuit of a unit of several deep trench DRAM unit at least, and better, this group input parameter is to be predetermined and to be stored in an input storage assembly.With regard to the example that this does not limit, input parameter comprise how different functions, performance, physics, processing procedure, data electricity and environment, so data is to define to comprise the integrated circuit of several deep trench DRAM unit at least, for example, this group input parameter can comprise following listed one or more: grid oxic horizon width (t
Ox), maximum supply voltage (V
Dd), the kind of grid material, substrate doping content (N
B), source/drain meets face thickness (N
S, N
D), connect face doping content and operating temperature (T).
In order to capture deep trench DRAM model of element (S630), data processor 120 is model database acquisition deep trench DRAM model of element from be stored in storage module 150, refer again to Fig. 3, definition deep trench DRAM model of element is electrically connected forming of member by one group, for example comprises source resistance (R
S), drain resistance (R
d), borderless contact window (R
CB), flush type ribbon resistance (R
BS), deep trench resistance (R
DT), deep trench electric capacity (C
DT) and coupling capacitance (C
GC).Refer again to Fig. 4, the rank, position, unit that Fig. 4 illustrates the deep trench DRAM unit in deep trench DRAM model of element interact (for example by adjacent unit as the noise that coupling caused as disturbing), with regard to the example that this does not limit, deep trench DRAM model of element (as shown in Figure 3 and Figure 4) allows the user to go modularization or emulation to comprise the speed of the universal integrated circuit of a unit of several deep trench DRAM unit (for example writing speed and/or reading speed) at least and/or the noise interference or the coupling of adjacent unit (for example by).Next, embodiments of the invention provide the method and apparatus of a novelty to comprise the integrated circuit of a unit of several deep trench DRAM unit at least as design.
Refer again to Fig. 6, data processor 120 utilizes circuit emulator, this group input parameter and deep trench DRAM model of element etc. to remove to calculate this group output parameter (S640), circuit emulator can be formed with different emulators, for example comprise SPICE, HSPICE, PSPICE, ELDO, VHDL, SMASH, SABER or VERILOG, when circuit emulator calculates this group during output parameter, then this group input parameter of being given of deep trench DRAM model of element has limited this group output parameter.This group output parameter provides about comprising the dynamic and/or static data of the performance of the integrated circuit of a unit of several deep trench DRAM unit at least, moreover this dynamically reaches static data can comprise that speed or noise (for example interfering with each other from adjacent unit) etc. are associated with the immediate current and the dc operation of deep trench DRAM unit.
If the choosing of levying this group output parameter be acceptable (S650), then data processor 120 provide this group output parameter (S660) to output module 130 with the demonstration of carrying out display 135, the printing of printer 136 or the transmission of network interface 138.In order to determine whether this group output parameter is acceptable, data processor 120 compares this group output parameter with the one group of standard that is predetermined, with regard to the example that this does not limit, the standard that this group is predetermined can comprise the scope that can accept numerical value with as a unit that comprises several deep trench DRAM unit at least dynamically with static performance (for example noise of deep trench DRAM unit and the speed that writes/read).Better, on (case-by-case) basis of individual treated piecemeal, making change as the special value of this group standard that is predetermined is to depend on specific design, if this group output parameter is acceptable, then this group output parameter provides the indication of performance of integrated circuits to do at last to make.
If levying this group output parameter of choosing is unacceptable (S650), then data processor 120 comes repeating step S620-S650 at another group input parameter, and its input parameter is to comprise the design of the integrated circuit of a unit of several deep trench DRAM unit at least corresponding to another.After coming repeating step S620-S650 at another group input parameter, if corresponding this group output parameter is acceptable (S650), then data processor 120 provide this group output parameter (S660) to output module 130 to show 135, to print 136 or transmit 138; If this group output parameter remains unacceptable (S650), then data processor 120 repeating step S620-S650.Better, provide acceptable (S650) that determined this group output parameter (S660) to output module 130, then finish to be relevant to the step (S670) of modularizing integrated circuit at data processor 120.
Therefore, the present invention system is at comprising that the integrated circuit of a unit of several deep trench DRAM unit provides novel apparatus and method at least.
In sum, though the present invention discloses as above with preferred embodiment, so it is not in order to limit the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention, when can making various improvement and modification, so protection scope of the present invention is when being as the criterion with claims.
Claims (20)
1. the method for a modularizing integrated circuit is characterized in that: comprising:
One circuit emulator that comprises a deep trench DRAM model of element is provided, and wherein this model of element comprises: 1st, the 2nd, the 3rd end points, a transistor comprises source resistance R
S, drain resistance R
D, and this transistorized grid is connected in the 2nd end points, and is series at R
SAnd the coupling capacitance C between the 1st end points
GC, one be series at R
DAnd the borderless contact window R between the 3rd end points
CB, and a deep trench electric capacity, this deep trench is capacitively coupled to this R
SWith this C
GCBetween a node and earth terminal between, and with a deep trench capacitance C
DTAn and deep trench resistance value R
DTCombination represent;
Carry out this circuit emulator to design an integrated circuit, wherein this integrated circuit comprises a unit of a plurality of at least deep trench DRAM unit; And
Use this circuit emulator to calculate one group of output parameter of each unit of these deep trench DRAM unit, wherein calculate this group output parameter and more comprise this deep trench of use DRAM model of element each unit with these deep trench of emulation DRAM unit, and this group output parameter can be used for the function that integrated circuit can be designed is described, and can be in order to make deep trench DRAM unit.
2. the method for claim 1 is characterized in that: more comprise provide representative at least this group output parameter of a unit of these deep trench DRAM unit come as an output.
3. the method for claim 1 is characterized in that: more comprise according to this group output parameter to make this integrated circuit.
4. the method for claim 1 is characterized in that: wherein this calculating more comprises this group output parameter representative of definition performance data of this integrated circuit of a unit of these deep trench DRAM unit at least.
5. method as claimed in claim 4 is characterized in that: wherein this definition comprises that more definition performance data is to comprise static and dynamic information.
6. method as claimed in claim 5 is characterized in that: wherein this definition more comprise definition static with information dynamically be comprise the noise information of corresponding interference between adjacent DRAM unit.
7. the method for claim 1 is characterized in that: wherein this calculating more comprises this group output parameter representative of definition performance data of a unit of these deep trench DRAM unit at least.
8. the method for claim 1 is characterized in that: wherein this calculating more comprises and uses SPICE as this circuit emulator.
9. the method for claim 1 is characterized in that, wherein this deep trench capacitance meter is shown: R
DT/ 2 and C
DT/ 2 series combination is again with C
DT/ 2 form combination in parallel, and with one be connected in C
GCWith R
SBetween any R
DT/ 2 combinations that form series combination are represented.
10. the method for claim 1 is characterized in that, wherein this deep trench DRAM model of element more comprises a flush type band electrode R
BS, this R
BSBe connected in this R
SAnd between this deep trench electric capacity.
11. the device of a modularizing integrated circuit is characterized in that: comprise at least:
One data processor, wherein this data processor is carried out a circuit emulator to design an integrated circuit, and wherein this integrated circuit comprises a unit of a plurality of at least deep trench DRAM unit; And
This data processor further uses the one group output parameter of this circuit emulator with each unit of calculating these deep trench DRAM unit, and this group output parameter can be used for the function that integrated circuit can be designed is described, and can be in order to make deep trench DRAM unit, wherein calculate this group output parameter and comprise that more use one deep trench DRAM model of element is with each unit as these deep trench DRAM unit, wherein this model of element comprises: 1st, the 2nd, the 3rd end points, a transistor comprises source resistance R
S, drain resistance R
D, and this transistorized grid is connected in the 2nd end points, and is series at R
SAnd the coupling capacitance C between the 1st end points
GC, one be series at R
DAnd the borderless contact window R between the 3rd end points
CB, and a deep trench electric capacity, this deep trench is capacitively coupled to this R
SWith this C
GCBetween a node and earth terminal between, and with a deep trench capacitance C
DTAn and deep trench resistance value R
DTCombination represent.
12. device as claimed in claim 11 is characterized in that: more comprise output unit be in order to provide representative at least this group output parameter of a unit of these deep trench DRAM unit as an output.
13. device as claimed in claim 11 is characterized in that: comprise that more this data processor can calculate and export this group output parameter to make this integrated circuit.
14. device as claimed in claim 11 is characterized in that: wherein this data processor more comprises and can calculate the performance data of this integrated circuit calculating representative at least behind this group output parameter of a unit of these deep trench DRAM unit.
15. device as claimed in claim 14 is characterized in that: wherein this data processor comprises that more definition performance data is to comprise static and dynamic information.
16. device as claimed in claim 15 is characterized in that: wherein this data processor more comprise definition static with information dynamically be comprise the noise information of corresponding interference between adjacent DRAM unit.
17. device as claimed in claim 11 is characterized in that: wherein this calculating more comprises this group output parameter representative of definition performance data of a unit of these deep trench DRAM unit at least.
18. device as claimed in claim 11 is characterized in that: wherein this data processor comprises that more use SPICE is as this circuit emulator.
19. device as claimed in claim 11, wherein this deep trench capacitance meter is shown: R
DT/ 2 and C
DT/ 2 series combination is again with C
DT/ 2 form combination in parallel, and with one be connected in C
GCWith R
SBetween any R
DT/ 2 combinations that form series combination are represented.
20. as the described device of claim I1, wherein this deep trench DRAM model of element more comprises a flush type band electrode R
BS, this R
BSBe connected in this R
SAnd between this deep trench electric capacity.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01109535 CN1275175C (en) | 2001-03-30 | 2001-03-30 | Method for modularizing integrated circuit of DRAM unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01109535 CN1275175C (en) | 2001-03-30 | 2001-03-30 | Method for modularizing integrated circuit of DRAM unit |
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| Publication Number | Publication Date |
|---|---|
| CN1378273A CN1378273A (en) | 2002-11-06 |
| CN1275175C true CN1275175C (en) | 2006-09-13 |
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|---|---|---|---|
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| US9565766B2 (en) | 2011-10-07 | 2017-02-07 | Intel Corporation | Formation of DRAM capacitor among metal interconnect |
| CN102426858B (en) * | 2011-11-30 | 2014-07-23 | 中国科学院微电子研究所 | Method and system for detecting leakage current of storage units |
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