CN1270360C - Method for forming electric conducting layer with less residuals of metal etching - Google Patents
Method for forming electric conducting layer with less residuals of metal etching Download PDFInfo
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- CN1270360C CN1270360C CN 01110530 CN01110530A CN1270360C CN 1270360 C CN1270360 C CN 1270360C CN 01110530 CN01110530 CN 01110530 CN 01110530 A CN01110530 A CN 01110530A CN 1270360 C CN1270360 C CN 1270360C
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Abstract
The present invention relates to a method for forming an electric conduction structure layer by reducing metal etching residues. When an electric conduction structure layer is formed and before a metal layer is deposited, a previous in-situ metal layer is added, the crystal growth of the metal layer is even more uniform by the previous in-situ metal layer, the etching residues of the electric conduction structure layer are reduced, and a crystal has the structure of the electric conduction structure layer.
Description
The invention relates to a kind of method and structure thereof of manufacture of semiconductor, particularly about method and the structure thereof of a kind of minimizing metal etch residue (metal etching residue).It is when forming conductive structure layer, and before layer metal deposition, original position metal level (pre in-situmetal layer) before adding is to reduce the method for conductive structure layer etch residues.
Metal is to be applied in the material of online (interconnect) in the integrated circuit widely, and often is the conductive structure layer of sandwich construction form.For improving the character of metal, often in metal, add impurity (dopant), but this impurity be can cause metal deposition the time, crystal growth is inhomogeneous, so that after the conductive structure layer etching, the generation of etch residues.
With aluminium is example, for electromigration (electron migration) coefficient that improves aluminium and reduce aluminium and silicon base material (silicon substrate) diffuses to form spike (spiking) mutually, therefore be convenient to add impurity such as copper and silicon in the aluminium, with the main material of Al-Si-Cu alloy as the metal level of conductive structure layer.
For more effectively preventing aluminium and silicon counterdiffusion mutually, reduce resistance (resistance) between the two simultaneously, need to add one deck and block respond well barrier layer (barrier layer) in the middle of metal level and silicon base material, this barrier layer generally is made up of one deck titanium (titanium) and one deck titanium nitride (titanium nitride).Usually after barrier layer deposition is finished, chip can be exposed to air a period of time, and one of them increases the ability that blocks of titanium nitride through Overheating Treatment (thermal treatment).And in heat treatment simultaneously, the titanium of bottom can with the silicon base material surface, form one deck titanium silicide (titanium silicide), to reduce the resistance value of conductive structure layer and silicon base material.Then deposit a metal level again in the barrier layer top.Deposit an anti-reflecting layer (anti-reflective layer) again on this metal level, this anti-reflecting layer comprises titanium nitride.This barrier layer, metal level and anti-reflecting layer are formed conductive structure layer jointly.
Shown in Figure 1A, be known conductive structure layer generalized section.This conductive structure layer is formed in the semiconductor substrate 10, and it comprises that forming a dielectric layer 12 was positioned on this semiconductor-based end 10.The part device region that dielectric layer 12 has an opening 14 to expose in the substrate 10.Conformal barrier layer 20 is formed on opening 14 and the dielectric layer 12, cools off alternative method of a period of time then with heat treatment and in air and handles barrier layer 20.Metal level 24 is formed on the barrier layer 20.Anti-reflecting layer 26 also is formed on the metal level 24 in addition.Consult Figure 1B, metal level 24 and barrier layer 20 form a known conductive structure layer after the lithography definition.In etching process, some point-like residues 16 can residue on the dielectric layer 12 of exposure.One of possible cause that known etch residues causes, barrier layer 20 is relevant with handling.When handling barrier layer 20, barrier layer 20 surface crystal gaps easily form oxide, when causing follow-up formation metal level 24, metallic crystal is grown up inhomogeneous, and make the Impurity Distribution inequality, so that in etching conductive structure layer process, some point-like residues 16 can residue on the dielectric layer 12 of exposure.
Fig. 2 is that electron micrograph shows known conductive structure layer after etching, has removal residue not to the utmost to exist.
In view of this, the invention provides a kind of method and structure thereof of formation conductive structure layer of less residuals of metal etching, can be in conductive structure layer with original position metal level before increasing, make the crystal growth of metal level more even, to reduce the probability that conductive structure layer etching post-etch residues takes place.
The invention provides a kind of method of formation conductive structure layer of less residuals of metal etching.Before substrate, original position metal level before the deposition under the continous vacuum state, deposits this metal level more in advance at depositing metal layers.
In above-mentioned method, the effect of original position metal level is to provide metal level a suitable deposition surface before adding, and makes the crystal growth of metal level can be more even, takes place with the phenomenon that reduces the Impurity Distribution inequality.So, can reduce the probability that conductive structure layer takes place through the etching post-etch residues.Before this original position metal level therewith metal level for forming the whole or a part of of conductive structure layer.
The invention provides a kind of structure of conductive structure layer of less residuals of metal etching.This conductive structure layer is formed in the substrate, have be positioned at suprabasil before the original position metal level and be positioned at before a metal level on the original position metal level.This structure can reduce the probability that metal level takes place through the etching post-etch residues.Preceding original position metal level and metal level are for forming the whole or a part of of conductive structure layer.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperation institute accompanying drawing elaborate:
The drawing explanation:
Figure 1A is known conductive structure layer generalized section, and this conductive structure layer is positioned in the substrate;
Figure 1B is the conductive structure layer generalized section after the well-known definitions, and residue is kept somewhere on dielectric layer;
The electron micrograph of Fig. 2 shows known conductive structure layer after etching, has removal residue not to the utmost to exist;
Fig. 3 A to Fig. 3 E is the manufacturing process generalized section of conductive structure layer of the present invention, and this conductive structure layer is positioned in the substrate; And
The electron micrograph of Fig. 4 shows conductive structure layer of the present invention after etching, and the point-like etch residues can be avoided effectively.
Description of reference numerals:
10, the 50 semiconductor-based ends
12,52 dielectric layers
14,54 openings
20,60 barrier layers
16 etch residues
Original position metal level before 62
24,64 metal levels
26,66 anti-reflecting layers
The invention provides a kind of method and structure thereof of formation conductive structure layer of less residuals of metal etching.Its feature is before depositing metal layers, and in same vacuum board, the original position metal level to provide this metal level a suitable deposition surface, makes the growth of this metal level can be more even in a substrate before the deposition, takes place with the phenomenon that reduces the Impurity Distribution inequality.So, can reduce the probability that metal level takes place through the etching post-etch residues.
Fig. 3 A to Fig. 3 D is according to a preferred embodiment of the present invention, the manufacturing process generalized section of conductive structure layer of the present invention, and this conductive structure layer is positioned in the substrate.This conductive structure layer is after etching, and etch residues can be avoided effectively.At first, please refer to Fig. 3 A, deposition one dielectric layer 52 on the semiconductor-based end 50, after by the lithography step, form an opening 54 on this dielectric layer 52, this opening 54 exposes the part zone of the assembly (not being shown in figure) in the substrate 50.
Then, please refer to Fig. 3 B, deposition one barrier layer 60 on opening 54 and dielectric layer 52.These barrier layer 60 conformal body structure surfaces in substrate 50.When opening 54 was contact hole, this barrier layer 60 for example can comprise two layers, and it is by first deposition one deck titanium, deposited one deck titanium nitride again and formed, and perhaps by deposition one deck titanium earlier, deposited one deck tungsten titanium again and formed.When opening 54 is interlayer hole, this barrier layer 60 for example comprise titanium nitride and tungsten titanium the two one of.The thickness of this barrier layer 60 is decided on the aspect ratio (aspect ratio) of opening.This barrier layer 60 after deposition, again through Overheating Treatment or in air cooling a period of time one of them, to increase the effect that blocks of barrier layer 60.
Then, please refer to Fig. 3 C, original position metal level 62 before the deposition on barrier layer 60, before this original position metal level can be titanium, tungsten titanium, reach titanium nitride one of them, be preferably titanium nitride.Its thickness for example is that about 50 dusts are to about 1100 dusts.Original position metal level 62 cools off a period of time either-or without Overheating Treatment and in air before this, and a suitable deposition surface can be provided.As long as deposit original position metal level 62 before this, can reach the function that reduces conductive structure layer metal etch residue.
Please refer to Fig. 3 D, the same vacuum board of original position metal level 62 before deposition under continous vacuum state environment, deposits a metal level 64 on original position metal level 62 before this.But generally also process deposition of antiglare layer 66 on this metal level 64.
Please refer to Fig. 3 E, through a lithography step, definition barrier layer 60, preceding original position metal level 62, metal level 64, and anti-reflecting layer 66 are so form the conductive structure layer of less residuals of metal etching of the present invention.Because this metal level 64 is deposited on before this on the original position metal level 62, original position metal level 62 provides a suitable deposition surface before this, makes the crystal growth of this metal level 64 more even, takes place with the phenomenon that reduces the Impurity Distribution inequality.So can reduce the probability that conductive structure layer takes place through the etching post-etch residues.This metal level 64 comprise aluminium, copper, tungsten, aluminium alloy, alusil alloy, Al-Si-Cu alloy, aluminium copper, copper alloy, and tungsten alloy wherein one, wherein be preferably alusil alloy and Al-Si-Cu alloy.And anti-reflecting layer 66 for example comprises titanium nitride.
The electron micrograph of Fig. 4 shows conductive structure layer of the present invention after etching, and the point-like etch residues can be avoided effectively.Please consult Fig. 2 and Fig. 4 simultaneously, in Fig. 2, the point-like etch residues intersperses among on the dielectric layer of the exposure between the conductive structure layer.In Fig. 4, adopt method of the present invention, before forming metal level 64, original position metal level 62 before forming earlier.So, traditional point-like etch residues can be avoided effectively.
Though the preferred embodiment of the conductive structure layer of the present invention that Fig. 3 D discloses is as comprising barrier layer 60, preceding original position metal level 62, metal level 64 and anti-reflecting layer 66, conductive structure layer of the present invention, in fact only original position metal level 62 and metal level 64 before needing just can reach the purpose that reduces the metal etch residue.
In sum, the method for the formation conductive structure layer of less residuals of metal etching of the present invention has many features:
(1) the preceding original position metal level in the conductive structure layer of the present invention deposits before depositing metal layers, belongs to the deposition step in the same vacuum board, does not increase the processing procedure degree of difficulty.
(2) conductive structure layer of the present invention, because of original position metal level 62 before forming, after etching, etch residues is effectively avoided.
(3) conductive structure layer of the present invention, because of after etching, etch residues is effectively avoided, and can increase the reliability of assembly.
Though the present invention discloses as above with a preferred embodiment; right its is not in order to limiting the present invention, anyly has the knack of this operator, without departing from the spirit and scope of the present invention; when can doing various changes and retouching, so protection scope of the present invention is as the criterion when defining with claims scope.
Claims (9)
1, a kind of method of formation conductive structure layer of less residuals of metal etching is characterized in that: comprise the following steps:
One substrate is provided;
Form a barrier layer in this substrate;
Handle this barrier layer in heat treated mode;
The original position metal level is on this barrier layer before forming one; And
In the same vacuum environment of this preceding original position metal level, form a metal level continuously on preceding original position metal level.
2, the method for the formation conductive structure layer of less residuals of metal etching according to claim 1 is characterized in that: wherein before the original position metal level comprise titanium, titanium nitride and tungsten titanium one of them.
3, the method for the formation conductive structure layer of less residuals of metal etching according to claim 1, it is characterized in that: wherein metal level comprises aluminium, copper, tungsten, alusil alloy, Al-Si-Cu alloy, aluminium copper, aluminium alloy, copper alloy and tungsten alloy one of them.
4, the method for the formation conductive structure layer of less residuals of metal etching according to claim 1 is characterized in that: wherein barrier layer comprises one deck metal level at least.
5, the method for the formation conductive structure layer of less residuals of metal etching according to claim 1, it is characterized in that: wherein barrier layer comprises titanium, titanium nitride, and the tungsten titanium one of them.
6, the method for the formation conductive structure layer of less residuals of metal etching according to claim 1 is characterized in that: wherein substrate comprises dielectric layer and is defined in one of this dielectric layer opening.
7, the method for the formation conductive structure layer of less residuals of metal etching according to claim 1 is characterized in that: comprise that deposition one anti-reflecting layer is on metal level.
8, the method for the formation conductive structure layer of less residuals of metal etching according to claim 7, it is characterized in that: wherein form in the anti-reflecting layer step, anti-reflecting layer comprises titanium nitride.
9, the method for the formation conductive structure layer of less residuals of metal etching according to claim 1 is characterized in that: comprise that a little shadow and an etching step are to define this barrier layer and anteposition metal level and metal level.
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CN 01110530 CN1270360C (en) | 2001-04-10 | 2001-04-10 | Method for forming electric conducting layer with less residuals of metal etching |
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CN 01110530 CN1270360C (en) | 2001-04-10 | 2001-04-10 | Method for forming electric conducting layer with less residuals of metal etching |
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CN1270360C true CN1270360C (en) | 2006-08-16 |
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CN104124204A (en) * | 2013-04-28 | 2014-10-29 | 无锡华润上华科技有限公司 | Method for improving aluminum residue in semiconductor process flow |
CN107946235A (en) * | 2017-11-21 | 2018-04-20 | 上海华虹宏力半导体制造有限公司 | Improve the method for ultra-thin aluminum bronze roughness of film |
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