CN1270324C - FLASH device onboard programming method based on boundary scanning technique - Google Patents
FLASH device onboard programming method based on boundary scanning technique Download PDFInfo
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- CN1270324C CN1270324C CN 02124004 CN02124004A CN1270324C CN 1270324 C CN1270324 C CN 1270324C CN 02124004 CN02124004 CN 02124004 CN 02124004 A CN02124004 A CN 02124004A CN 1270324 C CN1270324 C CN 1270324C
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Abstract
The present invention discloses an on-board programming method for flash devices, which is based on the technology of boundary scan. The present invention is characterized in that the method comprises at least the following steps: (1) boundary scan devices on a circuit board, which correspond to flash devices, are connected to be a scanning chain, and a boundary scan interface is led out; (2) boundary scan devices on the scanning chain, which correspond to the programming of the flash devices, are connected with a large non boundary scan logic cluster comprising at least one flash device through communication lines; the programming scripts of the flash devices are compiled, and the corresponding relation between pins relevant to the flash devices and boundary scan device pins on the scanning chain, which are relevant to the programming of the flash devices, is set; (4) programmed instructions and data are applied to the flash devices so as to complete on-board programming through the scanning chain.
Description
Technical field
The present invention relates to a kind of FLASH device at the plate programmed method, particularly a kind of FLASH device boundaries scanning loading method based on boundary scan technique.
Technical background
FLASH device online programming method commonly used at present has three kinds, and they are respectively:
1, utilize the online programming that carries out at board test (ICT) equipment (ICP, In-CircuitProgramming): be meant by external unit to be connected on the application system circuit board, provide necessary isolation and programming signal to drive and realize programming.The common online programming as adopting ICT testing apparatuss such as (In Circuit Test) to carry out need take expensive device resource.
2, the systems programming (ISP, In-System Programming) that utilizes CPU to carry out: be meant the programming that realizes programming device with programmed algorithm of wiping of carrying out programming device by the CPU in the system.This mode requires the CPU can operate as normal, and need provide hardware interfaces such as extra network interface, serial ports to carry out software download.At present, by this way the FLASH device is carried out using comparatively extensive in the plate programming.Shown in the MPC860 minimum system block diagram that Fig. 1 adopts ISP technology loading FLASH device, wherein, comprise 16 FLASH105 and one 32 random access memory (RAM) 106 that a debugging serial interface 101, control desk serial ports 102, CPU103,104, one of 8 boot storer (Boot ROM) that are used for firing the program of moving and bios program are used for firing business software.Boot ROM104 generally adopts the device of the plastic package (PLCC encapsulation) of band lead-in wire, and software wherein bakes at software house in advance, and veneer is inserted in when producing again and makes on the corresponding integrated circuit of plate (IC) socket.Business software is owing to there is the requirement of online upgrading, so FLASH ROM104 generally adopts the mode of ISP to fire, its software obtained three kinds of approach:
A, obtained by master control borad by core bus, it is just passable that this needs business software to move;
B, the debugging serial interface (DEBUG Ethernet) 101 by this plate are downloaded by generic-document host-host protocol TFTP or file transfer protocol (FTP) FTP under the cooperation of bios software and are obtained;
C, the control desk serial ports (Local Terminal) 102 by this plate are downloaded by serial communication protocol under the cooperation of bios software and are obtained.
As can be seen, except that master control borad, the local network interface of other each business board and serial ports are except meaningful in the debug phase, and unique effect is exactly the first loading that is used for business software after the product maturation, just is used for producing loading.Therefore, the cost of product is than higher.
Adopting independent Boot ROM is the problem that the relation of considering the ISP of software and software itself has a point image " chicken and egg ", and the software on the veneer can be upgraded by ISP, but the relevant software of the another provisioning request of ISP moves.Because Boot ROM need fire and use the IC socket separately, not only brought trouble to production management, and the contact problems of IC socket also is to perplex a major issue of production always.The PLCC socket is easy to occur loose contact owing to reasons such as structure and oxidations.
3, utilize boundary scan (BS, Boundary Scan) technology, also claim JTAG (Joint TestAction Group, JTAG) technology, that carries out programmes (OBP) at plate: generally speaking, FLASH device on the circuit board itself is band edge circle Scan Architecture not, but there is boundary scanning device around the FLASH device, thereby the boundary scanning device around can utilizing, be generally CPU, realize that the FLASH device loads, so-called loading is meant programmes to the software carrier on the product, fires the process of software.Utilizing boundary scan technique to carry out the FLASH device is loaded is a newer effective programming mode, it only need be linked to be a scan chain with relevant boundary scanning device on hardware, and boundary scan interface extracted to be connected on the JTAG loading control gets final product.Utilize the loading system of boundary scan technique to set up a FLASH component inventory at present, write FLASH device programming script based on the FLASH device.With respect to preceding two kinds of FLASH device load modes, boundary scan loads has following characteristics and advantage:
1) with respect to ICP, boundary scan loads the equipment that does not need occupying volume outer, does not also need professional's development sequence.
2) with respect to ISP, boundary scan loads can subdue Material Cost.According to CPU minimum system shown in Figure 1, Fig. 2 can save the synoptic diagram of debugging serial interface and BIOS chip for the application system circuit board that adopts boundary scan technique to load the FLASH device, the application system circuit board 200 of the first half for adopting the ISP method to load among the figure, comprise debugging serial interface 201, control desk serial ports 202, CPU203, one be used for firing 8 Boot ROM204 of the program of moving and bios program, 16 FLASH ROM205 and a boundary scan interface 206 that is used for firing business software; And the application system circuit board 210 of the latter half for adopting boundary scanning method to load comprises control desk serial ports 212, CPU213,16 FLASHROM215 and a boundary scan interface 216.This shows, the application system circuit board that adopts boundary scanning method to load can save debugging serial interface, simultaneously, owing to do not need the CPU operation just can load to circuit board, Boot ROM and FLASH device can be combined unified firing in the FLASH device.Therefore can save BIOS chip Boot ROM and the socket of PLCC on the veneer, another has reduced cost.Only calculate with regard to above two, each piece veneer can approximately be saved 100 yuan, and 10,000 circuit boards just can be saved 1,000,000 yuan of production costs.
3) with respect to ISP, the boundary scan load mode has saved network interface and BIOS chip and socket, reduced the printed board area, this has just not only reduced cost, the more important thing is and reduced manufacturing procedure, optimize production procedure, reduced the labile factor of product, greatly improved the reliability of veneer.
4) the boundary scan load mode is supported the application of product lifecycle.
Remaining load mode only is suitable for using in the specific stage, download when being suitable for product up-gradation such as the mode that loads by master control borad by core bus, debugging serial interface by this plate, under the cooperation of bios software, download the production loading that the mode that loads is suitable for business software by TFTP or File Transfer Protocol, and the boundary scan load mode is supported the application of product lifecycle, be embodied in the product life cycle with the next stage:
The application of A, development phase: directly FLASH device on the plate is carried out not needing to plug continually the Boot rom chip and going programming with programmable device again in the plate programming.Except the FLASH device loads, can also carry out the wiping of FLASH device, ID verification, read FLASH device and the verification of FLASH device by programing system.
The application of B, production phase: directly FLASH device on the plate is carried out in plate programming, saved programme the in batches process of Boot ROM and plug of software house, reduced operation and device, can improve first-pass yield.
The application in C, field maintemance stage:, can be designed to whole softwares easily and support remote upgrade (comprising Boot, BIOS, APP) because have only a slice FLASH device.By the boundary scan controller that connects, the user attendant utilizes FLASH device programming system on-the-spot failing single board to be loaded, even carries out testing and diagnosing and localization of fault.
Has above advantage though utilize boundary scan technique to load the FLASH device, but utilize boundary scan technique to load the product of FLASH device at present, there is a common problem to be exactly: only to set up the FLASH component inventory, and just write FLASH device programming script based on the FLASH device.Can only handle the situation that boundary scanning device and FLASH device directly link to each other like this, can't handle the situation that has the non-boundary scanning Logic Cluster between boundary scanning device and the FLASH device, the non-boundary scanning Logic Cluster is the general name of logic chips such as middle some chip for driving that exist of circuit board coboundary scanning device and FLASH device or programmable logic device (PLD) EPLD, being Cluster, is very general and there is the situation of non-boundary scanning Logic Cluster.Although the loading system that has has increased a kind of special pin set-up function, it can only handle the non-boundary scanning Logic Cluster of straight-through logic, still can't handle the non-boundary scanning Logic Cluster of complex logic.In real application systems, simple straight-through logic is often not only arranged between boundary scanning device and the FLASH device, therefore, how under the situation that has the non-boundary scanning Logic Cluster between boundary scanning device and the FLASH device, FALSH loaded and be still a still unsolved difficult problem, make the existing method of utilizing boundary scan technique to load the FLASH device to be widely used in the production practices.
Summary of the invention
In view of this, fundamental purpose of the present invention is to provide a kind of FLASH device boundaries scanning loading method based on boundary scan technique, and it can solve the problem that has complicated non-boundary scanning Logic Cluster between boundary scanning device and the FLASH device.
For achieving the above object, technical scheme of the present invention specifically is achieved in that
A kind of FLASH device boundaries scanning loading method based on boundary scan technique, this method comprises following step at least:
1) boundary scanning devices all on the circuit board is linked to be a scan chain, and draws boundary scan interface;
2) boundary scanning device relevant with the FLASH device programming on the scan chain is linked to each other with a big non-boundary scanning Logic Cluster that comprises a FLASH device at least by signal wire;
3) write FLASH device programming script, set the corresponding relation of boundary scanning device pin relevant on the relevant pin of FLASH device and the scan chain with the FLASH device programming;
4) by boundary scan chain programming instruction and data are applied on the FLASH device and load.
Boundary scanning device relevant with the FLASH device programming in said method can link to each other with the big non-boundary scanning Logic Cluster that comprises a FLASH device and non-boundary scanning Logic Cluster by signal wire.
Said method may further include: the data file that the data that the FLASH device just write by boundary scan chain are read and write compares, and finishes the verification of programming data.
This method step 3) described FLASH device programming script can be generated or be formed by C language editor by FLASH device programming script automatic generator editor.
This method also can further comprise: set up boundary scanning device storehouse and FLASH component inventory in advance in FLASH device programming script automatic generator.
The described step 3) of this method also can further comprise: FLASH device programming script compiles this FLASH device programming script after generating;
In the described step 4), by scan chain programming instruction and data are applied to load on the FLASH device before, border scanning system connects according to network earlier and analyzes on the scan chain and the relevant and irrelevant boundary scanning device of FLASH device programming, irrelevant boundary scanning device is just sent the bypass order to it, with this scanning device bypass.
As seen, this FLASH device boundaries scanning loading method key based on boundary scan technique provided by the present invention is: when editor FLASH device programming script, non-boundary scanning Logic Cluster and FLASH device synthesis are got up to regard as a big non-boundary scanning Logic Cluster, when not having the non-boundary scanning Logic Cluster, regard the FLASH device as a big non-boundary scanning Logic Cluster, set the corresponding relation of boundary scanning device pin relevant on the relevant pin of FLASH device and the scan chain with the FLASH device programming, promptly when editor FLASH device programming script, the non-boundary scanning Logic Cluster has been taken into account, therefore no matter there is how complicated non-boundary scanning Logic Cluster on the circuit board in scanning device and the FLASH device, can both realize programming to the FLASH device at plate, solved a difficult problem that under the situation that has complicated non-boundary scanning Logic Cluster between boundary scanning device and the FLASH device, the FALSH device is loaded, make that carrying out the FLASH device based on boundary scan technique is widely used in the production practices at the plate programmed method, optimized production procedure, reduce production cost in a large number, improved the stability of system, reliability.
Description of drawings
Fig. 1 loads the MPC860 minimum system block diagram of FLASH device for adopting the ISP technology.
Fig. 2 can save the synoptic diagram of debugging serial interface and BIOS chip for the application system circuit board that adopts boundary scan technique to load the FLASH device.
Fig. 3 utilizes FLASH device of the present invention to carry out the synoptic diagram of the embodiment of boundary scan loading at the plate programmed method.
The principle schematic that Fig. 4 handles the non-boundary scanning Logic Cluster for the present invention.
Fig. 5 is the synoptic diagram of the present invention to an embodiment of non-boundary scanning Logic Cluster processing.
Embodiment
The present invention is further described in more detail below in conjunction with drawings and the specific embodiments.
Referring to Fig. 3, utilize FLASH device of the present invention to carry out the synoptic diagram of the embodiment of boundary scan loading at the plate programmed method, as shown in the figure, a block boundary scan control card 302 has been installed on the ordinary PC 300, and corresponding FLASH device boundaries scanning loading system software 301 has been installed.Among the figure, on application system circuit board 310, U1-U6 is a boundary scanning device, their test data input pin (TDI pin), end to end with test data input pin (TDO pin), formed a scan chain, and extracted as boundary scan interface and be connected on the boundary scan control card 302.The address wire of the FLASH device 311 on the system applies circuit board 310 links to each other with the address wire of U4, data line links to each other with control line with the data line of U5 with control line.
Utilize FLASH device of the present invention to comprise following step: at first in the process that the plate programmed method carries out the boundary scan loading, editor FLASH device programming script, wherein, set the address wire of FLASH device 311 and address wire, data line and control line and the data line of U5 and the corresponding relation of control line of U4.This script can be formed also and can be generated by FLASH device programming script automatic generator editor by C language editor.Like this, the user can select flexibly according to actual conditions in use.Owing to set up FLASH component inventory and boundary scanning device storehouse in advance in the FLASH device programming script automatic generator, when generating programmed scripts, only need to select with circuit board on identical FLASH device and boundary scanning device, and pin and some special pin of setting them get final product, and it can be edited two FLASH devices of the odd even on the circuit board simultaneously, wherein, odd even is determined according to the address, the FLASH device of odd address correspondence is strange sheet FLASH device, and the FLASH device of even address correspondence is even sheet FLASH device.When practical operation, two FLASH devices of odd even are used as a slice FLASH device handle, such as the FLASH device of two 8 bit address lines, the strange sheet of conduct, the even sheet of conduct just is equivalent to the FLASH of 16 of a slices.Simultaneously, it have simple to operate, be difficult for makeing mistakes and revise advantage easily, therefore, present embodiment adopts FLASH device programming script automatic generator to generate programmed scripts.
After FLASH device programming script generated, FLASH device boundaries scanning loading system 301 compiled it earlier.
Then, boundary scan loading system 301 is applied to FLASH device 311 by scan chain with programming instruction and data, loads.Boundary scan loading system 301 connects according to network earlier and analyzes the boundary scanning device relevant with the FLASH device programming U4 and U5 are arranged, irrelevant boundary scanning device has U1, U2, U3 and U6, boundary scan controller 302 is sent the order of bypass U1, U2, U3 and U6, with they bypasses, so-called bypass is exactly that device scan-data path is become 1 by original self scan chain length figure place.If the scan chain length of each boundary scanning device self is 100 among Fig. 3, in Fig. 3, total scan chain length is 600 so, bypass after four devices, the sweep length that loads usefulness just is 204.Obviously much shorter, so just accelerated the speed that loads.
At last, boundary scan loading system 301 is carried out verification, the data file of the data that just write in the FLASH device 311 being read and being required to write by boundary scan chain compares finishes automatic verification, if data are inconsistent, then data load is carried out in prompting again, has guaranteed the correctness of data load.
Referring to Fig. 4, the principle schematic that the present invention handles the non-boundary scanning Logic Cluster, regarding non-boundary scanning Logic Cluster 402 and FLASH device 403 as a big non-boundary scanning Logic Cluster 401 links to each other with boundary scanning device, this boundary scanning device generally is CPU, illustrate with CPU400 among the figure, when writing FLASH device programming script, directly set the corresponding relation of the relevant pins of FLASH device 403 and the relevant pin of CPU400.Like this, no matter whether have the non-boundary scanning Logic Cluster between boundary scanning device and the FLASH device or have how complicated non-boundary scanning Logic Cluster, FLASH device loading scripts is not all had influence, invisible solution have the problem of non-boundary scanning Logic Cluster between boundary scanning device and the FLASH device.
Referring to Fig. 5, another synoptic diagram of the present invention to the embodiment of non-boundary scanning Logic Cluster processing.CPU device 500 is boundary scanning devices among the figure, A[0..31] be 32 address wires, D[0...15] be 16 data lines, FLASH device 505, a non-boundary scanning Logic Cluster 502 has been passed through in the centre, non-boundary scanning Logic Cluster 502 comprises chip for driving 504, chip for driving 505 and a programmable logic device (PLD) logic CPLD506, and the RD/WR of CPU device 500 connects the DIR of chip for driving 505.Border scanning system connects according to network and analyzes CPU device 500 automatically and programme relevant with FLASH device 503, when writing FLASH device programming script, regard non-boundary scanning Logic Cluster 502 and FLASH device 503 as a big non-boundary scanning Logic Cluster 501, set FLASH device 503 address wire A[23..0] with the address wire A[8..31 of boundary scanning device 500] corresponding; The data line D[15..0 of FLASH device 503] with the address wire D[0..15 of CPU device 500] corresponding; The address wire A[0..7 of the chip selection signal/CS of FLASH device 503 and CPU device 500] the logic corresponding relation.Like this, though there are non-boundary scanning Logic Cluster 502 in 503 of CPU device 500 and FLASH devices, to the not influence of FLASH device programming script.The CPU device is MPC860 in the present embodiment, and the bus driver chip of address wire is 74VTH16244, and the bus driver chip of data line is 74VTH16245, and the FLASH device chip is 28F128J3A.
Utilize method of the present invention, in the realization of the application system circuit board success of tens kinds of complexity the FLASH device load, see from test findings, FLASH device loading method of the present invention is accelerated to some extent than the existing speed of utilizing boundary scan technique to load the FLASH device, can instruct simultaneously the correcting work of some application system circuit boards, create good economic benefit.
Claims (7)
1, a kind of FLASH device boundaries scanning loading method based on boundary scan technique is characterized in that this method comprises following step at least:
1) boundary scanning devices all on the circuit board is linked to be a scan chain, and draws boundary scan interface;
2) boundary scanning device relevant with the FLASH device programming on the scan chain is linked to each other with a big non-boundary scanning Logic Cluster that comprises a FLASH device at least by signal wire;
3) write FLASH device programming script, set the corresponding relation of boundary scanning device pin relevant on the relevant pin of FLASH device and the scan chain with the FLASH device programming;
4) by scan chain programming instruction and data are applied on the FLASH device and load.
2, the FLASH device boundaries scanning loading method based on boundary scan technique as claimed in claim 1, it is characterized in that the step 2 of this method) further comprise: boundary scanning device that will be relevant with the FLASH device programming links to each other with the big non-boundary scanning Logic Cluster that comprises a FLASH device and non-boundary scanning Logic Cluster by signal wire.
3, the FLASH device boundaries scanning loading method based on boundary scan technique as claimed in claim 1, it is characterized in that, this method further comprises: the data file that the data that the FLASH device just write by boundary scan chain are read and write compares, and finishes the verification of programming data.
4, the FLASH device boundaries scanning loading method based on boundary scan technique as claimed in claim 1, it is characterized in that the step 3) of this method further comprises: set FLASH device programming script and generate by FLASH device programming script automatic generator editor.
5, the FLASH device boundaries scanning loading method based on boundary scan technique as claimed in claim 1 is characterized in that the step 3) of this method further comprises: set FLASH device programming script and formed by C language editor.
6, the FLASH device boundaries scanning loading method based on boundary scan technique as claimed in claim 2, it is characterized in that this method further comprises: in FLASH device programming script automatic generator, set up boundary scanning device storehouse and FLASH component inventory in advance.
7, the FLASH device boundaries scanning loading method based on boundary scan technique as claimed in claim 1, it is characterized in that described step 3) further comprises: FLASH device programming script compiles this FLASH device programming script after generating;
In the described step 4), by scan chain programming instruction and data are applied to load on the FLASH device before, border scanning system connects according to network earlier and analyzes on the scan chain and the relevant and irrelevant boundary scanning device of FLASH device programming, irrelevant boundary scanning device is just sent the bypass order to it, with this boundary scanning device bypass.
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| CN 02124004 CN1270324C (en) | 2002-06-14 | 2002-06-14 | FLASH device onboard programming method based on boundary scanning technique |
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| CN 02124004 CN1270324C (en) | 2002-06-14 | 2002-06-14 | FLASH device onboard programming method based on boundary scanning technique |
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| CN1270324C true CN1270324C (en) | 2006-08-16 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1317639C (en) * | 2004-11-18 | 2007-05-23 | 华为技术有限公司 | Method for upgrading logic device programm in product |
| CN100337199C (en) * | 2004-11-25 | 2007-09-12 | 华为技术有限公司 | Basic inputting and outputting system and method for upgrading FLASH device |
| CN100357874C (en) * | 2005-09-30 | 2007-12-26 | 华为技术有限公司 | Flash memory loading method and system based on boundary scan |
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