CN1269339C - Carrier recovery device for digital QAM receiver - Google Patents

Abstract

The invention discloses a carrier recovery device for a Quadrature Amplitude Modulation (QAM) receiver, the carrier recovery device comprising a phase detector, a lock controller, a frequency lock, a phase loop filter, providing phase/frequency error information to a Numerically Controlled Oscillator (NCO) to generate a recovered carrier, the phase detector detecting signal energy information and phase error information of an extracted signal obtained by an I/Q extractor, the lock controller monitoring signal energy output from the phase detector and dividing the extracted signal into two parts: the lock controller controls the operation of the frequency locker and the phase loop filter in three operation stages, and detected frequency deviation and phase deviation obtained by the frequency locker and the phase loop filter are fed into the numerical control oscillator to recover carrier deviation.

Description

Carrier recovery device for digital QAM receiver

Technical field

The present invention relates to a carrier recovery device applied to an integrated circuit or a receiving system, in particular to a carrier recovery device applied to a quadrature amplitude modulation (QAM) receiver.

Background technique

In a communication system, there is inevitably a frequency deviation and a phase deviation between the local oscillators at the sending end and the receiving end. For the quadrature amplitude modulation system, this deviation will cause the rotation and deviation of the signal azimuth diagram. oblique, and severely damage the transmitted signal.

Please refer to Figure 1A to Figure 1C, these three figures show three kinds of signal orientation diagrams for demodulating QAM-16 signals, in which Figure 1A is an ideal signal orientation diagram, and Figure 1B is caused by the phase deviation between the sending end and the receiving end The signal azimuth diagram is skewed, and in Figure 1C, the signal azimuth diagram is rotated due to the frequency deviation between the sending end and the receiving end. If the signal azimuth diagram of the demodulated signal is distorted as shown in Figure 1B or 1C, we cannot decode it correctly These demodulate signals to obtain the original information, therefore, many research efforts are directed towards solving these problems.

Please refer to Fig. 2, this figure is a functional block diagram of a traditional quadrature AM receiver, the tuner 11 first converts the received RF signal into an intermediate frequency (intermediate frequency, IF) signal, and then utilizes an analog-to-digital converter 12 to sample It is sampled and digitized at an interval T, and then a voltage controlled oscillator (VCO) 13 further converts the digitized intermediate frequency sampling into a baseband (baseband) signal, and properly filters out unwanted high frequency parts, so The result is the demodulated signal, but if the center frequency of the voltage controlled oscillator 13 is different from the intermediate frequency carrier, there will be cross talk between the in-phase band and the quadrature band of the baseband signal, and the carrier recovery device 14 is based on these Carrier information to estimate the value of Δθ[n], let the voltage control oscillator 13 adjust its phase to improve the crosstalk phenomenon of baseband sampling, US Patent Nos. 5,058,136, 5,519,356, 5,940,450 disclose some traditional carrier recovery methods for such devices , which provides parameters substantially related to the phase deviation, which are used to correct the local oscillator at the receiving end, so as to eliminate the phase deviation. However, if there is a frequency deviation at the same time, to correct the phase deviation and frequency deviation at the same time, it is necessary to use More parameters and correction steps are used to correct the part related to the phase deviation, so it takes a long time to correct the system and make the system converge. Moreover, the trade-off between the correction rate and the accuracy of the result is not easy to grasp.

Contents of the invention

The purpose of the present invention is to provide a carrier recovery device, which can simultaneously improve the problems of phase deviation and frequency deviation, and take into account both correction rate and result accuracy.

The present invention relates to a carrier recovery device applied to a demodulator of a communication system. In a preferred embodiment, the carrier recovery device is located in a quadrature amplitude modulation receiver for receiving a carrier.

According to the first idea of the present invention, the carrier recovery device includes a phase detector, a frequency locker, and a locker. The phase detector is used to detect the first part and the second part of the signal to be demodulated, and output a phase error parameter according to the relationship between the first part and the second part; the frequency locker and the phase detector Electrically connected, used to generate a frequency adjustment value and an estimated frequency error value in response to the phase error parameter; the lock controller is electrically connected to the frequency locker, and outputs the first mark according to the comparison result of the frequency adjustment value and the first set value The state signal is sent to the frequency locker, and the change state of the frequency error estimate value is controlled in response to the first mark state signal, and the frequency error estimate value is processed according to the change state, and will be provided to the carrier frequency generator at the demodulation end of the communication system, to generate a recovered carrier; and a phase loop filter, electrically connected to the phase detector and the lock, for outputting a phase error estimate in response to a phase error parameter, and receiving a third flag state signal from the lock, according to The comparison result of the frequency adjustment value and the third setting value controls the change state of the phase error estimation value.

Preferably, the phase detector will further output a power parameter to the lock controller in response to the first part and the second part of the quadrature amplitude modulation signal, and the lock controller will further output a power parameter according to the comparison result of the power parameter and the second set value And outputting a second flag state signal, when the power parameter is not less than a second set value, the second flag state signal indicates a valid state.

Preferably, the frequency adjustment value is not compared to the first setpoint value until the second flag signal indicates a valid state.

Likewise, the frequency adjustment value will not be compared with the third set value before the second flag signal indicates a valid state.

In one embodiment, the third set value is greater than the first set value, when the frequency adjustment value is greater than the first set value, the first flag state signal indicates that the frequency locker is in the active state, and when the frequency adjustment value is not When greater than the first set value, the first flag state signal indicates that the frequency locker is in an inactive state. When the frequency adjustment value is not greater than the third set value, the third flag state signal indicates that the phase loop filter is in the active state, and when the frequency adjustment value is greater than the third set value, the third flag state signal indicates that the phase loop filter The filter is in the inactive state.

When the first flag state signal indicates that the frequency locker is in an inactive state, the change state of the frequency error estimate indicates that the original value of the frequency error estimate is retained; conversely, when the first flag state signal indicates that the frequency locker is in an active state , then the change state of the frequency error estimate indicates that a factor of the frequency adjustment value is introduced to update the frequency error estimate.

Preferably, the frequency locker will output an average frequency error according to the comparison result of the phase error parameter and the fourth set value. The frequency locker includes a counter. When the counter counts to a predetermined value, the frequency locker will respond to the frequency adjustment value and The frequency error estimate is generated by the positive and negative values of the average frequency error. When the three consecutive average frequency errors output by the phase detector have the same positive and negative values, the frequency adjustment value is doubled. If the positive and negative phases of the three consecutive average frequency errors , the frequency adjustment value is halved.

On the other hand, when the third flag state signal indicates that the phase loop filter is in the inactive state, the change state of the phase error estimate indicates that the phase error estimate is kept at the original value; conversely, when the third flag state signal indicates that the phase When the loop filter is in the active state, the change state of the estimated value of the phase error indicates that the phase error value needs to be updated, which is achieved by introducing the search bandwidth factor of the input phase loop filter.

Preferably, the phase loop filter includes a primary filter and a multiplexer. The primary filter is electrically connected with the phase detector, and is used to receive the phase error parameter, and process the phase error parameter and the search bandwidth to obtain an updated phase error estimation value; the multiplexer is electrically connected to the primary filter, and responds to the second and a third flag state signal, outputting one of the original phase error estimate and the updated phase error estimate.

Preferably, the carrier frequency generator is a numerically controlled oscillator (NCO).

According to a second aspect of the present invention, a carrier recovery device for a quadrature amplitude modulation receiver includes a phase detector that outputs a phase error parameter in response to the in-phase and quadrature parts of the quadrature amplitude modulation signal; a frequency locker, and The phase detector is electrically connected to generate a frequency adjustment value and a frequency error estimation value in response to the phase error parameter; a phase loop filter is electrically connected to the phase detector and is used to output a phase error in response to the phase error parameter Estimated value; and a locking controller, electrically connected with the frequency locker and the phase loop filter, outputting the first flag state signal to the frequency locker according to the comparison result of the frequency adjustment value and the first set value, and according to the frequency outputting a second flag state signal to the phase loop filter to control the first change state of the frequency error estimate in response to the first flag signal, and to respond to the second flag signal at the same time by comparing the adjustment value with the second set value. controlling the second change state of the phase error estimate, here the frequency error estimate and the phase error estimate are processed respectively according to the first change state and the second change state, and provided to the carrier frequency generator at the demodulation end of the communication system, to generate a recovery carrier.

Preferably, the phase detector also outputs a power parameter to the lock controller in response to the in-phase and quadrature parts of the quadrature amplitude modulation signal, and outputs a third flag state signal according to the comparison result of the power parameter and the third set value , if the power parameter is not greater than the third set value, the third flag state signal indicates a valid state, and the frequency adjustment value and the first set value will not be compared before the third flag state signal indicates an active state.

Description of drawings

The present invention can be better understood through the detailed description of the following drawings and preferred embodiments:

Fig. 1A to Fig. 1 C are three kinds of signal azimuth diagrams of demodulation QAM-16 signal;

Fig. 2 is a functional block diagram of a traditional quadrature AM receiver;

Fig. 3 is the functional block diagram of quadrature amplitude modulation receiver of the present invention;

Fig. 4 is the operation block diagram of the preferred embodiment of the carrier recovery device of the present invention;

Fig. 5 A is the operational block diagram of the preferred embodiment of the phase detector in Fig. 4;

Fig. 5B is the operation block diagram of another preferred embodiment of the phase detector in Fig. 4;

Fig. 6 is a flow chart illustrating the operation principle of lock controller 32 in Fig. 4;

Figure 7 is an azimuth diagram of the 64-AQM signal, plus the preset values selected for signal energy detection according to the present invention;

Fig. 8 is an azimuth diagram of a 256-AQM signal, plus preset values selected for signal energy detection according to the present invention;

Fig. 9A and Fig. 9B are the flow charts illustrating the operation principle of the frequency locker 33 in Fig. 4;

Figure 10 is a block diagram of the operation of the phase loop filter in Figure 4; and

FIG. 11 is a flow chart illustrating the operation principle of the phase loop filter 34 in FIG. 10 .

The description of each component label in the accompanying drawings is as follows:

11, 21: Tuner 12, 22: Analog-to-digital converter

13: Voltage controlled oscillator 14, 24: Carrier recovery device

23: Numerically controlled oscillator 31: Phase detector

32: Locker 33: Frequency locker

34: Phase loop filter 331: Counter

341: Primary filter 342: Multiplexer

Detailed ways

As mentioned above, if there is a phase deviation or frequency deviation between the local oscillators at the transmitting end and the receiving end, the azimuth diagram of the quadrature AM signal will be skewed or rotated, in other words, as long as there is a phase Deviation or frequency deviation exists, there will be crosstalk between the in-phase signal 'I' and the quadrature signal 'Q' extracted by the I/Q extractor of the digital quadrature AM receiver, thus reducing its performance, so it must The carrier recovery device should be used to detect the frequency and phase deviation between the local oscillators at the sending end and the receiving end to compensate for the skew and rotation of the signal azimuth map.

We first explain the situation of carrier deviation, please refer to Fig. 3, this figure is the functional block diagram of quadrature amplitude modulation receiver of the present invention, quadrature amplitude modulation receiver comprises a tuner 21, can down-convert the received RF signal into an intermediate frequency signal, and then the analog-to-digital converter 22 samples and digitizes these signals to obtain a discontinuous signal whose sampling time is T, and each digitized sampling x[n] can be written as $x\left[\mathrm{no}\right]=\mathrm{Re}\{\left(I\right[\mathrm{no}]+\mathrm{jQ}[\mathrm{no}\left]\right)\&Center\; Dot;{\mathrm{<figure-callout\; id="2"\; label="e\; j"\; filenames="C0212228000271.png"\; state="\{\{state\}\}">e</figure-callout>}}^j\},$ Wherein _fc is the center frequency of the intermediate frequency carrier, the numerically controlled oscillator 23 will further down-convert the digitized intermediate frequency sampling into a baseband signal, and then properly filter out unnecessary high frequency parts, according to the transmission rate of the system (symbol k), after the filtered signal is converted, it will have a new sampling rate, so that the estimated signal is demodulated However, if there is a frequency deviation Δf[n] and a phase deviation Δθ[n] between the numerically controlled oscillator 23 and the center frequency of the IF carrier, there will be crosstalk between the in-phase band and the quadrature band in the down-converted baseband signal. The sound phenomenon occurs, and this effect is explained as follows.

Digitized IF samples with carrier deviations Δf[n] and Δθ[n] can be written as

$x\left[\mathrm{no}\right]=\mathrm{Re}\{\left(I\right[\mathrm{no}]+\mathrm{jQ}[\mathrm{no}\left]\right)\&Center\; Dot;e^{j[2\mathrm{\&pi;}(f_c+\mathrm{\&Delta;f}[\mathrm{no}\left]\right)n+\mathrm{\&Delta;\&theta;}[\mathrm{no}\left]\right]}\},$ Or alternatively written as I[n] cos[2π(f _c +Δf[n])nT+Δθ[n]]-Q[n] sin[2π(f _c +Δf[n])nT+Δθ[n ]].

If no carrier recovery is used, the signal will be distorted in a nasty way:

I'[n]=I[n]·cos(2π·Δf[n]·nT+Δθ[n])-Q[n]·sin(2π·Δf[n]·nT+Δθ[n])

Q'[n]=Q[n]·cos(2π·Δf[n]·nT+Δθ[n])+I[n]·sin(2π·Δf[n]·nT+Δθ[n]).

We have to use the carrier recovery device 24 to estimate the deviations Δf[n] and Δθ[n]. With this carrier information, the numerically controlled oscillator 23 can adjust its frequency and phase to eliminate harmful rotation and baseband sampling (I[n ], Q[n]) crosstalk phenomenon.

中产生两种信息，其中的一的抽取信号 检测能量

被馈入锁控器32，另一检测相位误差“cur_phase”则被送至锁频器33和相位环路滤波器34，锁控器32利用控制信号“FL_out_flag”、“PLF_out_flag”和”valid_flag”主导锁频器33和相位环路滤波器34的状态，藉以控制其搜索及追踪模式，这部份我们将于稍后加以说明；同时，锁频器33反馈其工作状态FSS到锁控器32，然后，锁频器33和相位环路滤波器34分别输出Δf[k]和Δθ[k]到数值控制振荡器23(图3)。Please refer to FIG. 4 , which is a functional block diagram of a preferred embodiment of the carrier recovery device of the present invention. The carrier recovery device includes a phase detector 31 , a locker 32 , a frequency locker 33 , and a phase loop filter component 34 . The phase detector 31 extracts the in-phase part [k] and the quadrature part from the signal

Two kinds of information are generated, one of which is the extracted signal detect energy

is fed into the lock controller 32, and another detected phase error "cur_phase" is sent to the frequency locker 33 and the phase loop filter 34, and the lock controller 32 uses the control signals "FL_out_flag", "PLF_out_flag" and "valid_flag" The state of the dominant frequency locker 33 and the phase loop filter 34 is used to control its search and tracking mode, which we will explain later; at the same time, the frequency locker 33 feeds back its working state FSS to the locker 32 , and then, the frequency locker 33 and the phase loop filter 34 respectively output Δf[k] and Δθ[k] to the numerically controlled oscillator 23 ( FIG. 3 ).

视为复数向量 抽取信号在方位图上的象限与另一复数向量 $\mathrm{sign}\left(\hat{I}\right[k\left]\right)+j\&CenterDot;\mathrm{sign}\left(\hat{Q}\right[K\left]\right)$ 相同，就是利用抽取信号中同相部份和正交部份的正负号来决定其象限，我们可以利用下式导出这两个复数向量间的相位关系：Referring now to FIG. 5A, this figure is a block diagram of the operation of a preferred embodiment of the phase detector 31 in FIG. 4, we can use [k] and

Treated as a complex vector Extract the quadrant of the signal on the azimuth map with another complex vector $\mathrm{sign}\left(\hat{I}\right[k\left]\right)+j\&Center\; Dot;\mathrm{sign}\left(\hat{Q}\right[K\left]\right)$ The same is to use the signs of the in-phase part and the quadrature part of the extracted signal to determine its quadrant. We can use the following formula to derive the phase relationship between these two complex vectors:

$<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; I</span>}}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; j</span>}\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; Q</span>}}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; )</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; sign</span>}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; I</span>}}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; sign</span>}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; Q</span>}}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; )</span>$

After normalization and simplification, we choose the imaginary part as the phase error information, the formula is:

$\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; Q</span>}}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; sign</span>}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; I</span>}}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; I</span>}}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; sign</span>}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; Q</span>}}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; /</span>\sqrt{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; I</span>}}{<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; Q</span>}}{<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ]</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; )</span>}$

传送到锁控器32，以供进一步的判断是否接受此抽取信号。图5B的相位检测器比图5A更为简化，其中省略了一些数学预算，改以常数CV取代。The phase detector 31 transmits the phase error information cur_phase to the frequency locker 33 and the phase loop filter 34, and detects signal energy

It is transmitted to the lock controller 32 for further judgment whether to accept the extraction signal. The phase detector of Fig. 5B is more simplified than that of Fig. 5A, where some mathematical budget is omitted and replaced by a constant CV.

According to the present invention, the frequency locker 33 and the phase loop filter 34 are not always in the operation state, the carrier recovery device of the present invention is divided into three main operation stages, the first is in the search mode, the second is in the Search and track merge mode, the third is in track mode. Assuming that when the carrier recovery device starts to activate, the frequency deviation of the intermediate frequency is as large as tens of thousands of hertz. At this time, the signal azimuth diagram of the in-phase and quadrature parts will rotate severely, and at this time the estimated value of the phase deviation Δθ[k] has a great influence on the compensation carrier The deviation is not helpful, so in the first stage, only the frequency locker 33 is active to obtain the information of the frequency deviation, while the locker 32 controls the phase loop filter 34 to be inactive. When the variation of the estimated frequency has been pulled to a smaller range, the phase loop filter 34 starts to add the operation line to perform a fast search. In other words, in the second stage, the frequency locker 33 and the phase loop filter 34 Simultaneously. After a period of processing time, when the frequency locker 33 tends to be stable, and the variation of the estimated frequency becomes very small, at this moment, the phase loop filter 34 is fine-tuned to compensate for the remaining phase error. Afterwards, the locker 32 is closed The frequency locker 33 fixes the output value Δf[k] of the frequency locker 33 to avoid unnecessary vibration of the carrier recovery device. In the third stage, only the phase loop filter 34 has an effect.

比预定的设定值“PWR_THRES”小，载波恢复装置会保留原有的Δf[k]和Δθ[k]值，本装置聚集能量大于预先设定值的信号，可以加强系统免受新增噪声的干扰。The flow chart of Fig. 6 illustrates the operation principle of lock controller 32, in the carrier recovery device of the present invention, not all extraction signals Both are used to search for frequency and phase error information, if the signal energy

If it is smaller than the predetermined setting value "PWR_THRES", the carrier recovery device will retain the original Δf[k] and Δθ[k] values. This device gathers signals with energy greater than the preset value, which can strengthen the system from new noise interference.

中能有适当的数量进入载波恢复装置，如果设定值“PWR_THRES”的选择适当，可以进行相当快速的搜索，本领域技术人员会知道快速搜索会在检测相位误差中加入噪声，利用一连串检测相位误差的平均值可以滤除掉这些噪声。Please refer to the examples in Figure 7 and Figure 8 for the setting value "PWR_THRES" of 64-QAM and 256-QAM.

There can be an appropriate number of them entering the carrier recovery device. If the setting value "PWR_THRES" is selected properly, a fairly fast search can be performed. Those skilled in the art will know that a fast search will add noise to the detected phase error. Using a series of detected phases The averaging of the errors can filter out this noise.

Please refer to Fig. 6 again, the lock controller 32 receives the detection signal energy from the phase detector 31, if the detection signal energy is greater than the set value "PWR_THRES", the control signal "valid_flag" is set to "TRUE", on the contrary, if the detection If the signal energy is not greater than the set value "PWR_THRES", then the control signal "valid_flag" is set to "FALSE". When the control signal "valid_flag" is "TRUE", the above-mentioned three-stage operation is performed, and the lock controller 32 will monitor the output "FSS" of the frequency locker 33, and compare it with the set value "PLF_THRES" and "FL_LOCK" , where the value of "PLF_THRES" is greater than "FL_LOCK". "FSS" greater than the preset value "PLF_THRES" indicates that there is still a large frequency deviation between the local numerical control oscillator and the intermediate frequency carrier frequency. At this time, the lock controller 32 will force the carrier recovery device to remain in the search phase, and the The control signal "FL_out_flag" is set to "TRUE" to make the frequency locker 33 active, and the control signal "PLF_out_flag" is set to "FALSE" to make the phase loop filter 34 inactive. When "FSS" is equal to or less than the set value "PLF_THRES", but still greater than another set value "FL_LOCK" (its definition is less than "PLF_THRES"), the lock controller 32 commands the carrier recovery device to enter the second operation stage, which will The control signal "PLF_out_flag" is set to "TRUE" to enable the phase loop filter 34 to function. If "FSS" is equal to or less than the second set value "FL_LOCK", it is to enter the third operation stage, and the carrier recovery device sets the control signal "FL_out_flag" to "FALSE" to forcibly close the frequency locker 33 .

The flow chart of Fig. 9A and Fig. 9 B illustrates the operating principle of frequency locker 33, after the carrier recovery device is activated, just first all control flags in the frequency locker 33 are set to predetermined values in step A, initial condition for:

count_pnt=0

over_flag="FALSE"

AFE=0

pre_AFE=0

FSS=FSS_INIT

sflag1=0

sflag2=0

Δf[0]=0

In step 91, the frequency locker 33 first detects the control signal "FL_out_flag" from the locker 32, if the control signal "FL_out_flag" is "FALSE", it means that the carrier recovery device is in the third operation stage, and the frequency locker 33 will be turned off. Then in step 92, the frequency adjustment step value "FSS" is set to the preset value "FL_LOCK", and at the same time, the fixed output Δf[k] of the frequency locker 33 is the previous estimated value, and then step B is performed to output "FSS "to the lock controller 32; on the other side of the flowchart, if the control signal "FL_out_flag" is "TRUE", it means that the carrier recovery device is in the aforementioned first or second operation stage, and in step 93, the frequency locker The output "count_pnt" of counter 331 (Fig. 4) in 33 will add 1, then in step 94, frequency locker 33 can check the state of control signal "valid_flag", if frequency locker 33 detects that control signal "valid_flag" is "FALSE", then go to step C, this part will be explained later, otherwise, when the control signal "valid_flag" is "TRUE", the function of detecting frequency error will be activated.

In step 96, the detection phase error "cur_phase" is first loaded from the phase detector 31, and the steps of detecting the frequency deviation are as follows:

Step 97: If the absolute value of "cur_phase" is not less than the preset value "THRES_PHASE", go to step 98, otherwise go to step 101.

Step 98: check the control signal "over_flag", which is used to illustrate whether the absolute value of "cur_phase" is greater than "THRES_PHASE", if "over_flag" is "TRUE", then perform step 99, if "over_flag" is "FALSE", Then step 100 is executed.

Step 99: Add "pre_FE" to "AFE" as the updated value of "AFE", then go to step C.

Step 100: Set "pre_FE" to the set value "THRES_PHASE", and its sign is the same as "cur_phase", then also add "pre_FE" to "AFE" to update "AFE", and set "over_flag" Set to "TRUE" and go to step C.

Step 101: Update the value of "AFE" to the value of "AFE" plus "cur_phase", and set "over_flag" to "FALSE", go to step C.

Step C: Adjust the frequency step value "FSS", output "FSS" and Δf[k], the steps will be explained later.

In step 102 of Fig. 9B, frequency locker 33 checks whether the value of "count_pnt" has reached "CAL_PNT", if not, retains the original value of "FSS" and Δf[k] in step 103, if the value of "count_pnt" When the value reaches "CAL_PNT", update "FSS" and Δf[k] as follows.

Step 104: Check whether "sflag1" and "sflag2" are both '0', if not, go to step 105; if yes, in step 106, set "sflag2" to '1', go to step 107.

Step 105: Load the value of "sflag1" to "sflag2", and update the value of "sflag1" to be "AFE" multiplied by the sign of "pre_AFE", and execute step 108.

Step 108: Check whether "sflag1" and "sflag2" are both '1', if yes, it means that three consecutive "AFE" have the same sign, multiply "FSS" by 2, and then execute step 107; if If not, go to step 109.

Step 109: Check whether "sflag1" and "sflag2" are both '-1', if yes, it means that three consecutive "AFE" are positive and negative, in step 111, divide "FSS" by 2; if not , then do not change the value of "FSS", go to step 107.

Step 107: Set "pre_AFE" to "AFE", add "FSS" to Δf[k] and multiply the sign of "AFE" as the updated value of Δf[k], then set "count_pnt" and "AFE " are set to 0.

In step 112 , regardless of whether “FSS” and Δf[k] are updated, the frequency locker 33 will output them to the lock controller 32 and the numerically controlled oscillator 23 respectively.

Please refer to Fig. 10 now, Fig. 10 is the circuit block diagram of phase loop filter among Fig. 4, and phase loop filter 34 comprises primary loop filter 341 and output multiplexer 342, and multiplexer 342 detects slave lock controller The control signals "PLF_out_flag" and "valid_flag" from 32 respond to these control signals to determine whether the phase loop filter will output an updated value or an original value. Please refer to the flow chart of the eleventh figure, this figure illustrates the operating principle of the phase loop filter 34, the parameters "Cp" and "Ci" represent the search bandwidth, if the value of "Cp" and "Ci" is larger , the search rate will be faster, but it will also produce greater vibration; on the contrary, if you choose a smaller "Cp" and "Ci", the vibration will be smaller, but the system will take a longer time to converge. We can choose a larger "Cp" and "Ci" at the beginning, and then change to a smaller "Cp" and "Ci" after a preset processing time, which can achieve fast search and better results at the same time. tracking effect.

Fig. 11 is a flow chart illustrating the operation principle of the phase loop filter 34, the flow chart starts from step D, and the initial condition is:

Δθ[0]=0

D_reg[0]=0

In step 113, the phase loop filter 34 first detects the two control signals "valid_flag" and "PLF_out_flag" output from the lock controller 32. As mentioned above, the control signal "valid_flag" indicates whether the extraction signal is valid, and the control The signal "PLF_out_flag" indicates whether the phase loop filter 34 should be activated, and when the two control signals are "TRUE", steps 114 and 115 are executed, and the phase loop filter 34 will pass the phase error information "cur_phase" to Low-pass filter (not shown), after operation, to update its output, this can help to avoid adding noise; Conversely, if "valid_flag" or "PLF_out_flag" is "FALSE", in step 116, the phase loop The loop filter 34 will maintain the original output value, and then in step 117 , the phase loop filter 34 outputs Δθ[k] to the numerically controlled oscillator 23 .

In summary, even if the digital quadrature AM receiver has a large frequency deviation and phase deviation ([-π, π]), the carrier recovery device of the present invention helps to extract the undistorted signal The present invention is not only suitable for a wide locking range, but also has the ability to search quickly, but because the convergence of the above-mentioned phase loop filter will cause the phases of 0°, 90°, 180°, and 270° to be ambiguous, an additional device is required , fortunately there are known signal alignment techniques that can overcome the phase ambiguity problem, or alternatively differential encoding methods can be used to make the rotation in the signal azimuth map fixed.

The invention can be variously modified by a person skilled in the art without departing from the scope of protection described in the claims.

Claims (20)

1. A carrier recovery device, applied to a demodulator of a communication system, comprising: A phase detector, used to detect a first component and a second component of a signal to be demodulated, and output a phase error parameter according to the relationship between the first component and the second component; a frequency locker, electrically connected to the phase detector, for generating a frequency adjustment value and a frequency error estimate value in response to the phase error parameter; A lock controller, which is electrically connected to the frequency locker, is used to output a first flag state signal according to the comparison result between the frequency adjustment value and the first set value, and control the first flag state signal in response to the first flag state signal a change state of the frequency error estimate, the frequency error estimate is processed according to the change state, and provided to a carrier frequency generator at the demodulation end of the communication system to generate a recovered carrier; and a phase loop filter, which is electrically connected to the phase detector and the lock controller, and is used for outputting a phase error estimation value in response to the phase error parameter, and according to the comparison of the frequency adjustment value with the third set value As a result, a third flag state signal is received from the latch to control the change state of the phase error estimate. 2. The carrier recovery device as claimed in claim 1, wherein the demodulation end of the communication system is a quadrature amplitude modulation receiver, and the signal to be demodulated is a quadrature amplitude modulation signal. 3. The carrier recovery device as claimed in claim 2, wherein the quadrature amplitude modulation receiver further comprises an I-decimator, which is used to extract a phase-in-phase part of the quadrature amplitude modulation signal as the first component, in addition It also includes a Q-decimator for extracting a quadrature part of the quadrature amplitude modulation signal as the second component. 4. The carrier recovery device as claimed in claim 3, wherein the phase detector outputs a power parameter to the lock controller in response to the first component and the second component of the quadrature amplitude modulation signal, and according to the power parameter and The comparison result between the second set values outputs a second flag state signal, and when the power parameter is not less than the second set value, the second flag state signal indicates a valid state. 5. The carrier recovery device as claimed in claim 4, wherein the frequency adjustment value is not compared with the first setting value before the second flag state signal indicates the valid state. 6. The carrier recovery device as claimed in claim 1, wherein the frequency adjustment value is not compared with the third setting value before the second flag state signal indicates the valid state. 7. The carrier recovery device as claimed in claim 6, wherein the third set value is greater than the first set value. 8. The carrier recovery device as claimed in claim 7, wherein when the frequency adjustment value is greater than the first set value, the first flag status signal indicates that the frequency locker is in an active state, and when the frequency adjustment value is not When greater than the first set value, the first flag state signal indicates that the frequency locker is in an inactive state. 9. The carrier recovery device as claimed in claim 8, wherein when the frequency adjustment value is not greater than the third set value, the third flag state signal indicates that the phase loop filter is in an active state, when the frequency When the adjustment value is greater than the third set value, the third flag state signal indicates that the phase loop filter is in a non-active state. 10. The carrier recovery device as claimed in claim 9, wherein when the first flag state signal indicates that the frequency locker is in the inactive state, the change state of the frequency error estimate indicates that the frequency error estimate will be retained to the previous value. 11. The carrier recovery device as claimed in claim 10 , wherein when the first flag state signal indicates that the frequency locker is in the active state, the change state of the frequency error estimation value represents a factor by adding the frequency adjustment value The frequency error estimate is updated. 12. The carrier recovery device as claimed in claim 11, wherein the frequency locker outputs an average frequency error according to a comparison result between the phase error parameter and a fourth set value. 13. The carrier recovery device according to claim 12, wherein the frequency locker includes a counter, and when the counter counts to a predetermined value, the frequency locker responds to the sign of the frequency adjustment value and the average frequency value The frequency error estimate is generated. 14. The carrier recovery device according to claim 13, wherein when three consecutive average frequency errors output by the phase detector have the same sign, the frequency adjustment value is doubled, and when three consecutive average frequency errors When the error is positive and negative, the frequency adjustment value is halved. 15. The carrier recovery device as claimed in claim 14, wherein when the third flag state signal indicates that the phase loop filter is in the inactive state, the change state of the phase error estimate indicates that the phase error estimate is retained to the previous value. 16. The carrier recovery device as claimed in claim 12, wherein when the third flag state signal indicates that the phase loop filter is in the active state, the change state of the phase error estimation value is input to the phase loop by leading A search bandwidth factor of the filter is used to update the phase error estimate. 17. The carrier recovery device according to claim 16, wherein the phase loop filter comprises: a primary filter, electrically connected to the phase detector, for receiving the phase error parameter, and processing the phase error parameter and the search bandwidth to obtain an updated phase error estimate; and a multiplexer electrically connected to the primary filter for selecting one of the retained phase error estimate and the updated phase error estimate in response to the second flag state signal and the third flag state signal output. 18. The carrier recovery device as claimed in claim 1, wherein the carrier frequency generator is a numerically controlled oscillator. 19. A carrier recovery device applied to a quadrature amplitude modulation receiver, comprising: a phase detector for outputting a phase error parameter in response to an in-phase component and a quadrature component of a quadrature amplitude modulation signal; a frequency locker, electrically connected to the phase detector, for generating a frequency adjustment value and a frequency error estimate value in response to the phase error parameter; a phase loop filter electrically coupled to the phase detector for outputting a phase error estimate in response to the phase error parameter; and A lock controller, which is electrically connected to the frequency locker and the phase loop filter, and is used to output a first flag status signal to the frequency locker according to the comparison result between the frequency adjustment value and the first set value , and output a second flag state signal to the phase loop filter according to the comparison result between the frequency adjustment value and the second set value, so as to control the first value of the frequency error estimate in response to the first flag state signal changing state, and controlling a second changing state of the phase error estimate in response to the second flag state signal, wherein the frequency error estimate and the phase error estimate are performed according to the first changing state and the second changing state, respectively processed, and provided to a carrier frequency generator in the quadrature amplitude modulation receiver to generate a recovered carrier. 20. The carrier recovery device as claimed in claim 19, wherein the phase detector outputs a power parameter to the lock controller in response to the in-phase component and the quadrature component of the quadrature amplitude modulation signal, and according to the power parameter and The comparison result between the third setting values outputs a third flag state signal. When the power parameter is not less than the third set value, the third flag state signal indicates a valid state, and the third flag state signal indicates Before the valid state, the frequency adjustment value is not compared with the first set value.

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