CN1259706C - Method for maknkig shallow trench isolation zone - Google Patents
Method for maknkig shallow trench isolation zone Download PDFInfo
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- CN1259706C CN1259706C CN 03100237 CN03100237A CN1259706C CN 1259706 C CN1259706 C CN 1259706C CN 03100237 CN03100237 CN 03100237 CN 03100237 A CN03100237 A CN 03100237A CN 1259706 C CN1259706 C CN 1259706C
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Abstract
The present invention relates to a method for making shallow trench isolation zones. In the method, a wafer is provided first, and a covering layer is formed in the wafer; a blank wafer is then provided, and the blank wafer is sent in the platform of an etching machine to etched; the number of defects produced by the blank wafer is checked; provided that the number of defects on the blank wafer is smaller than a standard value, the wafer is sent in the platform of the etching machine to be etched, and a trench is defined in the wafer; an insulating layer is filled in the trench, and then the covering layer is removed to form a shallow trench isolation region.
Description
Technical field
The invention relates to a kind of shallow channel isolation area (Shallow Trench Isolation, manufacture method STI), and particularly relevant for the method for a kind of shallow trench isolation defective monitoring in manufacture craft.
Background technology
The shallow trench isolation method is that a kind of mode of anisotropic etching of utilizing forms groove in the semiconductor-based end, and then inserts oxide in groove, with the technology of the isolated area that forms device.Because the formed isolated area of shallow trench isolation method has the advantage that can adjust size (Scalable), and can avoid the shortcoming of beak erosion (Bird ' s BeakEncroachment) in traditional area oxidation (LOCOS) the method isolation technology, therefore, (the MetalOxide Semiconductor of metal-oxide-semiconductor (MOS) for inferior micron (Sub-Micron), MOS) manufacture craft is a kind of comparatively desirable isolation technology.
And at shallow trench isolation in manufacture craft, in substrate, define and tend to after the groove in groove, find have island defective (Island Defect) to produce.Because island defective and substrate are all the silicon material, so it is present in the shallow channel isolation area, not only can influence the ability that shallow channel isolation area is isolated, and if the island defective be formed on the edge of close groove, also cause device creepage easily.
Therefore, in groove, whether there is the island defective to produce, after groove forms, can carries out inspecting step usually with the quantity that is confirmed to be the island defective and produces whether too much (overgauge value) in order to monitor.And known be to utilize a blank wafer that is coated with a photoresist layer for shallow trench isolation method of defective monitoring in manufacture craft to carry out etching, the defects detection difference height of manufacture craft before and after utilizing, the standard that is used as judging.
Yet the quantity of utilizing known method to inspect island defective in the groove has its shortcoming.Because the defects detection ability of the blank wafer of photoresistance coating is relatively poor, often can not reflect the island defects count that true etching produces, and is therefore not good for the grasp degree of manufacture craft defective, and can't accomplish that the board oneself picks up the ability of survey.
Summary of the invention
Therefore, purpose of the present invention is exactly that a kind of manufacture method of shallow channel isolation area is being provided, and has the problem that the island defective produces to improve shallow trench isolation in manufacture craft.
Another object of the present invention provides the method for a kind of shallow trench isolation defective monitoring in manufacture craft, has and can't grasp the manufacture craft defective and can't accomplish that the board oneself picks up the shortcoming of survey to improve known method.
The present invention proposes a kind of manufacture method of shallow channel isolation area, and the method at first provides a wafer, wherein has been formed with a mask layer on the wafer.Then, provide a blank wafer, wherein be not formed with any retes such as photoresist layer, mask layer on this blank wafer, but the silicon wafer of a blank.Afterwards blank wafer is sent in the etching machine to carry out an etching process, wherein this etching process comprises an etching reaction step and a cleaning step.After etching process, detect the defects count that is produced on the blank wafer.In the present invention, the method that detects the defects count on the blank wafer comprises and utilizes a details in a play not acted out on stage, but told through dialogues (dark field) to inspect method or a bright field (bright field) is inspected method.In addition, detect the method for the defects count on the blank wafer and can also before carrying out etching process, carry out one first scanning step to blank wafer earlier, after carrying out etching process, again blank wafer is carried out one second scanning step, result with first scanning step and second scanning step does a comparison calculating then, with the quantity of judging that defective produces on the blank wafer.If the defects count that is produced on the blank wafer is less than a standard value, just wafer sent in the etching machine carrying out etching process, and in wafer, defined a groove.Continue it, in groove, insert an insulating barrier.Afterwards, mask layer is removed, promptly form a shallow channel isolation area.
The present invention reintroduces the method for a kind of shallow trench isolation defective monitoring in manufacture craft, and the method at first provides a product wafer and a blank wafer.The product wafer is being sent to an etching machine with before carrying out an etching process, earlier blank wafer is being sent in this etching machine to carry out this etching process, wherein this etching process comprises an etching reaction step and a cleaning step.Scan this blank wafer afterwards, to inspect the defects count that blank wafer is produced in above-mentioned etching process.In the present invention, the method that detects the defects count on the blank wafer comprises and utilizes a details in a play not acted out on stage, but told through dialogues to inspect method or a bright field is inspected method.In addition, detect the method for defects count on the blank wafer and can also before carrying out etching process, carry out one first scanning step to blank wafer earlier, blank wafer is carried out one second scanning step again after carrying out etching process, the result of first scanning step and second scanning step is done a comparison calculating, to judge the defects count on the blank wafer.If the defects count that is produced on the blank wafer is less than a standard value, just the product wafer sent in the etching machine carrying out etching process, and defined the position of a groove.
In the manufacture method of shallow channel isolation area of the present invention, because it passed through the defect condition in the blank wafer affirmation etching machine earlier before the definition groove, therefore method of the present invention can be improved the detectability for island defective in the groove.
Because whether the present invention before wafer is carried out etching process, utilizes blank wafer to have unusually to inspect etching machine earlier.If detect defective on blank wafer, the staff can cause the problem of defective to solve to wafer board itself in real time.
Because method of the present invention is to utilize blank wafer to inspect, rather than directly tests with the product wafer, therefore method of the present invention can not lost the product wafer.
Because the present invention inspects with the product wafer, the blank wafer of this test usefulness need not follow all manufacture crafts to carry out, so method of the present invention is comparatively simple and cost is lower.
For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below:
Description of drawings
Fig. 1 is the flow chart according to formation one shallow channel isolation area of a preferred embodiment of the present invention.
Indicate explanation:
100,102,104,106,108,110,112,114: step
Embodiment
Shown in Figure 1, it illustrates is flow chart according to formation one shallow channel isolation area of a preferred embodiment of the present invention.
Please refer to Fig. 1, a wafer (step 100) at first is provided, this wafer can be called a product wafer again, wherein has been formed with a mask layer on this wafer, the etching mask that it is follow-up when being used as patterned wafers.In the present embodiment, comprise more between mask layer and the wafer being formed with a pad oxide that in order to the surface of protection wafer, and the material of mask layer for example is a silicon nitride.
At the same time, provide a blank wafer (step 102), wherein be not formed with any retes such as photoresist layer, mask layer on the blank wafer.
Then, wafer is being carried out an etching process, earlier blank wafer is being sent in the etching machine to carry out an etching process (step 104) with before defining groove.Wherein this etching process comprises an etching reaction step and a cleaning step.After this etching process executed, whether the defects count of then inspecting on the blank wafer to be produced less than a standard value (step 106), in other words, whether inspected island defects count such as column on the blank wafer or ridge less than a standard value.
In the present embodiment, detecting whether defectiveness produces on the blank wafer method for example is to utilize a details in a play not acted out on stage, but told through dialogues to inspect method or a bright field is inspected method.In addition, detect the method that whether defectiveness produces on the blank wafer and can also before carrying out etching process, carry out one first scanning step to blank wafer earlier, after carrying out etching process, again blank wafer is carried out one second scanning step, result with first scanning step and second scanning step does a comparison calculating then, to judge the defects count on the blank wafer.
What specify is, in blank wafer being sent in the etching machine with the process of carrying out etching process, if the surface of blank wafer is not adhered to by the contaminant particles in the board, blank wafer still has a smooth and uniform surface after this etching process.And if when suffering on the surface of blank wafer that contaminant particles in the board adheres to, in the process of this etching process, because of contaminant particles and chip etching speed difference to some extent, after etching process is finished, will on the surface of blank wafer, produce island defectives such as column or ridge.Therefore, utilize blank wafer, can solve the defective that factor caused because of etching machine itself to carry out this etching process earlier and to inspect step.
Then, please continue with reference to Fig. 1, in step 106, if the defects count on the blank wafer is during less than standard value, then carry out step 108, be about to wafer (product wafer) and send in this etching machine carrying out etching process, and in wafer, define a groove.
Continue it, carry out step 110, promptly in groove, insert an insulating barrier, wherein the material of insulating barrier for example is a silica, and the method for inserting insulating barrier in groove for example is prior to deposition comprehensive on the wafer one insulating barrier, carry out an etch-back manufacture craft or a cmp manufacture craft afterwards, the mask layer on wafer comes out.Afterwards, carry out step 112, the mask layer that is about on the wafer removes, and forms a shallow channel isolation area.
Referring again to Fig. 1, if in step 106, during defects count overgauge value on the blank wafer, then carry out step 114, be about to etching machine and cause the factor of defective to solve.In other words, represent that blank wafer has contaminant particles attached to its surface in this etching machine when having the island defective to produce on finding blank wafer, therefore this moment, the staff can adjust etching machine immediately, so that contaminant particles is removed.After the contaminant particles in removing etching machine, carry out step 108 again, be about to wafer (product wafer) and send in this etching machine carrying out etching process, and in wafer, define a groove.Continue it, carry out step 110, promptly in groove, insert an insulating barrier.Afterwards, carry out step 112, the mask layer that is about on the wafer removes, and forms a shallow channel isolation area.
In the manufacture method of shallow channel isolation area of the present invention, because it passed through the defect condition in the blank wafer affirmation etching machine earlier before the definition groove, therefore method of the present invention can be improved the detectability for island defective in the groove.
Because whether the present invention before wafer is carried out etching process, utilizes blank wafer to have unusually to inspect etching machine earlier.If have on blank wafer when detecting excessive defective, the staff can cause the problem of defective to solve to wafer board itself in real time.
Because method of the present invention is to utilize blank wafer to inspect, rather than directly tests with the product wafer, therefore method of the present invention can not lost the product wafer.
Because the present invention inspects with the product wafer, the blank wafer of this test usefulness need not follow all manufacture crafts to carry out, so method of the present invention is comparatively simple and cost is lower.
Because the present invention inspects with the product wafer, therefore test the blank wafer of usefulness and need not follow all manufacture crafts to carry out, so method of the present invention is comparatively simple and cost is lower.
Claims (14)
1, a kind of manufacture method of shallow channel isolation area is characterized in that: comprising:
One wafer is provided, has been formed with a mask layer on this wafer;
One blank wafer is provided;
This blank wafer is sent in the etching machine to carry out an etching process;
After this etching process, detect the defects count on this blank wafer;
If this defects count on this blank wafer less than a standard value, is just sent this wafer in this etching machine carrying out this etching process, and defines a groove in this wafer;
In this groove, insert an insulating barrier; And
Remove this mask layer, to form a shallow channel isolation area.
2, the manufacture method of shallow channel isolation area as claimed in claim 1 is characterized in that: be not formed with any rete on this blank wafer.
3, the manufacture method of shallow channel isolation area as claimed in claim 1 is characterized in that: detect the method that whether defectiveness produces on this blank wafer and comprise the dark field detection method of utilizing.
4, the manufacture method of shallow channel isolation area as claimed in claim 1 is characterized in that: detect on this blank wafer method that whether defectiveness produces and comprise and utilize a bright field detection method.
5, the manufacture method of shallow channel isolation area as claimed in claim 1, it is characterized in that: detect on this blank wafer method that whether defectiveness produces and be included in and carry out earlier this blank wafer being carried out one first scanning step before this etching process, again this blank wafer is carried out one second scanning step after carrying out this etching process, the result difference of comparing this first scanning step and this second scanning step is to judge this defects count on this blank wafer.
6, the manufacture method of shallow channel isolation area as claimed in claim 1 is characterized in that: the material of this mask layer comprises silicon nitride.
7, the manufacture method of shallow channel isolation area as claimed in claim 1 is characterized in that: also comprise between this mask layer and this wafer forming a pad oxide.
8, the manufacture method of shallow channel isolation area as claimed in claim 1 is characterized in that: the material of this insulating barrier comprises silica.
9, the manufacture method of shallow channel isolation area as claimed in claim 1 is characterized in that: this etching process comprises an etching reaction step and a cleaning step.
10, the method for a kind of shallow trench isolation defective monitoring in manufacture craft is characterized in that: comprising:
An one product wafer and a blank wafer are provided;
This product wafer being sent to an etching machine, send this blank wafer to this earlier and carry out this etching process with before carrying out an etching process;
Scan this blank wafer, to inspect the defects count that produces in this etching process process; And
If this defects count on this blank wafer less than a standard value, is just sent this product wafer in this etching machine carrying out this etching process, and defines the position of a groove, wherein
Detecting on this blank wafer method that whether defectiveness produces is included in and carries out earlier this blank wafer being carried out one first scanning step before this etching process, again this blank wafer is carried out one second scanning step after carrying out this etching process, the result difference of comparing this first scanning step and this second scanning step is to judge this defects count on this blank wafer.
11, the method for shallow trench isolation as claimed in claim 10 defective monitoring in manufacture craft is characterized in that: be not formed with any rete on this blank wafer.
12, the method for shallow trench isolation as claimed in claim 10 defective monitoring in manufacture craft is characterized in that: detect the method that whether defectiveness produces on this blank wafer and comprise the dark field detection method of utilizing.
13, the method for shallow trench isolation as claimed in claim 10 defective monitoring in manufacture craft is characterized in that: detect whether defectiveness produces on this blank wafer method and comprise and utilize a bright field detection method.
14, the method for shallow trench isolation as claimed in claim 10 defective monitoring in manufacture craft, it is characterized in that: this etching process comprises an etching reaction step and a cleaning step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03100237 CN1259706C (en) | 2003-01-06 | 2003-01-06 | Method for maknkig shallow trench isolation zone |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03100237 CN1259706C (en) | 2003-01-06 | 2003-01-06 | Method for maknkig shallow trench isolation zone |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1516258A CN1516258A (en) | 2004-07-28 |
| CN1259706C true CN1259706C (en) | 2006-06-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03100237 Expired - Fee Related CN1259706C (en) | 2003-01-06 | 2003-01-06 | Method for maknkig shallow trench isolation zone |
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| CN (1) | CN1259706C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108010863B (en) * | 2017-12-07 | 2021-10-01 | 武汉新芯集成电路制造有限公司 | Method for detecting recess defect and wafer for detecting recess defect |
| CN112902870B (en) * | 2021-01-25 | 2023-12-19 | 长鑫存储技术有限公司 | Method for detecting etching defect of etching machine |
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- 2003-01-06 CN CN 03100237 patent/CN1259706C/en not_active Expired - Fee Related
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| Publication number | Publication date |
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| CN1516258A (en) | 2004-07-28 |
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Granted publication date: 20060614 Termination date: 20210106 |