CN1246751C - Computer system with power management and its method - Google Patents
Computer system with power management and its method Download PDFInfo
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- CN1246751C CN1246751C CN 03158415 CN03158415A CN1246751C CN 1246751 C CN1246751 C CN 1246751C CN 03158415 CN03158415 CN 03158415 CN 03158415 A CN03158415 A CN 03158415A CN 1246751 C CN1246751 C CN 1246751C
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- power supply
- peripheral device
- north bridge
- signal
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Abstract
The present invention relates to a computer system with power source management and a method thereof. The method comprises the following steps: firstly, a central processing unit sends out a power source management signal to a south bridge which responses a stop clock signal; the central processing unit responses a stop permitting message; a north bridge receives a stop permitting message and analyzes a power source supplying mode; if the power source supplying mode is to switch off a main power source supplied by a power source supplying unit, the north bridge sends out a state switching signal to a peripheral device; the peripheral device responses a confirmation signal; the north bridge transfers the stop permitting message to the south bridge which receives the stop permitting message and sends out a power source control signal; the power source supplying unit receives the power source control signal and switches off the relevant power source.
Description
Technical field
The present invention relates to a kind of computer system and method thereof, and particularly relate to a kind of the PCI computer system and method thereof of the power management of (PCI express) peripheral device at a high speed supported that have with power management.
Background technology
Power management is to use so that power supply reaches the application of full blast, to save the consumption of power supply.Fig. 1 is the computer system synoptic diagram.Computing machine 100 comprises central processing unit 110, north bridge 120, south bridge 130 and power supply unit 140.Central processing unit 110 is to link up with power supply unit 140 and other peripheral device (figure does not show) with south bridge 130 by north bridge 120.Power supply unit 140 provides primary power and accessory power supply for computing machine 100 runnings.The power supply supplying mode generally has isotypes such as C2, C3, S3, S4, S5.Pattern C2 and C3 are in order to save the power supply that central processing unit 110 is consumed, and Mode S 3, S4 and S5 close primary power.
Fig. 2 is the method for managing power supply process flow diagram in the general computer system.At first, in step 210, when computing machine will enter battery saving mode, central processing unit 110 is according to the indication of operating system, power management buffer (PMIO register) by access south bridge 130, by the transmission of north bridge 120 Power Management Unit in the south bridge 130 being sent power managing signal, for example is to enter sleep pattern S3, S4 or S5.Then, in step 220, promptly can respond one and stop clock signal STPCLK (Stop Clock Cycle) and give central processing unit 110, be about to enter desired power supply supplying mode to inform central processing unit 110 when south bridge 130 receives power managing signal.In step 230, when receiving, central processing unit 110 stops clock signal STPCLK, and promptly respond one and stop to permit signal STPGNT (Stop Grant Cycle), be ready to enter sleep pattern with expression.Stop to permit signal STPGNT and promptly transmit (pass) and give south bridge 130 when north bridge 120 receives this, shown in step 240.Then, stop to permit signal STPGNT and just power supply unit 140 is sent power control signal when south bridge 130 receives, in the time of for example will entering Mode S 3, south bridge 130 sends power control signal SUSB and gives power supply unit, when entering Mode S 4 or S5, south bridge 130 sends power control signal SUSC.At last, when receiving power control signal, power supply unit 140 promptly suspends corresponding power supply according to this, shown in step 260.
For adapting to the high-speed peripheral need for equipment, the online peripheral device of serial recently rises gradually, for example is PCI (PCI express) peripheral device at a high speed, and itself and north bridge electrically connect.Fig. 3 is power management states conversion (power management state transitions) synoptic diagram of PCI high-speed peripheral device.Under PCI high-speed peripheral device normal condition full speed running, just state L0.When if PCI high-speed peripheral device needs power saving, need get the hang of L2 or L3, at this moment, power supply unit stop supplies primary power is given the PCI speeder.But before get the hang of L2 or the L3, need be introduced into state L2/L3ready.Yet traditional method for managing power supply is all only controlled by central processing unit and south bridge, and north bridge is not also known the change of power supply supplying mode, the PCI high-speed peripheral device of therefore can't giving advance notice.PCI high-speed peripheral device can't be learnt under the situation that the power supply supplying mode of computing machine changes, can't switch to state L2/L3ready in advance, jump to L2 or L3 from state L0 in fact, therefore after restarting next time, when initialization, have abnormal situation and take place.
Summary of the invention
In view of this, the purpose of this invention is to provide a kind of computer system and method thereof, to support PCI high-speed peripheral device with power management.
According to purpose of the present invention, a kind of computer system with power management is proposed, comprise the peripheral device that central processing unit, north bridge, south bridge, power supply unit and at least one and this north bridge electrically connect, wherein this north bridge comprises a decoding unit, and online agreement (HyperTransport I/O Link protocol) and this north bridge communication are exported/imported to this central processing unit to surpass.
According to another object of the present invention, a kind of method for managing power supply of computer system is proposed, may further comprise the steps.At first, central processing unit sends a power managing signal to south bridge; South bridge response one stops clock (Stop Clock) signal; Central processing unit response one stops to permit (Stop Grant) information; North bridge receives and stops to permit message, and analyzes a power supply supplying mode wherein, and for closing the primary power that this power supply unit provides, then north bridge sends a state exchange signal and gives peripheral device as if the power supply supplying mode; In case the completion status conversion, peripheral device responds a confirmation signal; The north bridge transmission stops to permit message and gives south bridge; South bridge receives and stops to permit message, and sends a power control signal according to this; Power supply unit receives power control signal and closes line related according to this.
For making above-mentioned purpose of the present invention, feature and the advantage can be clearer, a preferred embodiment cited below particularly, and be described with reference to the accompanying drawings as follows.
Description of drawings
Fig. 1 is the computer system synoptic diagram;
Fig. 2 is the method for managing power supply process flow diagram in the general computer system;
Fig. 3 is power management states conversion (power management statetransitions) synoptic diagram of PCI high-speed peripheral device;
Fig. 4 is a kind of computer system architecture synoptic diagram with power management according to a preferred embodiment of the present invention; And
Fig. 5 is the process flow diagram of the method for managing power supply of computer system.
The drawing reference numeral explanation
100,400: computer system
110,410: central processing unit
120,420: north bridge
130,430: south bridge
140,440: power supply unit
450:PCI high-speed peripheral device
Embodiment
Under PCI high-speed peripheral device normal condition full speed running, just state L0.When if PCI high-speed peripheral device needs power saving, need get the hang of L2 or L3, at this moment, power supply unit stop supplies primary power is given the PCI speeder.But before get the hang of L2 or the L3, need be introduced into state L2/L3ready.Traditional method for managing power supply is all only controlled by central processing unit and south bridge, and north bridge is not also known the change of power supply supplying mode, the PCI high-speed peripheral device of therefore can't giving advance notice.PCI high-speed peripheral device can't be learnt under the situation that the power supply supplying mode of computing machine changes, and can't switch to state L2/L3ready in advance, jumps to L2 or L3 from state L0 with ining fact, therefore has abnormal situation generation.
The present invention improves traditional method for managing power supply, so that PCI high-speed peripheral device can be learnt the change of power supply supplying mode in advance and make relative reaction.The present invention is applicable to have the super central processing unit of exporting/import online agreement (Hyper Transport I/O Link Protocol), for example is the central processing unit of the K8 series of AMD.
Fig. 4 is a kind of computer system architecture synoptic diagram with power management according to a preferred embodiment of the present invention.Computing machine 400 comprises central processing unit 410, north bridge 420, south bridge 430 and power supply unit 440.Central processing unit 410 is linked up with power supply unit 440 and other peripheral device with south bridge 430 by north bridge 420.Peripheral device for example is a PCI high-speed peripheral device 450, and itself and north bridge 420 electrically connect.Central processing unit 410 with super export/import online agreement (Hyper Transport I/O LinkProtocol) and with north bridge 420 communications.Power supply unit 440 provides primary power and accessory power supply for computing machine 400 runnings.The power supply supplying mode of power supply unit 440 generally has isotypes such as C2, C3, S3, S4, S5.Pattern C2 and C3 are in order to save the power supply that central processing unit 110 is consumed, and Mode S 3, S4 and S5 close primary power.
Stopping of having that the super central processing unit 410 of exporting/import online agreement (HyperTransport I/O Lnk Protocol) sent in power supply supplying mode change process permitted message STPGNT (Stop Grant message) and has system management action hurdle SMAF (System Management ActionField), can learn that therefrom this stops to permit message STPGNT and responds any power supply supplying mode.Therefore the present invention sets up a decoding unit in north bridge 420, stops to permit message STPGNT with analysis and responds any power supply supplying mode.If it is Mode S 3, S4 or S5 that decoding unit finds to stop to permit the power supply supplying mode that message STPGNT responded, north bridge is promptly notified each PCI high-speed peripheral device L2/L3ready that gets the hang of, and then passes to south bridge stopping to permit message STPGNT.
Fig. 5 is the process flow diagram of the method for managing power supply of computer system.At first, in step 510, when computing machine will enter battery saving mode, central processing unit 410 is according to the indication of operating system, power management buffer (PMIO register) by access south bridge 430, by the transmission of north bridge 420 Power Management Unit in the south bridge 430 being sent power managing signal, for example is to enter sleep pattern S3, S4 or S5.Then, in step 520, promptly can respond one and stop clock signal STPCLK (Stop Clock Cycle) and give central processing unit 410, be about to enter desired power supply supplying mode to inform central processing unit 410 when south bridge 430 receives power managing signal.In step 530, when receiving, central processing unit 410 stops clock signal STPCLK, and promptly respond one and stop to permit message STPGNT (Stop Grant message), be ready to enter sleep pattern with expression.In step 540,, north bridge 420 stops to permit message STPGNT promptly by the power supply supplying mode of the system management action hurdle SMAF wherein of the decoding unit analysis in the north bridge when receiving this.If to stop to permit the power supply supplying mode shown in the message STPGNT is Mode S 3, S4 or S5, then north bridge 420 sends the state exchange signal and gives all PCI high-speed peripheral devices 450 with the L2/L3ready that gets the hang of, shown in step 550.If north bridge 420 receives the response signal ACK of all PCI high-speed peripheral devices 450, then north bridge 420 just will stop to permit message STPGNT and pass to south bridge 430, shown in step 560.In step 570, stop to permit message STPGNT and just power supply unit 440 is sent power control signal when south bridge 430 receives, in the time of for example will entering Mode S 3, south bridge 430 sends power control signal SUSB and gives power supply unit 440, when entering Mode S 4 or S5, south bridge 430 is to send power control signal SUSC.At last, when receiving power control signal, power supply unit 440 promptly suspends corresponding power supply according to this, shown in step 580.
Method for managing power supply that the above embodiment of the present invention is disclosed and device thereof can be tackled the information between central processing unit and the south bridge and learn in advance whether primary power is about to close, if, then notify PCI high-speed peripheral device to prepare in advance, can't initialized problem after restarting next time to prevent PCI high-speed peripheral device.
In sum; though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; the technician of this utilization; under the premise without departing from the spirit and scope of the present invention; can be used for a variety of modifications and variations, so protection scope of the present invention is looked accompanying Claim and is as the criterion.
Claims (5)
1. the method for managing power supply of a computer system, when being used for this computer system and will entering battery saving mode, this computer system comprises a central processing unit, a north bridge, a south bridge, a power supply unit and at least one peripheral device, this central processing unit system is one to surpass the transmission online agreement of output/input and this north bridge communication, this peripheral device and this north bridge electrically connect, and this method comprises:
Send a power managing signal, it is sent this south bridge by this north bridge by this central processing unit;
Response one stops clock signal, and it is to be sent to this central processing unit according to this power managing signal by this south bridge;
Response one stops allowance information, and it is to be stopped clock signal according to this and responded by this central processing unit;
Receive this by this north bridge and stop to permit message, and an analysis power supply supplying mode wherein, if this power supply supplying mode for closing the primary power that this power supply unit provides, then sends a state exchange signal by this north bridge and gives this peripheral device;
Respond a confirmation signal, it is sent completion status conversion back according to this state exchange signal by this peripheral device;
Transmit this and stop to permit message to this south bridge, it is that institute sends after receiving this confirmation signal by this north bridge;
Send a power control signal, it is to receive this by this south bridge to stop to permit that institute sends after the message; And
Close line related, it is to carry out according to this after receiving this power control signal by this power supply unit.
2. method for managing power supply as claimed in claim 1, wherein this peripheral device is a PCI high-speed peripheral device.
3. method for managing power supply as claimed in claim 2 wherein is to receive this state exchange signal that this north bridge sends with this PCI high-speed peripheral device, so that this PCI high-speed peripheral device is transformed into another state L2/L3ready by a state L0.
4. method for managing power supply as claimed in claim 1, wherein this north bridge is to analyze this power supply supplying mode that this stops to permit message with a decoding unit.
5. method for managing power supply as claimed in claim 4 wherein is to analyze this with this decoding unit to stop to permit the system management action hurdle in the message and learn this power supply supplying mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03158415 CN1246751C (en) | 2003-09-09 | 2003-09-09 | Computer system with power management and its method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03158415 CN1246751C (en) | 2003-09-09 | 2003-09-09 | Computer system with power management and its method |
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| Publication Number | Publication Date |
|---|---|
| CN1492299A CN1492299A (en) | 2004-04-28 |
| CN1246751C true CN1246751C (en) | 2006-03-22 |
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| CN 03158415 Expired - Lifetime CN1246751C (en) | 2003-09-09 | 2003-09-09 | Computer system with power management and its method |
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Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI243983B (en) * | 2004-08-03 | 2005-11-21 | Via Tech Inc | System and method of power management |
| CN1300661C (en) * | 2004-12-09 | 2007-02-14 | 威盛电子股份有限公司 | Computer system and power source management state |
| CN100335996C (en) * | 2005-02-04 | 2007-09-05 | 威盛电子股份有限公司 | Chipset maintaining screen display method and its computer system |
| JP4594761B2 (en) * | 2005-02-10 | 2010-12-08 | 株式会社東芝 | Information processing apparatus and control method thereof |
| TWI268424B (en) | 2005-03-15 | 2006-12-11 | Uli Electronics Inc | Signal transmission method between computer system and peripherals adopting PCI express bus characterizing in saving power of transmitting signals |
| CN100407103C (en) * | 2005-04-22 | 2008-07-30 | 辉达公司 | Computer system and its system chip power-saving mode instruction transmission method |
| TWI311705B (en) * | 2005-05-23 | 2009-07-01 | Via Tech Inc | Peripheral component interconnect express and changing method of link power states thereof |
| CN100354794C (en) * | 2005-05-25 | 2007-12-12 | 威盛电子股份有限公司 | Method for regulating internal storage frequency |
| CN101241171B (en) * | 2007-02-08 | 2010-09-22 | 佛山市顺德区顺达电脑厂有限公司 | Power supply apparatus test device and method |
| JP2008299696A (en) * | 2007-06-01 | 2008-12-11 | Buffalo Inc | Network connecting device power supply managing method |
| US7822999B2 (en) * | 2007-06-04 | 2010-10-26 | Andes Technology Corporation | Computer system and method for controlling a processor thereof |
| CN100547520C (en) * | 2007-11-07 | 2009-10-07 | 威盛电子股份有限公司 | The method for managing power supply of computer system and computer system |
| CN101980103A (en) * | 2010-10-29 | 2011-02-23 | 威盛电子股份有限公司 | Power state management method and related computer system |
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2003
- 2003-09-09 CN CN 03158415 patent/CN1246751C/en not_active Expired - Lifetime
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| CN1492299A (en) | 2004-04-28 |
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Granted publication date: 20060322 |