CN1236502C - Film transistor array base plate structure - Google Patents
Film transistor array base plate structure Download PDFInfo
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- CN1236502C CN1236502C CN 01123964 CN01123964A CN1236502C CN 1236502 C CN1236502 C CN 1236502C CN 01123964 CN01123964 CN 01123964 CN 01123964 A CN01123964 A CN 01123964A CN 1236502 C CN1236502 C CN 1236502C
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- film transistor
- scan wiring
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- scan
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Abstract
The present invention relates to a base plate structure with a film transistor array, in which an array of quasi-electrodes are added beside a scan wire controlling the last array of pixels and at one edge of a film transistor array, wherein parts of the array of electrodes, overlapped on the last scan wire, can form capacitance equal to storage capacitance above other scan wires; a liquid crystal layer above the array of quasi-electrodes can be provided with liquid crystal capacitance. The array of quasi-electrodes can be used for compensating the storage capacitance and the liquid crystal capacitance lacked by the last scan wire. In addition, the array of quasi-electrodes can also be connected to a voltage, and overlapping areas thereof on the last scan wire are adjusted so that the capacitance on the last scan wire is equivalent to that on other scan wires.
Description
Technical field
The invention relates to a kind of film transistor array base plate structure, and particularly form the film transistor array base plate structure of plan electrode (dummy electrode), the capacity effect of the boundary scan distribution of the plan electrode balance of this structure by having the capacitance compensation effect and other scan wiring with capacitance compensation effect relevant for a kind of scan wiring in the end top.
Background technology
At present, the multimedia technology develop rapidly mainly has benefited from the tremendous progress of semiconductor subassembly or man-machine display device.With regard to display, (Cathode Ray Tube CRT) because of having excellent display quality and its economy, monopolizes monitor market in recent years to cathode ray tube always.Yet, operate the environment of most terminating machine/display equipments on the table for the individual, or consider with the viewpoint of environmental protection, the words of predicting with the trend of saving the energy, still there are a lot of problems in cathode ray tube in space utilization and energy resource consumption, its demand for light, thin, short, little and low consumpting power can't effectively provide solution.Therefore, the Thin Film Transistor-LCD (TFT-LCD) with high image quality, the high and low consumed power of space utilization efficient, advantageous characteristic such as radiationless becomes the market mainstream gradually.And general Thin Film Transistor-LCD mainly is to pour into liquid crystal to form lattice between thin-film transistor array base-plate and colorful optical filter array substrate, attaches polaroid and last polaroid formation display panels (LCD panel) down again outside thin-film transistor array base-plate and colorful optical filter array substrate.Because Thin Film Transistor-LCD itself is not luminous, thus need backlight module to provide a white light source for display panels, to reach the effect of demonstration.So good and bad display quality that directly has influence on Thin Film Transistor-LCD usually of thin-film transistor array base-plate.
At first, please please refer to Fig. 1 and Fig. 2 simultaneously, it is film transistor array base plate structure schematic diagram and a generalized section in the common liquid crystals display.The common framework of thin film transistor (TFT) array and disposes plurality of scanning wirings 102a, 102b, 102c and many data wiring 104a, 104b, 104c, 104d, 104e on the substrate 100 on a substrate 100.Constitute a pixel region between two adjacent scan wirings such as scan wiring 102a, 102b and data wiring 104a, the 104b, and each pixel region top disposes a thin-film transistor 106 and the pixel electrode 108 corresponding to thin-film transistor 106 respectively.A plurality of thin-film transistors 106 of being controlled with scan wiring 102a explain, and each thin-film transistor 106 all has a grid 106a, one source pole 106b and a drain electrode 106c.Wherein, the grid 106a of thin-film transistor 106 can electrically connect with scan wiring 102a, and the source electrode 106b of thin-film transistor 106 can electrically connect with data wiring 104a, and the drain electrode 106c of thin-film transistor 106 can electrically connect with corresponding pixel electrode 108.In addition, pixel electrode 108 is except covering above-mentioned pixel region, and pixel electrode 108 more can cover on the adjacent scan wiring 102b, to form a storage capacitors C on scan wiring 102b
StSame capacity effect C
StCan occur in other scan wiring such as scan wiring 102c top, but scan wiring 102a top does not have storage capacitors C yet
StExistence.
Write fashionable when the thin-film transistor on scan wiring 102a, 102b, the 102c 106 is carried out data, can apply a voltage to scan wiring 102a, 102b, 102c successively, make to be controlled by the state that a plurality of thin-film transistors 106 on scan wiring 102a, 102b, the 102c are " ON " respectively, and video data is write in the thin-film transistor 106 that scan wiring 102a, 102b, 102c controlled by each bar data wiring 104a, 104b, 104c, 104d, 104e.Yet in the process that video data writes, scan wiring 102b and scan wiring the 102c scan wiring of edge (non-) top all can be covered by adjacent pixel electrodes 108 and form storage capacitors C
St, do not cover but the scan wiring 102a at edge top has any adjacent pixel electrodes, so the suffered capacity effect of scan wiring 102a is different with the suffered capacity effect of scan wiring 102b, 102c significantly.The scan wiring of edge (non-) suffered capacity effect is different because the suffered capacity effect of scan wiring 102a and scan wiring 102b, 102c, so scan wiring 102a also can be inconsistent with other row pixel in demonstration to last row pixel that is driven.
Then please refer to Fig. 3 A, it is the schematic diagram of other scan wiring of the general thin transistor (TFT) array substrate scan wiring of edge (non-) top electric capacity.By learning the electric capacity summation C of scan wiring 102b and scan wiring 102c top among Fig. 3 A
TotalBe equivalent to liquid crystal capacitance C
LCWith parasitic capacitance C
Gs, parasitic capacitance C
Sig1And parasitic capacitance C
Sig2And after connecting, again with storage capacitors C
StPolyphone.
Then please refer to Fig. 3 B, it is the schematic diagram of other scan wiring of the general thin transistor (TFT) array substrate scan wiring of edge (non-) top equivalent capacity.Because parasitic capacitance C
Gs, parasitic capacitance C
Sig1With parasitic capacitance C
Sig2Much smaller than liquid crystal capacitance C
LCSo, liquid crystal capacitance C
LCWith parasitic capacitance C
Gs, parasitic capacitance C
Sig1And parasitic capacitance C
Sig2And resulting capacitance can the rough liquid crystal capacitance C that equals after connecting
LC, so the electric capacity summation C of scan wiring 102b and scan wiring 102c top
TotalBe equivalent to storage capacitors C approximately
StWith liquid crystal capacitance C
LCPolyphone.Yet in the common film transistor array base plate structure, boundary scan distribution top is owing to have adjacent pixel electrodes and cover, so boundary scan distribution top does not have storage capacitors C
St, parasitic capacitance C
Gs, parasitic capacitance C
Sig1, parasitic capacitance C
Sig2With liquid crystal capacitance C
LCExistence.And the scan wiring 102a and the capacity effect on other scan wiring 102b, the 102c at edge are inconsistent, cause last row pixel and the demonstration of other row pixel can't be consistent.
Summary of the invention
The objective of the invention is to propose a kind of film transistor array base plate structure, be formed at by pixel electrode on the scan wiring at edge, with the capacity effect of the boundary scan distribution of balance and other scan wiring with capacitance compensation effect.
For reaching above-mentioned purpose of the present invention, a kind of film transistor array base plate structure is proposed, be the other configuration one row pixel electrode that increases of scan wiring of controlling last row pixel at the thin film transistor (TFT) array edge.Wherein, the part that this row pixel electrode is overlapped in the last item scan wiring can form a storage capacitors that is equivalent to other scan wiring top, and the underlapped part top in the last item scan wiring of this row pixel electrode has liquid crystal, therefore has a liquid crystal capacitance (being equivalent to the liquid crystal capacitance on other pixel electrode).Can compensate storage capacitors and the liquid crystal capacitance that the last item scan wiring is lacked by this row pixel electrode,, and then improve display quality with the electric capacity difference between balanced each row the last item scan wiring and other scan wiring.
For reaching above-mentioned purpose of the present invention, a kind of film transistor array base plate structure is proposed in addition, it is the other configuration one row pixel electrode that increases of scan wiring of controlling last row pixel at the thin film transistor (TFT) array edge, in addition, this row pixel electrode can be received on the voltage, be overlapped in area on the last item scan wiring by adjusting this row pixel electrode, make on the last item scan wiring electric capacity can with the total capacitance equivalence on other scan wiring, and then improve display quality.
After adopting the present invention,, make that the demonstration of edge columns pixel is consistent with other row pixel because the last item scan wiring in the film transistor array base plate structure of the present invention has the capacity effect identical with other scan wiring; In addition, the light shield when only pixel electrode being carried out patterning makes an amendment slightly, can reach the purpose of the capacity effect of balance the last item scan wiring and other scan wiring.
Description of drawings
Fig. 1 is a film transistor array base plate structure vertical view in the common liquid crystals display;
Fig. 2 is a film transistor array base plate structure generalized section in the common liquid crystals display;
Fig. 3 A is other scan wiring of the general thin transistor (TFT) array substrate scan wiring of edge (non-) top electric capacity schematic diagram.
Fig. 3 B is other scan wiring of the general thin transistor (TFT) array substrate scan wiring of edge (non-) top equivalent capacity schematic diagram
Fig. 4 is a film transistor array base plate structure vertical view in the first embodiment of the invention LCD;
Fig. 5 is a film transistor array base plate structure generalized section in the first embodiment of the invention LCD;
Fig. 6 is the boundary scan distribution of a thin-film transistor array base-plate top equivalent capacity schematic diagram in the first embodiment of the invention LCD;
Fig. 7 is a film transistor array base plate structure vertical view in the second embodiment of the invention LCD;
Fig. 8 is a film transistor array base plate structure generalized section in the second embodiment of the invention LCD;
Fig. 9 is the boundary scan distribution of a thin-film transistor array base-plate top equivalent capacity schematic diagram in the second embodiment of the invention LCD.
100,200: substrate
102a, 102b, 102c: scan wiring
104a, 104b, 104c, 104d, 104e: data wiring
106,206: thin-film transistor
106a, 206a: grid
106b, 206b: source electrode
106c, 206c: drain electrode
108,208: pixel electrode
202a, 202b, 202c: scan wiring
204a, 204b, 204c, 204d, 204e: data wiring
210: intend electrode
212: connector
214: shared wiring
Embodiment
First embodiment
At first please be simultaneously with reference to Fig. 4 and Fig. 5, it illustrates vertical view and generalized section according to film transistor array base plate structure in the first embodiment of the invention LCD respectively.The thin film transistor (TFT) array framework and disposes plurality of scanning wirings 202a, 202b, 202c and many data wiring 204a, 204b, 204c, 204d, 204e on the substrate 200 on a substrate 200.Constitute a pixel region between adjacent two scan wirings such as scan wiring 202a, 202b and data wiring 204a, the 204b, and each pixel region top disposes a thin-film transistor 206 and the pixel electrode 208 corresponding to thin-film transistor 206 respectively.In addition, scan wiring 202a side more disposes a plurality of plan electrodes 210, in order to the capacity effect of compensated scanning distribution 202a top.
A plurality of thin-film transistors 206 of being controlled with scan wiring 202a explain, and each thin-film transistor 206 all has a grid 206a, one source pole 206b and a drain electrode 206c.Wherein, the grid 206a of thin-film transistor 206 can electrically connect with scan wiring 202a, and the source electrode 206b of thin-film transistor 206 can electrically connect with data wiring 204a, and the drain electrode 206c of thin-film transistor 206 can electrically connect with corresponding pixel electrode 208.In addition, pixel electrode 208 is except being covered in above-mentioned pixel region, and pixel electrode 208 more can be covered on the adjacent scan wiring 202b, to form a storage capacitors C on scan wiring 202b
St, same capacity effect C
StCan occur in other scan wiring such as scan wiring 202c top, but scan wiring 202a top does not have storage capacitors C yet
StExistence.
Because scan wiring 202a top does not have storage capacitors C
StWith liquid crystal capacitance C
LCExistence, therefore at a plurality of plan electrodes 210 of the other configuration of scan wiring 202a, in order to compensated scanning distribution 202a top storage capacitors C
StWith liquid crystal capacitance C
LCWherein, intend electrode 210 and have the subregion, with formation above scan wiring 202a and other scan wiring 202b, storage capacitors C that 202c is identical with scan wiring 202a is overlapping
St, do not have liquid crystal to exist equally and intend electrode 210 parts, so there is a liquid crystal capacitance C with scan wiring 202a overlapping areas top
LCTherefore after the compensation of electric capacity through plan electrode 210 of scan wiring 212a top, can approximate storage capacitors C
StWith liquid crystal capacitance C
LCPolyphone.
The present invention writes fashionable in that the thin-film transistor on scan wiring 202a, 202b, the 202c 206 is carried out data, can apply a voltage to scan wiring 202a, 202b, 202c successively equally, make to be controlled by the state that a plurality of thin-film transistors 206 on scan wiring 202a, 202b, the 202c are " ON " respectively, and video data is write in the thin-film transistor 206 that scan wiring 202a, 202b, 202c controlled by each bar data wiring 204a, 204b, 204c, 204d, 204e.In the process that video data writes,, scan wiring 202b, 202c top forms a storage capacitors C owing to all can being covered by adjacent pixel electrodes 208
StAnd with a liquid crystal capacitance C
CLPolyphone, and the scan wiring 202a at edge top also has the electrode of plan 210 parts to cover on it, so that a storage capacitors C to be provided
StWith a liquid crystal capacitance C
CLSo the suffered capacity effect of scan wiring 202a can be consistent with the suffered capacity effect of scan wiring 202b, 202c.
Then please refer to Fig. 6, it illustrates and is the schematic diagram according to the boundary scan distribution of thin-film transistor array base-plate in first embodiment of the invention LCD top equivalent capacity.The electric capacity summation C of scan wiring 202b and scan wiring 202c top
TotalBe equivalent to liquid crystal capacitance C
LCWith parasitic capacitance C
Gs, parasitic capacitance C
Sig1And parasitic capacitance C
Sig2And after connecting, again with storage capacitors C
StPolyphone.But because the parasitic capacitance C of scan wiring 202b and 202c top
Gs, parasitic capacitance C
Sig1With parasitic capacitance C
Sig2Much smaller than liquid crystal capacitance C
LCSo, liquid crystal capacitance C
LCWith parasitic capacitance C
Gs, parasitic capacitance C
Sig1And parasitic capacitance C
Sig2And resulting capacitance can approximate liquid crystal capacitance C after connecting
LC, and the electric capacity summation C of scan wiring 202b and scan wiring 202c top
TotalApproximate storage capacitors C
StWith liquid crystal capacitance C
LCPolyphone.
Make the capacity effect on the scan wiring 202a be equivalent to storage capacitors C by intending electrode 210 (referring to Fig. 4) in the present embodiment
StWith liquid crystal capacitance C
LCPolyphone is so the capacity effect on the scan wiring 202a can be consistent with other scan wiring 202b, 202c.
Second embodiment
At first please refer to Fig. 7 and Fig. 8, it illustrates respectively and is vertical view and generalized section according to film transistor array base plate structure in the second embodiment of the invention LCD.The thin film transistor (TFT) array framework and disposes plurality of scanning wirings 202a, 202b, 202c and many data wiring 204a, 204b, 204c, 204d, 204e on the substrate 200 on a substrate 200.Constitute a pixel region between adjacent two scan wirings such as scan wiring 202a, 202b and data wiring 204a, the 204b, and each pixel region top disposes a thin-film transistor 206 and the pixel electrode 208 corresponding to thin-film transistor 206 respectively.In addition, scan wiring 202a side more disposes a plurality of plan electrodes 210, in order to the capacity effect of compensated scanning distribution 202a top.
A plurality of thin-film transistors 206 of being controlled with scan wiring 202a explain, and each thin-film transistor 206 all has a grid 206a, one source pole 206b and a drain electrode 206c.Wherein, the grid 206a of thin-film transistor 206 can electrically connect with scan wiring 202a, and the source electrode 206b of thin-film transistor 206 can electrically connect with data wiring 204a, and the drain electrode 206c of thin-film transistor 206 can electrically connect with corresponding pixel electrode 208.In addition, pixel electrode 208 is except being covered in above-mentioned pixel region, and pixel electrode 208 more can be covered on the adjacent scan wiring 202b, forms a storage capacitors C to go up in scan wiring 202b
St, same capacity effect C
StCan occur in other scan wiring such as scan wiring 202c top, but scan wiring 202a top does not have storage capacitors C yet
StExistence.
Because scan wiring 202a top does not have storage capacitors C
StWith liquid crystal capacitance C
LCExistence, so, and each is intended electrode 210 be connected to one by connector 212 and share on the distribution 214 in a plurality of plan electrodes 210 of the other configuration of scan wiring 202a.Wherein, connector 212 has the first end 212a and the second end 212b, the first end 212a of connector 212 and each are intended electrode 210 electrically connects, the second end 212b of connector 212 and shared wiring 214 electrically connects, and this shared wiring 214 is to be electrically connected at one to share for example weld pad on chip for driving of voltage (common voltage).Intend electrode 210 and the overlapping area of scan wiring 202a by adjusting, make the electric capacity kC that intends between electrode 210 and the scan wiring 202a
StMeeting and the last storage capacitors C of scan wiring 202b, 202c
StWith liquid crystal capacitance C
LCTotal capacitance equivalence behind the polyphone.
The present invention writes fashionable in that the thin-film transistor on scan wiring 202a, 202b, the 202c 206 is carried out data, can apply a voltage to scan wiring 202a, 202b, 202c successively equally, make to be controlled by the state that a plurality of thin-film transistors 206 on scan wiring 202a, 202b, the 202c are " ON " respectively, and video data is write in the thin-film transistor 206 that scan wiring 202a, 202b, 202c controlled by each bar data wiring 204a, 204b, 204c, 204d, 204e.In the process that video data writes,, scan wiring 202b, 202c top forms a storage capacitors C owing to all can being covered by adjacent pixel electrodes 208
StAnd with a liquid crystal capacitance C
CLPolyphone, and the scan wiring 202a at edge top also has the electrode of plan 210 parts to cover it on and is electrically connected at a shared voltage, to provide one with storage capacitors C
StWith a liquid crystal capacitance C
CLThe electric capacity kC of polyphone back equivalence
StTherefore, the suffered capacity effect of scan wiring 202a can be consistent with the suffered capacity effect of scan wiring 202b, 202c.
Please refer to Fig. 9 at last, it illustrates to according to the boundary scan distribution of thin-film transistor array base-plate in second embodiment of the invention LCD top equivalent capacity schematic diagram.The electric capacity summation C of scan wiring 202b and scan wiring 202c top
TotalBe equivalent to liquid crystal capacitance C
LCWith parasitic capacitance C
Gs, parasitic capacitance C
Sig1And parasitic capacitance C
Sig2And after connecting, again with storage capacitors C
StPolyphone.But because the parasitic capacitance C of scan wiring 202b and 202c top
Gs, parasitic capacitance C
Sig1With parasitic capacitance C
Sig2Much smaller than liquid crystal capacitance C
LCSo, liquid crystal capacitance C
LCWith parasitic capacitance C
Gs, parasitic capacitance C
Sig1And parasitic capacitance C
Sig2And resulting capacitance can the rough liquid crystal capacitance C that equals after connecting
LC, and the electric capacity summation C of scan wiring 202b and scan wiring 202c top
TotalApproximate storage capacitors C
StWith liquid crystal capacitance C
LCPolyphone.
Make electric capacity kC on the scan wiring 202a by intending electrode 210 (referring to Fig. 7) in the present embodiment
StBe equivalent to storage capacitors C
StWith liquid crystal capacitance C
LCElectric capacity behind the polyphone is so the capacity effect on the scan wiring 202a can be consistent with other scan wiring 202b, 202c.
In sum, film transistor array base plate structure of the present invention has following advantage at least:
1. the last item scan wiring in the film transistor array base plate structure of the present invention has the capacity effect identical with other scan wiring, makes that the demonstration of edge columns pixel is consistent with other row pixel.
2. film transistor array base plate structure of the present invention is under the process conditions that do not change array base palte, and the light shield when only pixel electrode being carried out patterning makes an amendment slightly, can reach the purpose of the capacity effect of balance the last item scan wiring and other scan wiring.
Preferred embodiment of the present invention openly as above, but it is not in order to limiting the present invention, any change in the present invention conceives scope all drops in protection scope of the present invention.
Claims (5)
1, a kind of film transistor array base plate structure comprises at least:
A substrate;
The pixel of a plurality of arrayed, each pixel comprises a thin-film transistor, a pixel electrode, one scan distribution and a data wiring, wherein this thin-film transistor comprises a grid, one source pole and a drain electrode, this grid is connected with this scan wiring, this source electrode is connected with this data wiring, and should drain electrode electrically connect with this pixel electrode, it is characterized in that:
From the row pixel near this substrate one lateral edges, its pixel electrode is to extend along the direction away from this lateral edges, and the zone of its pixel electrode part is to extend to adjacent column scan wiring top; And
This structure also comprises a plurality of plan electrodes, between a row picture element scan distribution and this lateral edges of the most close this lateral edges, these intend electrodes is along extending away from this lateral edges direction, and these are intended electrodes and have the subregion to extend to the scan wiring top of the most close this lateral edges one row pixel.
2, film transistor array base plate structure as claimed in claim 1 is characterized in that: these are intended electrode and have consistent pattern with described pixel electrode.
3, film transistor array base plate structure as claimed in claim 1 is characterized in that: each is intended the electrode below and also disposes at least one connector and a shared wiring, and these are intended electrode and are connected on this shared wiring by these corresponding connectors respectively.
4, film transistor array base plate structure as claimed in claim 3 is characterized in that: this shared wiring is connected in a voltage.
5, film transistor array base plate structure as claimed in claim 3 is characterized in that: these are intended electrode and have consistent pattern with these pixel electrodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01123964 CN1236502C (en) | 2001-08-08 | 2001-08-08 | Film transistor array base plate structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01123964 CN1236502C (en) | 2001-08-08 | 2001-08-08 | Film transistor array base plate structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1400670A CN1400670A (en) | 2003-03-05 |
| CN1236502C true CN1236502C (en) | 2006-01-11 |
Family
ID=4665398
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 01123964 Expired - Lifetime CN1236502C (en) | 2001-08-08 | 2001-08-08 | Film transistor array base plate structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1236502C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4389471B2 (en) * | 2003-05-19 | 2009-12-24 | パナソニック株式会社 | Electronic circuit connection structure and connection method |
| JP4381063B2 (en) * | 2003-08-18 | 2009-12-09 | 東芝モバイルディスプレイ株式会社 | Array substrate and flat display device |
-
2001
- 2001-08-08 CN CN 01123964 patent/CN1236502C/en not_active Expired - Lifetime
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| Publication number | Publication date |
|---|---|
| CN1400670A (en) | 2003-03-05 |
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Granted publication date: 20060111 |